1 //===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "SystemZTargetMachine.h"
11 #include "SystemZTargetTransformInfo.h"
12 #include "llvm/CodeGen/Passes.h"
13 #include "llvm/Support/TargetRegistry.h"
14 #include "llvm/Transforms/Scalar.h"
15 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
16 
17 using namespace llvm;
18 
19 extern "C" void LLVMInitializeSystemZTarget() {
20   // Register the target.
21   RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
22 }
23 
24 // Determine whether we use the vector ABI.
25 static bool UsesVectorABI(StringRef CPU, StringRef FS) {
26   // We use the vector ABI whenever the vector facility is avaiable.
27   // This is the case by default if CPU is z13 or later, and can be
28   // overridden via "[+-]vector" feature string elements.
29   bool VectorABI = true;
30   if (CPU.empty() || CPU == "generic" ||
31       CPU == "z10" || CPU == "z196" || CPU == "zEC12")
32     VectorABI = false;
33 
34   SmallVector<StringRef, 3> Features;
35   FS.split(Features, ",", -1, false /* KeepEmpty */);
36   for (auto &Feature : Features) {
37     if (Feature == "vector" || Feature == "+vector")
38       VectorABI = true;
39     if (Feature == "-vector")
40       VectorABI = false;
41   }
42 
43   return VectorABI;
44 }
45 
46 static std::string computeDataLayout(const Triple &TT, StringRef CPU,
47                                      StringRef FS) {
48   bool VectorABI = UsesVectorABI(CPU, FS);
49   std::string Ret = "";
50 
51   // Big endian.
52   Ret += "E";
53 
54   // Data mangling.
55   Ret += DataLayout::getManglingComponent(TT);
56 
57   // Make sure that global data has at least 16 bits of alignment by
58   // default, so that we can refer to it using LARL.  We don't have any
59   // special requirements for stack variables though.
60   Ret += "-i1:8:16-i8:8:16";
61 
62   // 64-bit integers are naturally aligned.
63   Ret += "-i64:64";
64 
65   // 128-bit floats are aligned only to 64 bits.
66   Ret += "-f128:64";
67 
68   // When using the vector ABI, 128-bit vectors are also aligned to 64 bits.
69   if (VectorABI)
70     Ret += "-v128:64";
71 
72   // We prefer 16 bits of aligned for all globals; see above.
73   Ret += "-a:8:16";
74 
75   // Integer registers are 32 or 64 bits.
76   Ret += "-n32:64";
77 
78   return Ret;
79 }
80 
81 SystemZTargetMachine::SystemZTargetMachine(const Target &T, const Triple &TT,
82                                            StringRef CPU, StringRef FS,
83                                            const TargetOptions &Options,
84                                            Reloc::Model RM, CodeModel::Model CM,
85                                            CodeGenOpt::Level OL)
86     : LLVMTargetMachine(T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options,
87                         RM, CM, OL),
88       TLOF(make_unique<TargetLoweringObjectFileELF>()),
89       Subtarget(TT, CPU, FS, *this) {
90   initAsmInfo();
91 }
92 
93 SystemZTargetMachine::~SystemZTargetMachine() {}
94 
95 namespace {
96 /// SystemZ Code Generator Pass Configuration Options.
97 class SystemZPassConfig : public TargetPassConfig {
98 public:
99   SystemZPassConfig(SystemZTargetMachine *TM, PassManagerBase &PM)
100     : TargetPassConfig(TM, PM) {}
101 
102   SystemZTargetMachine &getSystemZTargetMachine() const {
103     return getTM<SystemZTargetMachine>();
104   }
105 
106   void addIRPasses() override;
107   bool addInstSelector() override;
108   void addPreSched2() override;
109   void addPreEmitPass() override;
110 };
111 } // end anonymous namespace
112 
113 void SystemZPassConfig::addIRPasses() {
114   TargetPassConfig::addIRPasses();
115 }
116 
117 bool SystemZPassConfig::addInstSelector() {
118   addPass(createSystemZISelDag(getSystemZTargetMachine(), getOptLevel()));
119 
120  if (getOptLevel() != CodeGenOpt::None)
121     addPass(createSystemZLDCleanupPass(getSystemZTargetMachine()));
122 
123   return false;
124 }
125 
126 void SystemZPassConfig::addPreSched2() {
127   if (getOptLevel() != CodeGenOpt::None &&
128       getSystemZTargetMachine().getSubtargetImpl()->hasLoadStoreOnCond())
129     addPass(&IfConverterID);
130 }
131 
132 void SystemZPassConfig::addPreEmitPass() {
133   // We eliminate comparisons here rather than earlier because some
134   // transformations can change the set of available CC values and we
135   // generally want those transformations to have priority.  This is
136   // especially true in the commonest case where the result of the comparison
137   // is used by a single in-range branch instruction, since we will then
138   // be able to fuse the compare and the branch instead.
139   //
140   // For example, two-address NILF can sometimes be converted into
141   // three-address RISBLG.  NILF produces a CC value that indicates whether
142   // the low word is zero, but RISBLG does not modify CC at all.  On the
143   // other hand, 64-bit ANDs like NILL can sometimes be converted to RISBG.
144   // The CC value produced by NILL isn't useful for our purposes, but the
145   // value produced by RISBG can be used for any comparison with zero
146   // (not just equality).  So there are some transformations that lose
147   // CC values (while still being worthwhile) and others that happen to make
148   // the CC result more useful than it was originally.
149   //
150   // Another reason is that we only want to use BRANCH ON COUNT in cases
151   // where we know that the count register is not going to be spilled.
152   //
153   // Doing it so late makes it more likely that a register will be reused
154   // between the comparison and the branch, but it isn't clear whether
155   // preventing that would be a win or not.
156   if (getOptLevel() != CodeGenOpt::None)
157     addPass(createSystemZElimComparePass(getSystemZTargetMachine()), false);
158   if (getOptLevel() != CodeGenOpt::None)
159     addPass(createSystemZShortenInstPass(getSystemZTargetMachine()), false);
160   addPass(createSystemZLongBranchPass(getSystemZTargetMachine()));
161 }
162 
163 TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) {
164   return new SystemZPassConfig(this, PM);
165 }
166 
167 TargetIRAnalysis SystemZTargetMachine::getTargetIRAnalysis() {
168   return TargetIRAnalysis([this](Function &F) {
169     return TargetTransformInfo(SystemZTTIImpl(this, F));
170   });
171 }
172