1//-- SystemZScheduleZ14.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the machine model for Z14 to support instruction
11// scheduling and other instruction cost heuristics.
12//
13// Pseudos expanded right after isel do not need to be modelled here.
14//
15//===----------------------------------------------------------------------===//
16
17def Z14Model : SchedMachineModel {
18
19    let UnsupportedFeatures = Arch12UnsupportedFeatures.List;
20
21    let IssueWidth = 6;             // Number of instructions decoded per cycle.
22    let MicroOpBufferSize = 60;     // Issue queues
23    let LoadLatency = 1;            // Optimistic load latency.
24
25    let PostRAScheduler = 1;
26
27    // Extra cycles for a mispredicted branch.
28    let MispredictPenalty = 20;
29}
30
31let SchedModel = Z14Model in  {
32// These definitions need the SchedModel value. They could be put in a
33// subtarget common include file, but it seems the include system in Tablegen
34// currently (2016) rejects multiple includes of same file.
35
36// Decoder grouping rules
37let NumMicroOps = 1 in {
38  def : WriteRes<NormalGr, []>;
39  def : WriteRes<BeginGroup, []> { let BeginGroup  = 1; }
40  def : WriteRes<EndGroup, []>   { let EndGroup    = 1; }
41}
42def : WriteRes<Cracked, []> {
43  let NumMicroOps = 2;
44  let BeginGroup  = 1;
45}
46def : WriteRes<GroupAlone, []> {
47  let NumMicroOps = 3;
48  let BeginGroup  = 1;
49  let EndGroup    = 1;
50}
51def : WriteRes<GroupAlone2, []> {
52  let NumMicroOps = 6;
53  let BeginGroup  = 1;
54  let EndGroup    = 1;
55}
56def : WriteRes<GroupAlone3, []> {
57  let NumMicroOps = 9;
58  let BeginGroup  = 1;
59  let EndGroup    = 1;
60}
61
62// Incoming latency removed from the register operand which is used together
63// with a memory operand by the instruction.
64def : ReadAdvance<RegReadAdv, 4>;
65
66// LoadLatency (above) is not used for instructions in this file. This is
67// instead the role of LSULatency, which is the latency value added to the
68// result of loads and instructions with folded memory operands.
69def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; }
70
71let NumMicroOps = 0 in {
72  foreach L = 1-30 in
73    def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; }
74}
75
76// Execution units.
77def Z14_FXaUnit     : ProcResource<2>;
78def Z14_FXbUnit     : ProcResource<2>;
79def Z14_LSUnit      : ProcResource<2>;
80def Z14_VecUnit     : ProcResource<2>;
81def Z14_VecFPdUnit  : ProcResource<2> { let BufferSize = 1; /* blocking */ }
82def Z14_VBUnit      : ProcResource<2>;
83def Z14_MCD         : ProcResource<1>;
84
85// Subtarget specific definitions of scheduling resources.
86let NumMicroOps = 0 in {
87  def : WriteRes<FXa, [Z14_FXaUnit]>;
88  def : WriteRes<FXb, [Z14_FXbUnit]>;
89  def : WriteRes<LSU, [Z14_LSUnit]>;
90  def : WriteRes<VecBF,  [Z14_VecUnit]>;
91  def : WriteRes<VecDF,  [Z14_VecUnit]>;
92  def : WriteRes<VecDFX, [Z14_VecUnit]>;
93  def : WriteRes<VecMul,  [Z14_VecUnit]>;
94  def : WriteRes<VecStr,  [Z14_VecUnit]>;
95  def : WriteRes<VecXsPm, [Z14_VecUnit]>;
96  foreach Num = 2-5 in { let ResourceCycles = [Num] in {
97    def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z14_FXaUnit]>;
98    def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z14_FXbUnit]>;
99    def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z14_LSUnit]>;
100    def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z14_VecUnit]>;
101    def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z14_VecUnit]>;
102    def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z14_VecUnit]>;
103    def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z14_VecUnit]>;
104    def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z14_VecUnit]>;
105    def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z14_VecUnit]>;
106  }}
107
108  def : WriteRes<VecFPd,  [Z14_VecFPdUnit]> { let ResourceCycles = [30]; }
109
110  def : WriteRes<VBU,     [Z14_VBUnit]>; // Virtual Branching Unit
111}
112
113def : WriteRes<MCD, [Z14_MCD]> { let NumMicroOps = 3;
114                                 let BeginGroup  = 1;
115                                 let EndGroup    = 1; }
116
117// -------------------------- INSTRUCTIONS ---------------------------------- //
118
119// InstRW constructs have been used in order to preserve the
120// readability of the InstrInfo files.
121
122// For each instruction, as matched by a regexp, provide a list of
123// resources that it needs. These will be combined into a SchedClass.
124
125//===----------------------------------------------------------------------===//
126// Stack allocation
127//===----------------------------------------------------------------------===//
128
129// Pseudo -> LA / LAY
130def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>;
131
132//===----------------------------------------------------------------------===//
133// Branch instructions
134//===----------------------------------------------------------------------===//
135
136// Branch
137def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;
138def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>;
139def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>;
140def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>;
141def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "BI(C)?(Asm.*)?$")>;
142def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>;
143def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>;
144def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>;
145def : InstRW<[WLat1, FXa2, FXb2, GroupAlone2],
146             (instregex "B(R)?X(H|L).*$")>;
147
148// Compare and branch
149def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;
150def : InstRW<[WLat1, FXb2, GroupAlone],
151             (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;
152
153//===----------------------------------------------------------------------===//
154// Trap instructions
155//===----------------------------------------------------------------------===//
156
157// Trap
158def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>;
159
160// Compare and trap
161def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>;
162def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>;
163def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>;
164def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>;
165
166//===----------------------------------------------------------------------===//
167// Call and return instructions
168//===----------------------------------------------------------------------===//
169
170// Call
171def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>;
172def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL$")>;
173def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?$")>;
174def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;
175
176// Return
177def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return$")>;
178def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn$")>;
179
180//===----------------------------------------------------------------------===//
181// Move instructions
182//===----------------------------------------------------------------------===//
183
184// Moves
185def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>;
186def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>;
187
188// Move character
189def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
190def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>;
191
192// Pseudo -> reg move
193def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>;
194def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>;
195def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>;
196def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>;
197
198// Loads
199def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>;
200def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>;
201def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>;
202def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
203
204def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>;
205def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>;
206
207def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>;
208def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>;
209def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR(Mux)?$")>;
210
211// Load and zero rightmost byte
212def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>;
213
214// Load and trap
215def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>;
216
217// Load and test
218def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>;
219def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>;
220
221// Stores
222def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>;
223def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>;
224def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>;
225
226// String moves.
227def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>;
228
229//===----------------------------------------------------------------------===//
230// Conditional move instructions
231//===----------------------------------------------------------------------===//
232
233def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>;
234def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>;
235def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>;
236def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
237             (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>;
238def : InstRW<[WLat1, FXb, LSU, NormalGr],
239             (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>;
240
241//===----------------------------------------------------------------------===//
242// Sign extensions
243//===----------------------------------------------------------------------===//
244
245def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>;
246def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>;
247
248def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>;
249def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>;
250
251def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>;
252def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>;
253def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>;
254def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>;
255def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>;
256
257//===----------------------------------------------------------------------===//
258// Zero extensions
259//===----------------------------------------------------------------------===//
260
261def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>;
262def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>;
263def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>;
264def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>;
265def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>;
266def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>;
267def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>;
268def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;
269
270// Load and zero rightmost byte
271def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>;
272
273// Load and trap
274def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>;
275
276//===----------------------------------------------------------------------===//
277// Truncations
278//===----------------------------------------------------------------------===//
279
280def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>;
281def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
282def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>;
283
284//===----------------------------------------------------------------------===//
285// Multi-register moves
286//===----------------------------------------------------------------------===//
287
288// Load multiple (estimated average of 5 ops)
289def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>;
290
291// Load multiple disjoint
292def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>;
293
294// Store multiple
295def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;
296
297//===----------------------------------------------------------------------===//
298// Byte swaps
299//===----------------------------------------------------------------------===//
300
301def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>;
302def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>;
303def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>;
304def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>;
305
306//===----------------------------------------------------------------------===//
307// Load address instructions
308//===----------------------------------------------------------------------===//
309
310def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>;
311
312// Load the Global Offset Table address ( -> larl )
313def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>;
314
315//===----------------------------------------------------------------------===//
316// Absolute and Negation
317//===----------------------------------------------------------------------===//
318
319def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LP(G)?R$")>;
320def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "L(N|P)GFR$")>;
321def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LN(R|GR)$")>;
322def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>;
323def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>;
324
325//===----------------------------------------------------------------------===//
326// Insertion
327//===----------------------------------------------------------------------===//
328
329def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>;
330def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
331             (instregex "IC32(Y)?$")>;
332def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr],
333             (instregex "ICM(H|Y)?$")>;
334def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>;
335def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>;
336def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>;
337def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>;
338def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>;
339def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>;
340def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>;
341
342//===----------------------------------------------------------------------===//
343// Addition
344//===----------------------------------------------------------------------===//
345
346def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
347             (instregex "A(Y)?$")>;
348def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
349             (instregex "AH(Y)?$")>;
350def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>;
351def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>;
352def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
353             (instregex "AG$")>;
354def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>;
355def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>;
356def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>;
357def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>;
358def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>;
359def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
360             (instregex "AL(Y)?$")>;
361def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>;
362def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
363             (instregex "ALG(F)?$")>;
364def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>;
365def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>;
366def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>;
367def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>;
368def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>;
369def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>;
370def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>;
371def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>;
372def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>;
373
374// Logical addition with carry
375def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
376             (instregex "ALC(G)?$")>;
377def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>;
378
379// Add with sign extension (16/32 -> 64)
380def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
381             (instregex "AG(F|H)$")>;
382def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>;
383
384//===----------------------------------------------------------------------===//
385// Subtraction
386//===----------------------------------------------------------------------===//
387
388def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
389             (instregex "S(G|Y)?$")>;
390def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
391             (instregex "SH(Y)?$")>;
392def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>;
393def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>;
394def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
395             (instregex "SL(G|GF|Y)?$")>;
396def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>;
397def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>;
398def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>;
399def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>;
400def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>;
401def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>;
402
403// Subtraction with borrow
404def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
405             (instregex "SLB(G)?$")>;
406def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>;
407
408// Subtraction with sign extension (16/32 -> 64)
409def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
410             (instregex "SG(F|H)$")>;
411def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>;
412
413//===----------------------------------------------------------------------===//
414// AND
415//===----------------------------------------------------------------------===//
416
417def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
418             (instregex "N(G|Y)?$")>;
419def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>;
420def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>;
421def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>;
422def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>;
423def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>;
424def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>;
425def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>;
426def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>;
427def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>;
428def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>;
429def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>;
430
431//===----------------------------------------------------------------------===//
432// OR
433//===----------------------------------------------------------------------===//
434
435def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
436             (instregex "O(G|Y)?$")>;
437def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>;
438def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>;
439def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>;
440def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>;
441def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>;
442def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>;
443def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>;
444def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>;
445def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>;
446def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>;
447def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>;
448
449//===----------------------------------------------------------------------===//
450// XOR
451//===----------------------------------------------------------------------===//
452
453def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
454             (instregex "X(G|Y)?$")>;
455def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>;
456def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>;
457def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>;
458def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>;
459def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>;
460def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>;
461def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>;
462
463//===----------------------------------------------------------------------===//
464// Multiplication
465//===----------------------------------------------------------------------===//
466
467def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr],
468             (instregex "MS(GF|Y)?$")>;
469def : InstRW<[WLat5, FXa, NormalGr], (instregex "MS(R|FI)$")>;
470def : InstRW<[WLat7LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>;
471def : InstRW<[WLat7, FXa, NormalGr], (instregex "MSGR$")>;
472def : InstRW<[WLat5, FXa, NormalGr], (instregex "MSGF(I|R)$")>;
473def : InstRW<[WLat8LSU, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MLG$")>;
474def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MLGR$")>;
475def : InstRW<[WLat4, FXa, NormalGr], (instregex "MGHI$")>;
476def : InstRW<[WLat4, FXa, NormalGr], (instregex "MHI$")>;
477def : InstRW<[WLat4LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>;
478def : InstRW<[WLat6, FXa2, GroupAlone], (instregex "M(L)?R$")>;
479def : InstRW<[WLat6LSU, RegReadAdv, FXa2, LSU, GroupAlone],
480             (instregex "M(FY|L)?$")>;
481def : InstRW<[WLat8, RegReadAdv, FXa, LSU, NormalGr], (instregex "MGH$")>;
482def : InstRW<[WLat12, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MG$")>;
483def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MGRK$")>;
484def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, FXa, LSU, NormalGr],
485             (instregex "MSC$")>;
486def : InstRW<[WLat8LSU, WLat8LSU, RegReadAdv, FXa, LSU, NormalGr],
487             (instregex "MSGC$")>;
488def : InstRW<[WLat6, WLat6, FXa, NormalGr], (instregex "MSRKC$")>;
489def : InstRW<[WLat8, WLat8, FXa, NormalGr], (instregex "MSGRKC$")>;
490
491//===----------------------------------------------------------------------===//
492// Division and remainder
493//===----------------------------------------------------------------------===//
494
495def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>;
496def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "D$")>;
497def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>;
498def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone2],
499             (instregex "DSG(F)?$")>;
500def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>;
501def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>;
502def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2],
503             (instregex "DL(G)?$")>;
504
505//===----------------------------------------------------------------------===//
506// Shifts
507//===----------------------------------------------------------------------===//
508
509def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>;
510def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>;
511def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>;
512def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>;
513def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],
514             (instregex "S(L|R)D(A|L)$")>;
515
516// Rotate
517def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
518
519// Rotate and insert
520def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
521def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
522def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
523def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
524
525// Rotate and Select
526def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>;
527
528//===----------------------------------------------------------------------===//
529// Comparison
530//===----------------------------------------------------------------------===//
531
532def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
533             (instregex "C(G|Y|Mux)?$")>;
534def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>;
535def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>;
536def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>;
537def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>;
538def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>;
539def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>;
540def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>;
541def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>;
542def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
543             (instregex "CL(Y|Mux)?$")>;
544def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>;
545def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>;
546def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>;
547def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>;
548def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>;
549def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>;
550def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>;
551def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>;
552def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>;
553def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>;
554def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>;
555def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>;
556def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>;
557def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>;
558def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>;
559def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>;
560def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>;
561
562// Compare halfword
563def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>;
564def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>;
565def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;
566def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>;
567def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>;
568
569// Compare with sign extension (32 -> 64)
570def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>;
571def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>;
572def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>;
573
574// Compare logical character
575def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>;
576def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>;
577def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>;
578
579// Test under mask
580def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>;
581def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>;
582def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>;
583def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>;
584def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>;
585def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>;
586
587// Compare logical characters under mask
588def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr],
589             (instregex "CLM(H|Y)?$")>;
590
591//===----------------------------------------------------------------------===//
592// Prefetch and execution hint
593//===----------------------------------------------------------------------===//
594
595def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>;
596def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>;
597def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>;
598def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>;
599
600//===----------------------------------------------------------------------===//
601// Atomic operations
602//===----------------------------------------------------------------------===//
603
604def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>;
605
606def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>;
607def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>;
608def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>;
609def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>;
610def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>;
611
612// Test and set
613def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>;
614
615// Compare and swap
616def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone],
617             (instregex "CS(G|Y)?$")>;
618
619// Compare double and swap
620def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone2],
621             (instregex "CDS(Y)?$")>;
622def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3,
623              GroupAlone3], (instregex "CDSG$")>;
624
625// Compare and swap and store
626def : InstRW<[WLat30, MCD], (instregex "CSST$")>;
627
628// Perform locked operation
629def : InstRW<[WLat30, MCD], (instregex "PLO$")>;
630
631// Load/store pair from/to quadword
632def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>;
633def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>;
634
635// Load pair disjoint
636def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>;
637
638//===----------------------------------------------------------------------===//
639// Translate and convert
640//===----------------------------------------------------------------------===//
641
642def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>;
643def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone2],
644             (instregex "TRT$")>;
645def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>;
646def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>;
647def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>;
648def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>;
649def : InstRW<[WLat30, WLat30, WLat30, MCD],
650             (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
651def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
652
653//===----------------------------------------------------------------------===//
654// Message-security assist
655//===----------------------------------------------------------------------===//
656
657def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD],
658             (instregex "KM(C|F|O|CTR|A)?$")>;
659def : InstRW<[WLat30, WLat30, WLat30, MCD],
660             (instregex "(KIMD|KLMD|KMAC)$")>;
661def : InstRW<[WLat30, WLat30, WLat30, MCD],
662             (instregex "(PCC|PPNO|PRNO)$")>;
663
664//===----------------------------------------------------------------------===//
665// Guarded storage
666//===----------------------------------------------------------------------===//
667
668def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LGG$")>;
669def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLGFSG$")>;
670def : InstRW<[WLat30, MCD], (instregex "(L|ST)GSC$")>;
671
672//===----------------------------------------------------------------------===//
673// Decimal arithmetic
674//===----------------------------------------------------------------------===//
675
676def : InstRW<[WLat30, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone2],
677             (instregex "CVBG$")>;
678def : InstRW<[WLat30, RegReadAdv, FXb, VecDF, LSU, GroupAlone2],
679             (instregex "CVB(Y)?$")>;
680def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone3], (instregex "CVDG$")>;
681def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone2], (instregex "CVD(Y)?$")>;
682def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>;
683def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
684def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>;
685def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>;
686
687def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone2],
688             (instregex "(A|S|ZA)P$")>;
689def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone2], (instregex "(M|D)P$")>;
690def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone3], (instregex "SRP$")>;
691def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>;
692def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>;
693def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>;
694
695//===----------------------------------------------------------------------===//
696// Access registers
697//===----------------------------------------------------------------------===//
698
699// Extract/set/copy access register
700def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>;
701
702// Load address extended
703def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>;
704
705// Load/store access multiple (not modeled precisely)
706def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>;
707def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STAM(Y)?$")>;
708
709//===----------------------------------------------------------------------===//
710// Program mask and addressing mode
711//===----------------------------------------------------------------------===//
712
713// Insert Program Mask
714def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>;
715
716// Set Program Mask
717def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>;
718
719// Branch and link
720def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>;
721
722// Test addressing mode
723def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>;
724
725// Set addressing mode
726def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>;
727
728// Branch (and save) and set mode.
729def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>;
730def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>;
731
732//===----------------------------------------------------------------------===//
733// Transactional execution
734//===----------------------------------------------------------------------===//
735
736// Transaction begin
737def : InstRW<[WLat9, LSU2, FXb5, GroupAlone2], (instregex "TBEGIN(C)?$")>;
738
739// Transaction end
740def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>;
741
742// Transaction abort
743def : InstRW<[WLat30, MCD], (instregex "TABORT$")>;
744
745// Extract Transaction Nesting Depth
746def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>;
747
748// Nontransactional store
749def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>;
750
751//===----------------------------------------------------------------------===//
752// Processor assist
753//===----------------------------------------------------------------------===//
754
755def : InstRW<[WLat1, FXb, GroupAlone], (instregex "PPA$")>;
756
757//===----------------------------------------------------------------------===//
758// Miscellaneous Instructions.
759//===----------------------------------------------------------------------===//
760
761// Find leftmost one
762def : InstRW<[WLat5, WLat5, FXa2, GroupAlone], (instregex "FLOGR$")>;
763
764// Population count
765def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT$")>;
766
767// String instructions
768def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>;
769def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>;
770
771// Various complex instructions
772def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>;
773def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD],
774             (instregex "UPT$")>;
775def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>;
776def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>;
777
778// Execute
779def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>;
780
781//===----------------------------------------------------------------------===//
782// .insn directive instructions
783//===----------------------------------------------------------------------===//
784
785// An "empty" sched-class will be assigned instead of the "invalid sched-class".
786// getNumDecoderSlots() will then return 1 instead of 0.
787def : InstRW<[], (instregex "Insn.*")>;
788
789
790// ----------------------------- Floating point ----------------------------- //
791
792//===----------------------------------------------------------------------===//
793// FP: Move instructions
794//===----------------------------------------------------------------------===//
795
796// Load zero
797def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>;
798def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>;
799
800// Load
801def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>;
802def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
803def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>;
804def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>;
805
806// Load and Test
807def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>;
808def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BRCompare$")>;
809def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone],
810             (instregex "LTXBR(Compare)?$")>;
811
812// Copy sign
813def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>;
814
815//===----------------------------------------------------------------------===//
816// FP: Load instructions
817//===----------------------------------------------------------------------===//
818
819def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>;
820def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>;
821def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>;
822
823//===----------------------------------------------------------------------===//
824// FP: Store instructions
825//===----------------------------------------------------------------------===//
826
827def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>;
828def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>;
829
830//===----------------------------------------------------------------------===//
831// FP: Conversion instructions
832//===----------------------------------------------------------------------===//
833
834// Load rounded
835def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEDBR(A)?$")>;
836def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>;
837
838// Load lengthened
839def : InstRW<[WLat7LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>;
840def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LDEBR$")>;
841def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>;
842def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>;
843
844// Convert from fixed / logical
845def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>;
846def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)BR(A)?$")>;
847def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>;
848def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)BR$")>;
849
850// Convert to fixed / logical
851def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked],
852             (instregex "C(F|G)(E|D)BR(A)?$")>;
853def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked],
854             (instregex "C(F|G)XBR(A)?$")>;
855def : InstRW<[WLat10, WLat10, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>;
856def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLFDBR$")>;
857def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>;
858def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>;
859
860//===----------------------------------------------------------------------===//
861// FP: Unary arithmetic
862//===----------------------------------------------------------------------===//
863
864// Load Complement / Negative / Positive
865def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>;
866def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>;
867def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>;
868
869// Square root
870def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>;
871def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>;
872def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>;
873
874// Load FP integer
875def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>;
876def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>;
877
878//===----------------------------------------------------------------------===//
879// FP: Binary arithmetic
880//===----------------------------------------------------------------------===//
881
882// Addition
883def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
884             (instregex "A(E|D)B$")>;
885def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D)BR$")>;
886def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>;
887
888// Subtraction
889def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
890             (instregex "S(E|D)B$")>;
891def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D)BR$")>;
892def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>;
893
894// Multiply
895def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
896             (instregex "M(D|DE|EE)B$")>;
897def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>;
898def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
899             (instregex "MXDB$")>;
900def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDBR$")>;
901def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>;
902
903// Multiply and add / subtract
904def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
905             (instregex "M(A|S)EB$")>;
906def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>;
907def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
908             (instregex "M(A|S)DB$")>;
909def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(A|S)DBR$")>;
910
911// Division
912def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
913             (instregex "D(E|D)B$")>;
914def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>;
915def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>;
916
917// Divide to integer
918def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>;
919
920//===----------------------------------------------------------------------===//
921// FP: Comparisons
922//===----------------------------------------------------------------------===//
923
924// Compare
925def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
926             (instregex "(K|C)(E|D)B$")>;
927def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>;
928def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>;
929
930// Test Data Class
931def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>;
932def : InstRW<[WLat10, LSU, VecDF4, GroupAlone], (instregex "TCXB$")>;
933
934//===----------------------------------------------------------------------===//
935// FP: Floating-point control register instructions
936//===----------------------------------------------------------------------===//
937
938def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>;
939def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>;
940def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>;
941def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>;
942def : InstRW<[WLat30, MCD], (instregex "SFASR$")>;
943def : InstRW<[WLat30, MCD], (instregex "LFAS$")>;
944def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>;
945
946
947// --------------------- Hexadecimal floating point ------------------------- //
948
949//===----------------------------------------------------------------------===//
950// HFP: Move instructions
951//===----------------------------------------------------------------------===//
952
953// Load and Test
954def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>;
955def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>;
956
957//===----------------------------------------------------------------------===//
958// HFP: Conversion instructions
959//===----------------------------------------------------------------------===//
960
961// Load rounded
962def : InstRW<[WLat7, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>;
963def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEXR$")>;
964def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>;
965
966// Load lengthened
967def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>;
968def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>;
969def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>;
970def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>;
971
972// Convert from fixed
973def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>;
974def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)R$")>;
975
976// Convert to fixed
977def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>;
978def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>;
979
980// Convert BFP to HFP / HFP to BFP.
981def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "THD(E)?R$")>;
982def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "TB(E)?DR$")>;
983
984//===----------------------------------------------------------------------===//
985// HFP: Unary arithmetic
986//===----------------------------------------------------------------------===//
987
988// Load Complement / Negative / Positive
989def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>;
990def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>;
991
992// Halve
993def : InstRW<[WLat7, VecBF, NormalGr], (instregex "H(E|D)R$")>;
994
995// Square root
996def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>;
997def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>;
998def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>;
999
1000// Load FP integer
1001def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)R$")>;
1002def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>;
1003
1004//===----------------------------------------------------------------------===//
1005// HFP: Binary arithmetic
1006//===----------------------------------------------------------------------===//
1007
1008// Addition
1009def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1010             (instregex "A(E|D|U|W)$")>;
1011def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>;
1012def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>;
1013
1014// Subtraction
1015def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1016             (instregex "S(E|D|U|W)$")>;
1017def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>;
1018def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>;
1019
1020// Multiply
1021def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1022             (instregex "M(D|DE|E|EE)$")>;
1023def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>;
1024def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
1025             (instregex "MXD$")>;
1026def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDR$")>;
1027def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>;
1028def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], (instregex "MY$")>;
1029def : InstRW<[WLat7LSU, RegReadAdv, VecBF2, LSU, GroupAlone],
1030             (instregex "MY(H|L)$")>;
1031def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MYR$")>;
1032def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MY(H|L)R$")>;
1033
1034// Multiply and add / subtract
1035def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
1036             (instregex "M(A|S)(E|D)$")>;
1037def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>;
1038def : InstRW<[WLat8LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone],
1039             (instregex "MAY$")>;
1040def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
1041             (instregex "MAY(H|L)$")>;
1042def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MAYR$")>;
1043def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>;
1044
1045// Division
1046def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], (instregex "D(E|D)$")>;
1047def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>;
1048def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>;
1049
1050//===----------------------------------------------------------------------===//
1051// HFP: Comparisons
1052//===----------------------------------------------------------------------===//
1053
1054// Compare
1055def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1056             (instregex "C(E|D)$")>;
1057def : InstRW<[WLat7, VecBF, NormalGr], (instregex "C(E|D)R$")>;
1058def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>;
1059
1060
1061// ------------------------ Decimal floating point -------------------------- //
1062
1063//===----------------------------------------------------------------------===//
1064// DFP: Move instructions
1065//===----------------------------------------------------------------------===//
1066
1067// Load and Test
1068def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>;
1069def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>;
1070
1071//===----------------------------------------------------------------------===//
1072// DFP: Conversion instructions
1073//===----------------------------------------------------------------------===//
1074
1075// Load rounded
1076def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>;
1077def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>;
1078
1079// Load lengthened
1080def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>;
1081def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>;
1082
1083// Convert from fixed / logical
1084def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CD(F|G)TR(A)?$")>;
1085def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)TR(A)?$")>;
1086def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDL(F|G)TR$")>;
1087def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)TR$")>;
1088
1089// Convert to fixed / logical
1090def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked],
1091             (instregex "C(F|G)DTR(A)?$")>;
1092def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked],
1093             (instregex "C(F|G)XTR(A)?$")>;
1094def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>;
1095def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>;
1096
1097// Convert from / to signed / unsigned packed
1098def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>;
1099def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone2], (instregex "CX(S|U)TR$")>;
1100def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>;
1101def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone2], (instregex "C(S|U)XTR$")>;
1102
1103// Convert from / to zoned
1104def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>;
1105def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXZT$")>;
1106def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>;
1107def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>;
1108
1109// Convert from / to packed
1110def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>;
1111def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXPT$")>;
1112def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>;
1113def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>;
1114
1115// Perform floating-point operation
1116def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>;
1117
1118//===----------------------------------------------------------------------===//
1119// DFP: Unary arithmetic
1120//===----------------------------------------------------------------------===//
1121
1122// Load FP integer
1123def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>;
1124def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>;
1125
1126// Extract biased exponent
1127def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>;
1128def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>;
1129
1130// Extract significance
1131def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>;
1132def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>;
1133
1134//===----------------------------------------------------------------------===//
1135// DFP: Binary arithmetic
1136//===----------------------------------------------------------------------===//
1137
1138// Addition
1139def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>;
1140def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>;
1141
1142// Subtraction
1143def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>;
1144def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>;
1145
1146// Multiply
1147def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>;
1148def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>;
1149
1150// Division
1151def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>;
1152def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>;
1153
1154// Quantize
1155def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>;
1156def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>;
1157
1158// Reround
1159def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>;
1160def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone2], (instregex "RRXTR$")>;
1161
1162// Shift significand left/right
1163def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>;
1164def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
1165
1166// Insert biased exponent
1167def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>;
1168def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "IEXTR$")>;
1169
1170//===----------------------------------------------------------------------===//
1171// DFP: Comparisons
1172//===----------------------------------------------------------------------===//
1173
1174// Compare
1175def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>;
1176def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>;
1177
1178// Compare biased exponent
1179def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>;
1180def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>;
1181
1182// Test Data Class/Group
1183def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>;
1184def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
1185
1186
1187// --------------------------------- Vector --------------------------------- //
1188
1189//===----------------------------------------------------------------------===//
1190// Vector: Move instructions
1191//===----------------------------------------------------------------------===//
1192
1193def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
1194def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
1195def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
1196def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
1197
1198//===----------------------------------------------------------------------===//
1199// Vector: Immediate instructions
1200//===----------------------------------------------------------------------===//
1201
1202def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
1203def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;
1204def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>;
1205def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>;
1206def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>;
1207def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>;
1208
1209//===----------------------------------------------------------------------===//
1210// Vector: Loads
1211//===----------------------------------------------------------------------===//
1212
1213def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(BB)?$")>;
1214def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLL$")>;
1215def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>;
1216def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H|LF)?$")>;
1217def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>;
1218def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
1219             (instregex "VLE(B|F|G|H)$")>;
1220def : InstRW<[WLat5LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked],
1221             (instregex "VGE(F|G)$")>;
1222def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone], (instregex "VLM$")>;
1223def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLRL(R)?$")>;
1224
1225//===----------------------------------------------------------------------===//
1226// Vector: Stores
1227//===----------------------------------------------------------------------===//
1228
1229def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(L|32|64)?$")>;
1230def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>;
1231def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>;
1232def : InstRW<[WLat1, LSU2, FXb3, GroupAlone2], (instregex "VSTM$")>;
1233def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>;
1234def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTRL(R)?$")>;
1235
1236//===----------------------------------------------------------------------===//
1237// Vector: Selects and permutes
1238//===----------------------------------------------------------------------===//
1239
1240def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>;
1241def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>;
1242def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>;
1243def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>;
1244def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VBPERM$")>;
1245def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>;
1246def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>;
1247
1248//===----------------------------------------------------------------------===//
1249// Vector: Widening and narrowing
1250//===----------------------------------------------------------------------===//
1251
1252def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>;
1253def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>;
1254def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>;
1255def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>;
1256def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>;
1257def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>;
1258def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>;
1259def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>;
1260def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>;
1261def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>;
1262
1263//===----------------------------------------------------------------------===//
1264// Vector: Integer arithmetic
1265//===----------------------------------------------------------------------===//
1266
1267def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>;
1268def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>;
1269def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>;
1270def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>;
1271def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O|N|X)?$")>;
1272def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO(C)?$")>;
1273def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>;
1274def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>;
1275def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>;
1276def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>;
1277def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>;
1278def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>;
1279def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>;
1280def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>;
1281def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>;
1282def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>;
1283def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>;
1284def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>;
1285def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>;
1286def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>;
1287def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>;
1288def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>;
1289def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>;
1290def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>;
1291def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>;
1292def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>;
1293def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>;
1294def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>;
1295def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>;
1296def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>;
1297def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>;
1298def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>;
1299def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>;
1300def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VMSL(G)?$")>;
1301
1302def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT(B|F|G|H)?$")>;
1303
1304def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>;
1305def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>;
1306def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>;
1307def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>;
1308def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>;
1309def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>;
1310def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>;
1311def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>;
1312def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>;
1313
1314def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>;
1315def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLB$")>;
1316def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1317def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>;
1318
1319def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>;
1320def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>;
1321def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>;
1322
1323def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>;
1324def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>;
1325def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>;
1326
1327//===----------------------------------------------------------------------===//
1328// Vector: Integer comparison
1329//===----------------------------------------------------------------------===//
1330
1331def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>;
1332def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>;
1333def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1334def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
1335def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>;
1336def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>;
1337def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>;
1338def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>;
1339def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
1340
1341//===----------------------------------------------------------------------===//
1342// Vector: Floating-point arithmetic
1343//===----------------------------------------------------------------------===//
1344
1345// Conversion and rounding
1346def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VCD(L)?G$")>;
1347def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VCD(L)?GB$")>;
1348def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WCD(L)?GB$")>;
1349def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VC(L)?GD$")>;
1350def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VC(L)?GDB$")>;
1351def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WC(L)?GDB$")>;
1352def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VL(DE|ED)$")>;
1353def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VL(DE|ED)B$")>;
1354def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>;
1355def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFL(L|R)$")>;
1356def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFL(LS|RD)$")>;
1357def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFL(LS|RD)$")>;
1358def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "WFLLD$")>;
1359def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFLRX$")>;
1360def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFI$")>;
1361def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFIDB$")>;
1362def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFIDB$")>;
1363def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFISB$")>;
1364def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFISB$")>;
1365def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFIXB$")>;
1366
1367// Sign operations
1368def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>;
1369def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>;
1370def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSOSB$")>;
1371def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFPSOXB$")>;
1372def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>;
1373def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)SB$")>;
1374def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFL(C|N|P)XB$")>;
1375
1376// Minimum / maximum
1377def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)$")>;
1378def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)DB$")>;
1379def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)DB$")>;
1380def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)SB$")>;
1381def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)SB$")>;
1382def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WF(MAX|MIN)XB$")>;
1383
1384// Test data class
1385def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>;
1386def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>;
1387def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCISB$")>;
1388def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFTCIXB$")>;
1389
1390// Add / subtract
1391def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)$")>;
1392def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VF(A|S)DB$")>;
1393def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)DB$")>;
1394def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)SB$")>;
1395def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)SB$")>;
1396def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WF(A|S)XB$")>;
1397
1398// Multiply / multiply-and-add/subtract
1399def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM$")>;
1400def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFMDB$")>;
1401def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(D|S)B$")>;
1402def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMSB$")>;
1403def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WFMXB$")>;
1404def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(N)?M(A|S)$")>;
1405def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>;
1406def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>;
1407def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(N)?M(A|S)SB$")>;
1408def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>;
1409def : InstRW<[WLat30, VecDF2, NormalGr], (instregex "WF(N)?M(A|S)XB$")>;
1410
1411// Divide / square root
1412def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>;
1413def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>;
1414def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDSB$")>;
1415def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFDXB$")>;
1416def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>;
1417def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>;
1418def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQSB$")>;
1419def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFSQXB$")>;
1420
1421//===----------------------------------------------------------------------===//
1422// Vector: Floating-point comparison
1423//===----------------------------------------------------------------------===//
1424
1425def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)$")>;
1426def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)DB$")>;
1427def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>;
1428def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)DB$")>;
1429def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)SB$")>;
1430def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SB$")>;
1431def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SB$")>;
1432def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XB$")>;
1433def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XB$")>;
1434def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>;
1435def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFK(E|H|HE)DBS$")>;
1436def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr],
1437             (instregex "WF(C|K)(E|H|HE)DBS$")>;
1438def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr],
1439             (instregex "VF(C|K)(E|H|HE)SBS$")>;
1440def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SBS$")>;
1441def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SBS$")>;
1442def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XBS$")>;
1443def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XBS$")>;
1444def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>;
1445def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>;
1446def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)SB$")>;
1447def : InstRW<[WLat3, VecDFX, NormalGr], (instregex "WF(C|K)XB$")>;
1448
1449//===----------------------------------------------------------------------===//
1450// Vector: Floating-point insertion and extraction
1451//===----------------------------------------------------------------------===//
1452
1453def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>;
1454def : InstRW<[WLat3, FXb, NormalGr], (instregex "LFER$")>;
1455
1456//===----------------------------------------------------------------------===//
1457// Vector: String instructions
1458//===----------------------------------------------------------------------===//
1459
1460def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>;
1461def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>;
1462def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>;
1463def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>;
1464def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>;
1465def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>;
1466def : InstRW<[WLat4, WLat4, VecStr, NormalGr],
1467             (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>;
1468def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>;
1469def : InstRW<[WLat4, WLat4, VecStr, NormalGr],
1470             (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>;
1471def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>;
1472def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>;
1473def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>;
1474def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>;
1475def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>;
1476def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>;
1477
1478//===----------------------------------------------------------------------===//
1479// Vector: Packed-decimal instructions
1480//===----------------------------------------------------------------------===//
1481
1482def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "VLIP$")>;
1483def : InstRW<[WLat6, VecDFX, LSU, GroupAlone2], (instregex "VPKZ$")>;
1484def : InstRW<[WLat1, VecDFX, FXb, LSU, Cracked], (instregex "VUPKZ$")>;
1485def : InstRW<[WLat20, WLat20, VecDF2, FXb, GroupAlone], (instregex "VCVB(G)?$")>;
1486def : InstRW<[WLat20, WLat20, VecDF2, FXb, GroupAlone], (instregex "VCVD(G)?$")>;
1487def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "V(A|S)P$")>;
1488def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "VM(S)?P$")>;
1489def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "V(D|R)P$")>;
1490def : InstRW<[WLat30, WLat30, MCD], (instregex "VSDP$")>;
1491def : InstRW<[WLat10, WLat10, VecDF2, NormalGr], (instregex "VSRP$")>;
1492def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "VPSOP$")>;
1493def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "V(T|C)P$")>;
1494
1495
1496// -------------------------------- System ---------------------------------- //
1497
1498//===----------------------------------------------------------------------===//
1499// System: Program-Status Word Instructions
1500//===----------------------------------------------------------------------===//
1501
1502def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>;
1503def : InstRW<[WLat20, GroupAlone3], (instregex "LPSW(E)?$")>;
1504def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>;
1505def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>;
1506def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>;
1507def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;
1508def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>;
1509def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>;
1510
1511//===----------------------------------------------------------------------===//
1512// System: Control Register Instructions
1513//===----------------------------------------------------------------------===//
1514
1515def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>;
1516def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STCT(L|G)$")>;
1517def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>;
1518def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>;
1519def : InstRW<[WLat30, MCD], (instregex "ESEA$")>;
1520
1521//===----------------------------------------------------------------------===//
1522// System: Prefix-Register Instructions
1523//===----------------------------------------------------------------------===//
1524
1525def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>;
1526
1527//===----------------------------------------------------------------------===//
1528// System: Storage-Key and Real Memory Instructions
1529//===----------------------------------------------------------------------===//
1530
1531def : InstRW<[WLat30, MCD], (instregex "ISKE$")>;
1532def : InstRW<[WLat30, MCD], (instregex "IVSK$")>;
1533def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>;
1534def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>;
1535def : InstRW<[WLat30, MCD], (instregex "IRBM$")>;
1536def : InstRW<[WLat30, MCD], (instregex "PFMF$")>;
1537def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>;
1538def : InstRW<[WLat30, MCD], (instregex "PGIN$")>;
1539def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>;
1540
1541//===----------------------------------------------------------------------===//
1542// System: Dynamic-Address-Translation Instructions
1543//===----------------------------------------------------------------------===//
1544
1545def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>;
1546def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>;
1547def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>;
1548def : InstRW<[WLat30, MCD], (instregex "PTLB$")>;
1549def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>;
1550def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>;
1551def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>;
1552def : InstRW<[WLat30, MCD], (instregex "STRAG$")>;
1553def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>;
1554def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>;
1555def : InstRW<[WLat30, MCD], (instregex "TPROT$")>;
1556
1557//===----------------------------------------------------------------------===//
1558// System: Memory-move Instructions
1559//===----------------------------------------------------------------------===//
1560
1561def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;
1562def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;
1563def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>;
1564def : InstRW<[WLat30, MCD], (instregex "MVPG$")>;
1565
1566//===----------------------------------------------------------------------===//
1567// System: Address-Space Instructions
1568//===----------------------------------------------------------------------===//
1569
1570def : InstRW<[WLat30, MCD], (instregex "LASP$")>;
1571def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>;
1572def : InstRW<[WLat30, MCD], (instregex "PC$")>;
1573def : InstRW<[WLat30, MCD], (instregex "PR$")>;
1574def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>;
1575def : InstRW<[WLat30, MCD], (instregex "RP$")>;
1576def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>;
1577def : InstRW<[WLat30, MCD], (instregex "TAR$")>;
1578
1579//===----------------------------------------------------------------------===//
1580// System: Linkage-Stack Instructions
1581//===----------------------------------------------------------------------===//
1582
1583def : InstRW<[WLat30, MCD], (instregex "BAKR$")>;
1584def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>;
1585def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>;
1586
1587//===----------------------------------------------------------------------===//
1588// System: Time-Related Instructions
1589//===----------------------------------------------------------------------===//
1590
1591def : InstRW<[WLat30, MCD], (instregex "PTFF$")>;
1592def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>;
1593def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>;
1594def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone2], (instregex "STCK(F)?$")>;
1595def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone3], (instregex "STCKE$")>;
1596def : InstRW<[WLat30, MCD], (instregex "STCKC$")>;
1597def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>;
1598
1599//===----------------------------------------------------------------------===//
1600// System: CPU-Related Instructions
1601//===----------------------------------------------------------------------===//
1602
1603def : InstRW<[WLat30, MCD], (instregex "STAP$")>;
1604def : InstRW<[WLat30, MCD], (instregex "STIDP$")>;
1605def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>;
1606def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>;
1607def : InstRW<[WLat30, MCD], (instregex "ECAG$")>;
1608def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>;
1609def : InstRW<[WLat30, MCD], (instregex "PTF$")>;
1610def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>;
1611
1612//===----------------------------------------------------------------------===//
1613// System: Miscellaneous Instructions
1614//===----------------------------------------------------------------------===//
1615
1616def : InstRW<[WLat30, MCD], (instregex "SVC$")>;
1617def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>;
1618def : InstRW<[WLat30, MCD], (instregex "DIAG$")>;
1619def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>;
1620def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>;
1621def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>;
1622def : InstRW<[WLat30, MCD], (instregex "SIE$")>;
1623
1624//===----------------------------------------------------------------------===//
1625// System: CPU-Measurement Facility Instructions
1626//===----------------------------------------------------------------------===//
1627
1628def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>;
1629def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>;
1630def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>;
1631def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>;
1632def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>;
1633def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>;
1634def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>;
1635
1636//===----------------------------------------------------------------------===//
1637// System: I/O Instructions
1638//===----------------------------------------------------------------------===//
1639
1640def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>;
1641def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
1642def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
1643def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
1644def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
1645def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
1646def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
1647
1648}
1649
1650