1//-- SystemZScheduleZ13.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the machine model for Z13 to support instruction
11// scheduling and other instruction cost heuristics.
12//
13// Pseudos expanded right after isel do not need to be modelled here.
14//
15//===----------------------------------------------------------------------===//
16
17def Z13Model : SchedMachineModel {
18
19    let UnsupportedFeatures = Arch11UnsupportedFeatures.List;
20
21    let IssueWidth = 6;             // Number of instructions decoded per cycle.
22    let MicroOpBufferSize = 60;     // Issue queues
23    let LoadLatency = 1;            // Optimistic load latency.
24
25    let PostRAScheduler = 1;
26
27    // Extra cycles for a mispredicted branch.
28    let MispredictPenalty = 20;
29}
30
31let SchedModel = Z13Model in  {
32// These definitions need the SchedModel value. They could be put in a
33// subtarget common include file, but it seems the include system in Tablegen
34// currently (2016) rejects multiple includes of same file.
35
36// Decoder grouping rules
37let NumMicroOps = 1 in {
38  def : WriteRes<NormalGr, []>;
39  def : WriteRes<BeginGroup, []> { let BeginGroup  = 1; }
40  def : WriteRes<EndGroup, []>   { let EndGroup    = 1; }
41}
42def : WriteRes<Cracked, []> {
43  let NumMicroOps = 2;
44  let BeginGroup  = 1;
45}
46def : WriteRes<GroupAlone, []> {
47  let NumMicroOps = 3;
48  let BeginGroup  = 1;
49  let EndGroup    = 1;
50}
51def : WriteRes<GroupAlone2, []> {
52  let NumMicroOps = 6;
53  let BeginGroup  = 1;
54  let EndGroup    = 1;
55}
56def : WriteRes<GroupAlone3, []> {
57  let NumMicroOps = 9;
58  let BeginGroup  = 1;
59  let EndGroup    = 1;
60}
61
62// Incoming latency removed from the register operand which is used together
63// with a memory operand by the instruction.
64def : ReadAdvance<RegReadAdv, 4>;
65
66// LoadLatency (above) is not used for instructions in this file. This is
67// instead the role of LSULatency, which is the latency value added to the
68// result of loads and instructions with folded memory operands.
69def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; }
70
71let NumMicroOps = 0 in {
72  foreach L = 1-30 in
73    def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; }
74}
75
76// Execution units.
77def Z13_FXaUnit     : ProcResource<2>;
78def Z13_FXbUnit     : ProcResource<2>;
79def Z13_LSUnit      : ProcResource<2>;
80def Z13_VecUnit     : ProcResource<2>;
81def Z13_VecFPdUnit  : ProcResource<2> { let BufferSize = 1; /* blocking */ }
82def Z13_VBUnit      : ProcResource<2>;
83def Z13_MCD         : ProcResource<1>;
84
85// Subtarget specific definitions of scheduling resources.
86let NumMicroOps = 0 in {
87  def : WriteRes<FXa, [Z13_FXaUnit]>;
88  def : WriteRes<FXb, [Z13_FXbUnit]>;
89  def : WriteRes<LSU, [Z13_LSUnit]>;
90  def : WriteRes<VecBF,  [Z13_VecUnit]>;
91  def : WriteRes<VecDF,  [Z13_VecUnit]>;
92  def : WriteRes<VecDFX, [Z13_VecUnit]>;
93  def : WriteRes<VecMul,  [Z13_VecUnit]>;
94  def : WriteRes<VecStr,  [Z13_VecUnit]>;
95  def : WriteRes<VecXsPm, [Z13_VecUnit]>;
96  foreach Num = 2-5 in { let ResourceCycles = [Num] in {
97    def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z13_FXaUnit]>;
98    def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z13_FXbUnit]>;
99    def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z13_LSUnit]>;
100    def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z13_VecUnit]>;
101    def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z13_VecUnit]>;
102    def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z13_VecUnit]>;
103    def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z13_VecUnit]>;
104    def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z13_VecUnit]>;
105    def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z13_VecUnit]>;
106  }}
107
108  def : WriteRes<VecFPd,  [Z13_VecFPdUnit]> { let ResourceCycles = [30]; }
109
110  def : WriteRes<VBU,     [Z13_VBUnit]>; // Virtual Branching Unit
111}
112
113def : WriteRes<MCD, [Z13_MCD]> { let NumMicroOps = 3;
114                                 let BeginGroup  = 1;
115                                 let EndGroup    = 1; }
116
117// -------------------------- INSTRUCTIONS ---------------------------------- //
118
119// InstRW constructs have been used in order to preserve the
120// readability of the InstrInfo files.
121
122// For each instruction, as matched by a regexp, provide a list of
123// resources that it needs. These will be combined into a SchedClass.
124
125//===----------------------------------------------------------------------===//
126// Stack allocation
127//===----------------------------------------------------------------------===//
128
129// Pseudo -> LA / LAY
130def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>;
131
132//===----------------------------------------------------------------------===//
133// Branch instructions
134//===----------------------------------------------------------------------===//
135
136// Branch
137def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;
138def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>;
139def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>;
140def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>;
141def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>;
142def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>;
143def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>;
144def : InstRW<[WLat1, FXa2, FXb2, GroupAlone2],
145             (instregex "B(R)?X(H|L).*$")>;
146
147// Compare and branch
148def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;
149def : InstRW<[WLat1, FXb2, GroupAlone],
150             (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;
151
152//===----------------------------------------------------------------------===//
153// Trap instructions
154//===----------------------------------------------------------------------===//
155
156// Trap
157def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>;
158
159// Compare and trap
160def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>;
161def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>;
162def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>;
163def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>;
164
165//===----------------------------------------------------------------------===//
166// Call and return instructions
167//===----------------------------------------------------------------------===//
168
169// Call
170def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>;
171def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL$")>;
172def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?$")>;
173def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;
174
175// Return
176def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return$")>;
177def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn$")>;
178
179//===----------------------------------------------------------------------===//
180// Move instructions
181//===----------------------------------------------------------------------===//
182
183// Moves
184def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>;
185def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>;
186
187// Move character
188def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
189def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>;
190
191// Pseudo -> reg move
192def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>;
193def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>;
194def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>;
195def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>;
196
197// Loads
198def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>;
199def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>;
200def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>;
201def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
202
203def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>;
204def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>;
205
206def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>;
207def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>;
208def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR(Mux)?$")>;
209
210// Load and zero rightmost byte
211def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>;
212
213// Load and trap
214def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>;
215
216// Load and test
217def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>;
218def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>;
219
220// Stores
221def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>;
222def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>;
223def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>;
224
225// String moves.
226def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>;
227
228//===----------------------------------------------------------------------===//
229// Conditional move instructions
230//===----------------------------------------------------------------------===//
231
232def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>;
233def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>;
234def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>;
235def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
236             (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>;
237def : InstRW<[WLat1, FXb, LSU, NormalGr],
238             (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>;
239
240//===----------------------------------------------------------------------===//
241// Sign extensions
242//===----------------------------------------------------------------------===//
243
244def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>;
245def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>;
246
247def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>;
248def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>;
249
250def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>;
251def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>;
252def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>;
253def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>;
254def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>;
255
256//===----------------------------------------------------------------------===//
257// Zero extensions
258//===----------------------------------------------------------------------===//
259
260def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>;
261def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>;
262def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>;
263def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>;
264def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>;
265def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>;
266def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>;
267def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;
268
269// Load and zero rightmost byte
270def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>;
271
272// Load and trap
273def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>;
274
275//===----------------------------------------------------------------------===//
276// Truncations
277//===----------------------------------------------------------------------===//
278
279def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>;
280def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
281def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>;
282
283//===----------------------------------------------------------------------===//
284// Multi-register moves
285//===----------------------------------------------------------------------===//
286
287// Load multiple (estimated average of 5 ops)
288def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>;
289
290// Load multiple disjoint
291def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>;
292
293// Store multiple
294def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;
295
296//===----------------------------------------------------------------------===//
297// Byte swaps
298//===----------------------------------------------------------------------===//
299
300def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>;
301def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>;
302def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>;
303def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>;
304
305//===----------------------------------------------------------------------===//
306// Load address instructions
307//===----------------------------------------------------------------------===//
308
309def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>;
310
311// Load the Global Offset Table address ( -> larl )
312def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>;
313
314//===----------------------------------------------------------------------===//
315// Absolute and Negation
316//===----------------------------------------------------------------------===//
317
318def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LP(G)?R$")>;
319def : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "L(N|P)GFR$")>;
320def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LN(R|GR)$")>;
321def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>;
322def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>;
323
324//===----------------------------------------------------------------------===//
325// Insertion
326//===----------------------------------------------------------------------===//
327
328def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>;
329def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
330             (instregex "IC32(Y)?$")>;
331def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr],
332             (instregex "ICM(H|Y)?$")>;
333def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>;
334def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>;
335def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>;
336def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>;
337def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>;
338def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>;
339def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>;
340
341//===----------------------------------------------------------------------===//
342// Addition
343//===----------------------------------------------------------------------===//
344
345def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
346             (instregex "A(Y)?$")>;
347def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
348             (instregex "AH(Y)?$")>;
349def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>;
350def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>;
351def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
352             (instregex "AG$")>;
353def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>;
354def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>;
355def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>;
356def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>;
357def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>;
358def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
359             (instregex "AL(Y)?$")>;
360def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>;
361def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
362             (instregex "ALG(F)?$")>;
363def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>;
364def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>;
365def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>;
366def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>;
367def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>;
368def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>;
369def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>;
370def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>;
371def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>;
372
373// Logical addition with carry
374def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
375             (instregex "ALC(G)?$")>;
376def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>;
377
378// Add with sign extension (32 -> 64)
379def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
380             (instregex "AGF$")>;
381def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>;
382
383//===----------------------------------------------------------------------===//
384// Subtraction
385//===----------------------------------------------------------------------===//
386
387def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
388             (instregex "S(G|Y)?$")>;
389def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
390             (instregex "SH(Y)?$")>;
391def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>;
392def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>;
393def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
394             (instregex "SL(G|GF|Y)?$")>;
395def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>;
396def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>;
397def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>;
398def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>;
399def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>;
400def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>;
401
402// Subtraction with borrow
403def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
404             (instregex "SLB(G)?$")>;
405def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>;
406
407// Subtraction with sign extension (32 -> 64)
408def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
409             (instregex "SGF$")>;
410def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>;
411
412//===----------------------------------------------------------------------===//
413// AND
414//===----------------------------------------------------------------------===//
415
416def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
417             (instregex "N(G|Y)?$")>;
418def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>;
419def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>;
420def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>;
421def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>;
422def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>;
423def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>;
424def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>;
425def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>;
426def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>;
427def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>;
428def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>;
429
430//===----------------------------------------------------------------------===//
431// OR
432//===----------------------------------------------------------------------===//
433
434def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
435             (instregex "O(G|Y)?$")>;
436def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>;
437def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>;
438def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>;
439def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>;
440def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>;
441def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>;
442def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>;
443def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>;
444def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>;
445def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>;
446def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>;
447
448//===----------------------------------------------------------------------===//
449// XOR
450//===----------------------------------------------------------------------===//
451
452def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
453             (instregex "X(G|Y)?$")>;
454def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>;
455def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>;
456def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>;
457def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>;
458def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>;
459def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>;
460def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>;
461
462//===----------------------------------------------------------------------===//
463// Multiplication
464//===----------------------------------------------------------------------===//
465
466def : InstRW<[WLat6LSU, RegReadAdv, FXa, LSU, NormalGr],
467             (instregex "MS(GF|Y)?$")>;
468def : InstRW<[WLat6, FXa, NormalGr], (instregex "MS(R|FI)$")>;
469def : InstRW<[WLat8LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>;
470def : InstRW<[WLat8, FXa, NormalGr], (instregex "MSGR$")>;
471def : InstRW<[WLat6, FXa, NormalGr], (instregex "MSGF(I|R)$")>;
472def : InstRW<[WLat11LSU, RegReadAdv, FXa2, LSU, GroupAlone],
473             (instregex "MLG$")>;
474def : InstRW<[WLat9, FXa2, GroupAlone], (instregex "MLGR$")>;
475def : InstRW<[WLat5, FXa, NormalGr], (instregex "MGHI$")>;
476def : InstRW<[WLat5, FXa, NormalGr], (instregex "MHI$")>;
477def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>;
478def : InstRW<[WLat7, FXa2, GroupAlone], (instregex "M(L)?R$")>;
479def : InstRW<[WLat7LSU, RegReadAdv, FXa2, LSU, GroupAlone],
480             (instregex "M(FY|L)?$")>;
481
482//===----------------------------------------------------------------------===//
483// Division and remainder
484//===----------------------------------------------------------------------===//
485
486def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>;
487def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "D$")>;
488def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>;
489def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone2],
490             (instregex "DSG(F)?$")>;
491def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>;
492def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>;
493def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "DL(G)?$")>;
494
495//===----------------------------------------------------------------------===//
496// Shifts
497//===----------------------------------------------------------------------===//
498
499def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>;
500def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>;
501def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>;
502def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>;
503def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],
504             (instregex "S(L|R)D(A|L)$")>;
505
506// Rotate
507def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
508
509// Rotate and insert
510def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
511def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
512def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
513def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
514
515// Rotate and Select
516def : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>;
517
518//===----------------------------------------------------------------------===//
519// Comparison
520//===----------------------------------------------------------------------===//
521
522def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
523             (instregex "C(G|Y|Mux)?$")>;
524def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>;
525def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>;
526def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>;
527def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>;
528def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>;
529def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>;
530def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>;
531def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>;
532def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
533             (instregex "CL(Y|Mux)?$")>;
534def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>;
535def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>;
536def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>;
537def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>;
538def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>;
539def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>;
540def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>;
541def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>;
542def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>;
543def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>;
544def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>;
545def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>;
546def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>;
547def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>;
548def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>;
549def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>;
550def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>;
551
552// Compare halfword
553def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>;
554def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>;
555def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;
556def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>;
557def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>;
558
559// Compare with sign extension (32 -> 64)
560def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>;
561def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>;
562def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>;
563
564// Compare logical character
565def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>;
566def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>;
567def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>;
568
569// Test under mask
570def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>;
571def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>;
572def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>;
573def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>;
574def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>;
575def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>;
576
577// Compare logical characters under mask
578def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr],
579             (instregex "CLM(H|Y)?$")>;
580
581//===----------------------------------------------------------------------===//
582// Prefetch and execution hint
583//===----------------------------------------------------------------------===//
584
585def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>;
586def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>;
587def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>;
588def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>;
589
590//===----------------------------------------------------------------------===//
591// Atomic operations
592//===----------------------------------------------------------------------===//
593
594def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>;
595
596def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>;
597def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>;
598def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>;
599def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>;
600def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>;
601
602// Test and set
603def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>;
604
605// Compare and swap
606def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone],
607             (instregex "CS(G|Y)?$")>;
608
609// Compare double and swap
610def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone2],
611             (instregex "CDS(Y)?$")>;
612def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3, GroupAlone3],
613             (instregex "CDSG$")>;
614
615// Compare and swap and store
616def : InstRW<[WLat30, MCD], (instregex "CSST$")>;
617
618// Perform locked operation
619def : InstRW<[WLat30, MCD], (instregex "PLO$")>;
620
621// Load/store pair from/to quadword
622def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>;
623def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>;
624
625// Load pair disjoint
626def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>;
627
628//===----------------------------------------------------------------------===//
629// Translate and convert
630//===----------------------------------------------------------------------===//
631
632def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>;
633def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone2],
634             (instregex "TRT$")>;
635def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>;
636def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>;
637def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>;
638def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>;
639def : InstRW<[WLat30, WLat30, WLat30, MCD],
640             (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
641def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
642
643//===----------------------------------------------------------------------===//
644// Message-security assist
645//===----------------------------------------------------------------------===//
646
647def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD],
648             (instregex "KM(C|F|O|CTR)?$")>;
649def : InstRW<[WLat30, WLat30, WLat30, MCD],
650             (instregex "(KIMD|KLMD|KMAC|PCC|PPNO)$")>;
651
652//===----------------------------------------------------------------------===//
653// Decimal arithmetic
654//===----------------------------------------------------------------------===//
655
656def : InstRW<[WLat30, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone2],
657             (instregex "CVBG$")>;
658def : InstRW<[WLat30, RegReadAdv, FXb, VecDF, LSU, GroupAlone2],
659             (instregex "CVB(Y)?$")>;
660def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone3], (instregex "CVDG$")>;
661def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone2], (instregex "CVD(Y)?$")>;
662def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>;
663def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
664def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>;
665def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>;
666
667def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone2],
668             (instregex "(A|S|ZA)P$")>;
669def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone2], (instregex "(M|D)P$")>;
670def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone3], (instregex "SRP$")>;
671def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>;
672def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>;
673def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>;
674
675//===----------------------------------------------------------------------===//
676// Access registers
677//===----------------------------------------------------------------------===//
678
679// Extract/set/copy access register
680def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>;
681
682// Load address extended
683def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>;
684
685// Load/store access multiple (not modeled precisely)
686def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>;
687def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STAM(Y)?$")>;
688
689//===----------------------------------------------------------------------===//
690// Program mask and addressing mode
691//===----------------------------------------------------------------------===//
692
693// Insert Program Mask
694def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>;
695
696// Set Program Mask
697def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>;
698
699// Branch and link
700def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>;
701
702// Test addressing mode
703def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>;
704
705// Set addressing mode
706def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>;
707
708// Branch (and save) and set mode.
709def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>;
710def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>;
711
712//===----------------------------------------------------------------------===//
713// Transactional execution
714//===----------------------------------------------------------------------===//
715
716// Transaction begin
717def : InstRW<[WLat9, LSU2, FXb5, GroupAlone2], (instregex "TBEGIN(C)?$")>;
718
719// Transaction end
720def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>;
721
722// Transaction abort
723def : InstRW<[WLat30, MCD], (instregex "TABORT$")>;
724
725// Extract Transaction Nesting Depth
726def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>;
727
728// Nontransactional store
729def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>;
730
731//===----------------------------------------------------------------------===//
732// Processor assist
733//===----------------------------------------------------------------------===//
734
735def : InstRW<[WLat30, MCD], (instregex "PPA$")>;
736
737//===----------------------------------------------------------------------===//
738// Miscellaneous Instructions.
739//===----------------------------------------------------------------------===//
740
741// Find leftmost one
742def : InstRW<[WLat7, WLat7, FXa2, GroupAlone], (instregex "FLOGR$")>;
743
744// Population count
745def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT$")>;
746
747// String instructions
748def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>;
749def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>;
750
751// Various complex instructions
752def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>;
753def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD],
754             (instregex "UPT$")>;
755def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>;
756def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>;
757
758// Execute
759def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>;
760
761//===----------------------------------------------------------------------===//
762// .insn directive instructions
763//===----------------------------------------------------------------------===//
764
765// An "empty" sched-class will be assigned instead of the "invalid sched-class".
766// getNumDecoderSlots() will then return 1 instead of 0.
767def : InstRW<[], (instregex "Insn.*")>;
768
769
770// ----------------------------- Floating point ----------------------------- //
771
772//===----------------------------------------------------------------------===//
773// FP: Move instructions
774//===----------------------------------------------------------------------===//
775
776// Load zero
777def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>;
778def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>;
779
780// Load
781def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>;
782def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
783def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>;
784def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>;
785
786// Load and Test
787def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>;
788def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BRCompare$")>;
789def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone],
790             (instregex "LTXBR(Compare)?$")>;
791
792// Copy sign
793def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>;
794
795//===----------------------------------------------------------------------===//
796// FP: Load instructions
797//===----------------------------------------------------------------------===//
798
799def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>;
800def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>;
801def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>;
802
803//===----------------------------------------------------------------------===//
804// FP: Store instructions
805//===----------------------------------------------------------------------===//
806
807def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>;
808def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>;
809
810//===----------------------------------------------------------------------===//
811// FP: Conversion instructions
812//===----------------------------------------------------------------------===//
813
814// Load rounded
815def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEDBR(A)?$")>;
816def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>;
817
818// Load lengthened
819def : InstRW<[WLat7LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>;
820def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LDEBR$")>;
821def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>;
822def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>;
823
824// Convert from fixed / logical
825def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>;
826def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)BR(A)?$")>;
827def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>;
828def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)BR$")>;
829
830// Convert to fixed / logical
831def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked],
832             (instregex "C(F|G)(E|D)BR(A)?$")>;
833def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked],
834             (instregex "C(F|G)XBR(A)?$")>;
835def : InstRW<[WLat10, WLat10, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>;
836def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLFDBR$")>;
837def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>;
838def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>;
839
840//===----------------------------------------------------------------------===//
841// FP: Unary arithmetic
842//===----------------------------------------------------------------------===//
843
844// Load Complement / Negative / Positive
845def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>;
846def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>;
847def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>;
848
849// Square root
850def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>;
851def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>;
852def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>;
853
854// Load FP integer
855def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>;
856def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>;
857
858//===----------------------------------------------------------------------===//
859// FP: Binary arithmetic
860//===----------------------------------------------------------------------===//
861
862// Addition
863def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
864             (instregex "A(E|D)B$")>;
865def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D)BR$")>;
866def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>;
867
868// Subtraction
869def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
870             (instregex "S(E|D)B$")>;
871def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D)BR$")>;
872def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>;
873
874// Multiply
875def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
876             (instregex "M(D|DE|EE)B$")>;
877def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>;
878def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
879             (instregex "MXDB$")>;
880def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDBR$")>;
881def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>;
882
883// Multiply and add / subtract
884def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
885             (instregex "M(A|S)EB$")>;
886def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>;
887def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
888             (instregex "M(A|S)DB$")>;
889def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(A|S)DBR$")>;
890
891// Division
892def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
893             (instregex "D(E|D)B$")>;
894def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>;
895def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>;
896
897// Divide to integer
898def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>;
899
900//===----------------------------------------------------------------------===//
901// FP: Comparisons
902//===----------------------------------------------------------------------===//
903
904// Compare
905def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
906             (instregex "(K|C)(E|D)B$")>;
907def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>;
908def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>;
909
910// Test Data Class
911def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>;
912def : InstRW<[WLat10, LSU, VecDF4, GroupAlone], (instregex "TCXB$")>;
913
914//===----------------------------------------------------------------------===//
915// FP: Floating-point control register instructions
916//===----------------------------------------------------------------------===//
917
918def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>;
919def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>;
920def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>;
921def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>;
922def : InstRW<[WLat30, MCD], (instregex "SFASR$")>;
923def : InstRW<[WLat30, MCD], (instregex "LFAS$")>;
924def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>;
925
926
927// --------------------- Hexadecimal floating point ------------------------- //
928
929//===----------------------------------------------------------------------===//
930// HFP: Move instructions
931//===----------------------------------------------------------------------===//
932
933// Load and Test
934def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>;
935def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>;
936
937//===----------------------------------------------------------------------===//
938// HFP: Conversion instructions
939//===----------------------------------------------------------------------===//
940
941// Load rounded
942def : InstRW<[WLat7, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>;
943def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEXR$")>;
944def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>;
945
946// Load lengthened
947def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>;
948def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>;
949def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>;
950def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>;
951
952// Convert from fixed
953def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>;
954def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)R$")>;
955
956// Convert to fixed
957def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>;
958def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>;
959
960// Convert BFP to HFP / HFP to BFP.
961def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "THD(E)?R$")>;
962def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "TB(E)?DR$")>;
963
964//===----------------------------------------------------------------------===//
965// HFP: Unary arithmetic
966//===----------------------------------------------------------------------===//
967
968// Load Complement / Negative / Positive
969def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>;
970def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>;
971
972// Halve
973def : InstRW<[WLat7, VecBF, NormalGr], (instregex "H(E|D)R$")>;
974
975// Square root
976def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>;
977def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>;
978def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>;
979
980// Load FP integer
981def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)R$")>;
982def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>;
983
984//===----------------------------------------------------------------------===//
985// HFP: Binary arithmetic
986//===----------------------------------------------------------------------===//
987
988// Addition
989def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
990             (instregex "A(E|D|U|W)$")>;
991def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>;
992def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>;
993
994// Subtraction
995def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
996             (instregex "S(E|D|U|W)$")>;
997def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>;
998def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>;
999
1000// Multiply
1001def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1002             (instregex "M(D|DE|E|EE)$")>;
1003def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>;
1004def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
1005             (instregex "MXD$")>;
1006def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDR$")>;
1007def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>;
1008def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
1009             (instregex "MY$")>;
1010def : InstRW<[WLat7LSU, RegReadAdv, VecBF2, LSU, GroupAlone],
1011             (instregex "MY(H|L)$")>;
1012def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MYR$")>;
1013def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MY(H|L)R$")>;
1014
1015// Multiply and add / subtract
1016def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
1017             (instregex "M(A|S)(E|D)$")>;
1018def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>;
1019def : InstRW<[WLat8LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone],
1020             (instregex "MAY$")>;
1021def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
1022             (instregex "MAY(H|L)$")>;
1023def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MAYR$")>;
1024def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>;
1025
1026// Division
1027def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
1028             (instregex "D(E|D)$")>;
1029def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>;
1030def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>;
1031
1032//===----------------------------------------------------------------------===//
1033// HFP: Comparisons
1034//===----------------------------------------------------------------------===//
1035
1036// Compare
1037def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1038             (instregex "C(E|D)$")>;
1039def : InstRW<[WLat7, VecBF, NormalGr], (instregex "C(E|D)R$")>;
1040def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>;
1041
1042
1043// ------------------------ Decimal floating point -------------------------- //
1044
1045//===----------------------------------------------------------------------===//
1046// DFP: Move instructions
1047//===----------------------------------------------------------------------===//
1048
1049// Load and Test
1050def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>;
1051def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>;
1052
1053//===----------------------------------------------------------------------===//
1054// DFP: Conversion instructions
1055//===----------------------------------------------------------------------===//
1056
1057// Load rounded
1058def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>;
1059def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>;
1060
1061// Load lengthened
1062def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>;
1063def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>;
1064
1065// Convert from fixed / logical
1066def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CD(F|G)TR(A)?$")>;
1067def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)TR(A)?$")>;
1068def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDL(F|G)TR$")>;
1069def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)TR$")>;
1070
1071// Convert to fixed / logical
1072def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked],
1073             (instregex "C(F|G)DTR(A)?$")>;
1074def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked],
1075             (instregex "C(F|G)XTR(A)?$")>;
1076def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>;
1077def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>;
1078
1079// Convert from / to signed / unsigned packed
1080def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>;
1081def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone2], (instregex "CX(S|U)TR$")>;
1082def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>;
1083def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone2], (instregex "C(S|U)XTR$")>;
1084
1085// Convert from / to zoned
1086def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>;
1087def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXZT$")>;
1088def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>;
1089def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>;
1090
1091// Convert from / to packed
1092def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>;
1093def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXPT$")>;
1094def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>;
1095def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>;
1096
1097// Perform floating-point operation
1098def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>;
1099
1100//===----------------------------------------------------------------------===//
1101// DFP: Unary arithmetic
1102//===----------------------------------------------------------------------===//
1103
1104// Load FP integer
1105def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>;
1106def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>;
1107
1108// Extract biased exponent
1109def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>;
1110def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>;
1111
1112// Extract significance
1113def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>;
1114def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>;
1115
1116//===----------------------------------------------------------------------===//
1117// DFP: Binary arithmetic
1118//===----------------------------------------------------------------------===//
1119
1120// Addition
1121def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>;
1122def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>;
1123
1124// Subtraction
1125def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>;
1126def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>;
1127
1128// Multiply
1129def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>;
1130def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>;
1131
1132// Division
1133def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>;
1134def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>;
1135
1136// Quantize
1137def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>;
1138def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>;
1139
1140// Reround
1141def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>;
1142def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone2], (instregex "RRXTR$")>;
1143
1144// Shift significand left/right
1145def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>;
1146def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
1147
1148// Insert biased exponent
1149def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>;
1150def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "IEXTR$")>;
1151
1152//===----------------------------------------------------------------------===//
1153// DFP: Comparisons
1154//===----------------------------------------------------------------------===//
1155
1156// Compare
1157def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>;
1158def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>;
1159
1160// Compare biased exponent
1161def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>;
1162def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>;
1163
1164// Test Data Class/Group
1165def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>;
1166def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
1167
1168
1169// --------------------------------- Vector --------------------------------- //
1170
1171//===----------------------------------------------------------------------===//
1172// Vector: Move instructions
1173//===----------------------------------------------------------------------===//
1174
1175def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
1176def : InstRW<[WLat4, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
1177def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
1178def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
1179
1180//===----------------------------------------------------------------------===//
1181// Vector: Immediate instructions
1182//===----------------------------------------------------------------------===//
1183
1184def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
1185def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;
1186def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>;
1187def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>;
1188def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>;
1189def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>;
1190
1191//===----------------------------------------------------------------------===//
1192// Vector: Loads
1193//===----------------------------------------------------------------------===//
1194
1195def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(BB)?$")>;
1196def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLL$")>;
1197def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>;
1198def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H)?$")>;
1199def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>;
1200def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
1201             (instregex "VLE(B|F|G|H)$")>;
1202def : InstRW<[WLat6LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked],
1203             (instregex "VGE(F|G)$")>;
1204def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone], (instregex "VLM$")>;
1205
1206//===----------------------------------------------------------------------===//
1207// Vector: Stores
1208//===----------------------------------------------------------------------===//
1209
1210def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(L|32|64)?$")>;
1211def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>;
1212def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>;
1213def : InstRW<[WLat1, LSU2, FXb3, GroupAlone2], (instregex "VSTM$")>;
1214def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>;
1215
1216//===----------------------------------------------------------------------===//
1217// Vector: Selects and permutes
1218//===----------------------------------------------------------------------===//
1219
1220def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>;
1221def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>;
1222def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>;
1223def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>;
1224def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>;
1225def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>;
1226
1227//===----------------------------------------------------------------------===//
1228// Vector: Widening and narrowing
1229//===----------------------------------------------------------------------===//
1230
1231def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>;
1232def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>;
1233def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>;
1234def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>;
1235def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>;
1236def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>;
1237def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>;
1238def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>;
1239def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>;
1240def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>;
1241
1242//===----------------------------------------------------------------------===//
1243// Vector: Integer arithmetic
1244//===----------------------------------------------------------------------===//
1245
1246def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>;
1247def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>;
1248def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>;
1249def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>;
1250def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O)?$")>;
1251def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO$")>;
1252def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>;
1253def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>;
1254def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>;
1255def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>;
1256def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>;
1257def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>;
1258def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>;
1259def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>;
1260def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>;
1261def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>;
1262def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>;
1263def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>;
1264def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>;
1265def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>;
1266def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>;
1267def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>;
1268def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>;
1269def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>;
1270def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>;
1271def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>;
1272def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>;
1273def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>;
1274def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>;
1275def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>;
1276def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>;
1277def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>;
1278def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>;
1279
1280def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT$")>;
1281
1282def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>;
1283def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>;
1284def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>;
1285def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>;
1286def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>;
1287def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>;
1288def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>;
1289def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>;
1290def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>;
1291
1292def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>;
1293def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSLB$")>;
1294def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1295def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSR(A|L)B$")>;
1296
1297def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>;
1298def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>;
1299def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>;
1300
1301def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>;
1302def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>;
1303def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>;
1304
1305//===----------------------------------------------------------------------===//
1306// Vector: Integer comparison
1307//===----------------------------------------------------------------------===//
1308
1309def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>;
1310def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>;
1311def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1312def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
1313def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>;
1314def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>;
1315def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>;
1316def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>;
1317def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
1318
1319//===----------------------------------------------------------------------===//
1320// Vector: Floating-point arithmetic
1321//===----------------------------------------------------------------------===//
1322
1323// Conversion and rounding
1324def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?G$")>;
1325def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?GB$")>;
1326def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WCD(L)?GB$")>;
1327def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GD$")>;
1328def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GDB$")>;
1329def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WC(L)?GDB$")>;
1330def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)$")>;
1331def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)B$")>;
1332def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>;
1333def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFI$")>;
1334def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFIDB$")>;
1335def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFIDB$")>;
1336
1337// Sign operations
1338def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>;
1339def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>;
1340def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>;
1341
1342// Test data class
1343def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>;
1344def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>;
1345
1346// Add / subtract
1347def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)$")>;
1348def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)DB$")>;
1349def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)DB$")>;
1350
1351// Multiply / multiply-and-add/subtract
1352def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM$")>;
1353def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMDB$")>;
1354def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFMDB$")>;
1355def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)$")>;
1356def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)DB$")>;
1357def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(A|S)DB$")>;
1358
1359// Divide / square root
1360def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>;
1361def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>;
1362def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>;
1363def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>;
1364
1365//===----------------------------------------------------------------------===//
1366// Vector: Floating-point comparison
1367//===----------------------------------------------------------------------===//
1368
1369def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)$")>;
1370def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DB$")>;
1371def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>;
1372def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>;
1373def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DBS$")>;
1374def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>;
1375def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>;
1376
1377//===----------------------------------------------------------------------===//
1378// Vector: Floating-point insertion and extraction
1379//===----------------------------------------------------------------------===//
1380
1381def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>;
1382def : InstRW<[WLat4, FXb, NormalGr], (instregex "LFER$")>;
1383
1384//===----------------------------------------------------------------------===//
1385// Vector: String instructions
1386//===----------------------------------------------------------------------===//
1387
1388def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>;
1389def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>;
1390def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>;
1391def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>;
1392def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>;
1393def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>;
1394def : InstRW<[WLat4, WLat4, VecStr, NormalGr],
1395             (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>;
1396def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>;
1397def : InstRW<[WLat4, WLat4, VecStr, NormalGr],
1398             (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>;
1399def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>;
1400def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>;
1401def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>;
1402def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>;
1403def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>;
1404def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>;
1405
1406
1407// -------------------------------- System ---------------------------------- //
1408
1409//===----------------------------------------------------------------------===//
1410// System: Program-Status Word Instructions
1411//===----------------------------------------------------------------------===//
1412
1413def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>;
1414def : InstRW<[WLat30, MCD], (instregex "LPSW(E)?$")>;
1415def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>;
1416def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>;
1417def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>;
1418def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;
1419def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>;
1420def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>;
1421
1422//===----------------------------------------------------------------------===//
1423// System: Control Register Instructions
1424//===----------------------------------------------------------------------===//
1425
1426def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>;
1427def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STCT(L|G)$")>;
1428def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>;
1429def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>;
1430def : InstRW<[WLat30, MCD], (instregex "ESEA$")>;
1431
1432//===----------------------------------------------------------------------===//
1433// System: Prefix-Register Instructions
1434//===----------------------------------------------------------------------===//
1435
1436def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>;
1437
1438//===----------------------------------------------------------------------===//
1439// System: Storage-Key and Real Memory Instructions
1440//===----------------------------------------------------------------------===//
1441
1442def : InstRW<[WLat30, MCD], (instregex "ISKE$")>;
1443def : InstRW<[WLat30, MCD], (instregex "IVSK$")>;
1444def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>;
1445def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>;
1446def : InstRW<[WLat30, MCD], (instregex "PFMF$")>;
1447def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>;
1448def : InstRW<[WLat30, MCD], (instregex "PGIN$")>;
1449def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>;
1450
1451//===----------------------------------------------------------------------===//
1452// System: Dynamic-Address-Translation Instructions
1453//===----------------------------------------------------------------------===//
1454
1455def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>;
1456def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>;
1457def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>;
1458def : InstRW<[WLat30, MCD], (instregex "PTLB$")>;
1459def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>;
1460def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>;
1461def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>;
1462def : InstRW<[WLat30, MCD], (instregex "STRAG$")>;
1463def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>;
1464def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>;
1465def : InstRW<[WLat30, MCD], (instregex "TPROT$")>;
1466
1467//===----------------------------------------------------------------------===//
1468// System: Memory-move Instructions
1469//===----------------------------------------------------------------------===//
1470
1471def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;
1472def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;
1473def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>;
1474def : InstRW<[WLat30, MCD], (instregex "MVPG$")>;
1475
1476//===----------------------------------------------------------------------===//
1477// System: Address-Space Instructions
1478//===----------------------------------------------------------------------===//
1479
1480def : InstRW<[WLat30, MCD], (instregex "LASP$")>;
1481def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>;
1482def : InstRW<[WLat30, MCD], (instregex "PC$")>;
1483def : InstRW<[WLat30, MCD], (instregex "PR$")>;
1484def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>;
1485def : InstRW<[WLat30, MCD], (instregex "RP$")>;
1486def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>;
1487def : InstRW<[WLat30, MCD], (instregex "TAR$")>;
1488
1489//===----------------------------------------------------------------------===//
1490// System: Linkage-Stack Instructions
1491//===----------------------------------------------------------------------===//
1492
1493def : InstRW<[WLat30, MCD], (instregex "BAKR$")>;
1494def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>;
1495def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>;
1496
1497//===----------------------------------------------------------------------===//
1498// System: Time-Related Instructions
1499//===----------------------------------------------------------------------===//
1500
1501def : InstRW<[WLat30, MCD], (instregex "PTFF$")>;
1502def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>;
1503def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>;
1504def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone2], (instregex "STCK(F)?$")>;
1505def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone3], (instregex "STCKE$")>;
1506def : InstRW<[WLat30, MCD], (instregex "STCKC$")>;
1507def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>;
1508
1509//===----------------------------------------------------------------------===//
1510// System: CPU-Related Instructions
1511//===----------------------------------------------------------------------===//
1512
1513def : InstRW<[WLat30, MCD], (instregex "STAP$")>;
1514def : InstRW<[WLat30, MCD], (instregex "STIDP$")>;
1515def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>;
1516def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>;
1517def : InstRW<[WLat30, MCD], (instregex "ECAG$")>;
1518def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>;
1519def : InstRW<[WLat30, MCD], (instregex "PTF$")>;
1520def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>;
1521
1522//===----------------------------------------------------------------------===//
1523// System: Miscellaneous Instructions
1524//===----------------------------------------------------------------------===//
1525
1526def : InstRW<[WLat30, MCD], (instregex "SVC$")>;
1527def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>;
1528def : InstRW<[WLat30, MCD], (instregex "DIAG$")>;
1529def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>;
1530def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>;
1531def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>;
1532def : InstRW<[WLat30, MCD], (instregex "SIE$")>;
1533
1534//===----------------------------------------------------------------------===//
1535// System: CPU-Measurement Facility Instructions
1536//===----------------------------------------------------------------------===//
1537
1538def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>;
1539def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>;
1540def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>;
1541def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>;
1542def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>;
1543def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>;
1544def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>;
1545
1546//===----------------------------------------------------------------------===//
1547// System: I/O Instructions
1548//===----------------------------------------------------------------------===//
1549
1550def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>;
1551def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
1552def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
1553def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
1554def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
1555def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
1556def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
1557
1558}
1559
1560