1//==-- SystemZSchedule.td - SystemZ Scheduling Definitions ----*- tblgen -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10// Scheduler resources
11
12// These three resources are used to express decoder grouping rules.
13// The number of decoder slots needed by an instructions is normally
14// one. For a cracked instruction (BeginGroup && !EndGroup) it is
15// two. Expanded instructions (BeginGroup && EndGroup) group alone.
16def GroupAlone : SchedWrite;
17def BeginGroup : SchedWrite;
18def EndGroup   : SchedWrite;
19
20// Latencies, to make code a bit neater. If more than one resource is
21// used for an instruction, the greatest latency (not the sum) will be
22// output by Tablegen. Therefore, in such cases one of these resources
23// is needed.
24def Lat2 : SchedWrite;
25def Lat3 : SchedWrite;
26def Lat4 : SchedWrite;
27def Lat5 : SchedWrite;
28def Lat6 : SchedWrite;
29def Lat7 : SchedWrite;
30def Lat8 : SchedWrite;
31def Lat9 : SchedWrite;
32def Lat10 : SchedWrite;
33def Lat11 : SchedWrite;
34def Lat12 : SchedWrite;
35def Lat15 : SchedWrite;
36def Lat20 : SchedWrite;
37def Lat30 : SchedWrite;
38
39// Fixed-point
40def FXa         : SchedWrite;
41def FXb         : SchedWrite;
42def FXU         : SchedWrite;
43
44// Load/store unit
45def LSU         : SchedWrite;
46
47// Model a return without latency, otherwise if-converter will model
48// extra cost and abort (currently there is an assert that checks that
49// all instructions have at least one uop).
50def LSU_lat1    : SchedWrite;
51
52// Floating point unit (zEC12 and earlier)
53def FPU : SchedWrite;
54
55// Vector sub units (z13)
56def VecBF     : SchedWrite;
57def VecDF     : SchedWrite;
58def VecFPd    : SchedWrite; // Blocking BFP div/sqrt unit.
59def VecMul    : SchedWrite;
60def VecStr    : SchedWrite;
61def VecXsPm   : SchedWrite;
62
63// Virtual branching unit
64def VBU         : SchedWrite;
65
66
67include "SystemZScheduleZ13.td"
68include "SystemZScheduleZEC12.td"
69include "SystemZScheduleZ196.td"
70
71