1//==-- SystemZSchedule.td - SystemZ Scheduling Definitions ----*- tblgen -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10// Scheduler resources
11// Resources ending with a '2' use that resource for 2 cycles. An instruction
12// using two such resources use the mapped unit for 4 cycles, and 2 is added
13// to the total number of uops of the sched class.
14
15// These three resources are used to express decoder grouping rules.
16// The number of decoder slots needed by an instructions is normally
17// one. For a cracked instruction (BeginGroup && !EndGroup) it is
18// two. Expanded instructions (BeginGroup && EndGroup) group alone.
19def GroupAlone : SchedWrite;
20def BeginGroup : SchedWrite;
21def EndGroup   : SchedWrite;
22
23// Latencies, to make code a bit neater. If more than one resource is
24// used for an instruction, the greatest latency (not the sum) will be
25// output by Tablegen. Therefore, in such cases one of these resources
26// is needed.
27def Lat2 : SchedWrite;
28def Lat3 : SchedWrite;
29def Lat4 : SchedWrite;
30def Lat5 : SchedWrite;
31def Lat6 : SchedWrite;
32def Lat7 : SchedWrite;
33def Lat8 : SchedWrite;
34def Lat9 : SchedWrite;
35def Lat10 : SchedWrite;
36def Lat11 : SchedWrite;
37def Lat12 : SchedWrite;
38def Lat15 : SchedWrite;
39def Lat20 : SchedWrite;
40def Lat30 : SchedWrite;
41
42// Fixed-point
43def FXa         : SchedWrite;
44def FXa2        : SchedWrite;
45def FXb         : SchedWrite;
46def FXU         : SchedWrite;
47
48// Load/store unit
49def LSU         : SchedWrite;
50
51// Model a return without latency, otherwise if-converter will model
52// extra cost and abort (currently there is an assert that checks that
53// all instructions have at least one uop).
54def LSU_lat1    : SchedWrite;
55
56// Floating point unit (zEC12 and earlier)
57def FPU  : SchedWrite;
58def FPU2 : SchedWrite;
59
60// Vector sub units (z13)
61def VecBF     : SchedWrite;
62def VecBF2    : SchedWrite;
63def VecDF     : SchedWrite;
64def VecDF2    : SchedWrite;
65def VecFPd    : SchedWrite; // Blocking BFP div/sqrt unit.
66def VecMul    : SchedWrite;
67def VecStr    : SchedWrite;
68def VecXsPm   : SchedWrite;
69
70// Virtual branching unit
71def VBU         : SchedWrite;
72
73
74include "SystemZScheduleZ13.td"
75include "SystemZScheduleZEC12.td"
76include "SystemZScheduleZ196.td"
77
78