1 //===-- SystemZRegisterInfo.cpp - SystemZ register information ------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "SystemZInstrInfo.h"
11 #include "SystemZRegisterInfo.h"
12 #include "SystemZSubtarget.h"
13 #include "llvm/CodeGen/MachineInstrBuilder.h"
14 #include "llvm/CodeGen/MachineRegisterInfo.h"
15 #include "llvm/Target/TargetFrameLowering.h"
16 
17 using namespace llvm;
18 
19 #define GET_REGINFO_TARGET_DESC
20 #include "SystemZGenRegisterInfo.inc"
21 
22 SystemZRegisterInfo::SystemZRegisterInfo()
23     : SystemZGenRegisterInfo(SystemZ::R14D) {}
24 
25 const MCPhysReg*
26 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
27   static const MCPhysReg CalleeSavedRegs[] = {
28     SystemZ::R6D,  SystemZ::R7D,  SystemZ::R8D,  SystemZ::R9D,
29     SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D,
30     SystemZ::R14D, SystemZ::R15D,
31     SystemZ::F8D,  SystemZ::F9D,  SystemZ::F10D, SystemZ::F11D,
32     SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D,
33     0
34   };
35 
36   return CalleeSavedRegs;
37 }
38 
39 BitVector
40 SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
41   BitVector Reserved(getNumRegs());
42   const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
43 
44   if (TFI->hasFP(MF)) {
45     // R11D is the frame pointer.  Reserve all aliases.
46     Reserved.set(SystemZ::R11D);
47     Reserved.set(SystemZ::R11L);
48     Reserved.set(SystemZ::R11H);
49     Reserved.set(SystemZ::R10Q);
50   }
51 
52   // R15D is the stack pointer.  Reserve all aliases.
53   Reserved.set(SystemZ::R15D);
54   Reserved.set(SystemZ::R15L);
55   Reserved.set(SystemZ::R15H);
56   Reserved.set(SystemZ::R14Q);
57   return Reserved;
58 }
59 
60 void
61 SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
62                                          int SPAdj, unsigned FIOperandNum,
63                                          RegScavenger *RS) const {
64   assert(SPAdj == 0 && "Outgoing arguments should be part of the frame");
65 
66   MachineBasicBlock &MBB = *MI->getParent();
67   MachineFunction &MF = *MBB.getParent();
68   auto *TII =
69       static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo());
70   const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
71   DebugLoc DL = MI->getDebugLoc();
72 
73   // Decompose the frame index into a base and offset.
74   int FrameIndex = MI->getOperand(FIOperandNum).getIndex();
75   unsigned BasePtr = getFrameRegister(MF);
76   int64_t Offset = (TFI->getFrameIndexOffset(MF, FrameIndex) +
77                     MI->getOperand(FIOperandNum + 1).getImm());
78 
79   // Special handling of dbg_value instructions.
80   if (MI->isDebugValue()) {
81     MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false);
82     MI->getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
83     return;
84   }
85 
86   // See if the offset is in range, or if an equivalent instruction that
87   // accepts the offset exists.
88   unsigned Opcode = MI->getOpcode();
89   unsigned OpcodeForOffset = TII->getOpcodeForOffset(Opcode, Offset);
90   if (OpcodeForOffset)
91     MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
92   else {
93     // Create an anchor point that is in range.  Start at 0xffff so that
94     // can use LLILH to load the immediate.
95     int64_t OldOffset = Offset;
96     int64_t Mask = 0xffff;
97     do {
98       Offset = OldOffset & Mask;
99       OpcodeForOffset = TII->getOpcodeForOffset(Opcode, Offset);
100       Mask >>= 1;
101       assert(Mask && "One offset must be OK");
102     } while (!OpcodeForOffset);
103 
104     unsigned ScratchReg =
105       MF.getRegInfo().createVirtualRegister(&SystemZ::ADDR64BitRegClass);
106     int64_t HighOffset = OldOffset - Offset;
107 
108     if (MI->getDesc().TSFlags & SystemZII::HasIndex
109         && MI->getOperand(FIOperandNum + 2).getReg() == 0) {
110       // Load the offset into the scratch register and use it as an index.
111       // The scratch register then dies here.
112       TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
113       MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
114       MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg,
115                                                         false, false, true);
116     } else {
117       // Load the anchor address into a scratch register.
118       unsigned LAOpcode = TII->getOpcodeForOffset(SystemZ::LA, HighOffset);
119       if (LAOpcode)
120         BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg)
121           .addReg(BasePtr).addImm(HighOffset).addReg(0);
122       else {
123         // Load the high offset into the scratch register and use it as
124         // an index.
125         TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
126         BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
127           .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
128       }
129 
130       // Use the scratch register as the base.  It then dies here.
131       MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg,
132                                                     false, false, true);
133     }
134   }
135   MI->setDesc(TII->get(OpcodeForOffset));
136   MI->getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
137 }
138 
139 unsigned
140 SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
141   const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
142   return TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D;
143 }
144