1 //===- SystemZRegisterInfo.cpp - SystemZ Register Information -------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the SystemZ implementation of the TargetRegisterInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "SystemZ.h" 15 #include "SystemZInstrInfo.h" 16 #include "SystemZMachineFunctionInfo.h" 17 #include "SystemZRegisterInfo.h" 18 #include "SystemZSubtarget.h" 19 #include "llvm/CodeGen/MachineInstrBuilder.h" 20 #include "llvm/CodeGen/MachineFrameInfo.h" 21 #include "llvm/CodeGen/MachineFunction.h" 22 #include "llvm/CodeGen/MachineRegisterInfo.h" 23 #include "llvm/Target/TargetFrameInfo.h" 24 #include "llvm/Target/TargetInstrInfo.h" 25 #include "llvm/Target/TargetMachine.h" 26 #include "llvm/Target/TargetOptions.h" 27 #include "llvm/ADT/BitVector.h" 28 using namespace llvm; 29 30 SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm, 31 const SystemZInstrInfo &tii) 32 : SystemZGenRegisterInfo(SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN), 33 TM(tm), TII(tii) { 34 } 35 36 const unsigned* 37 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { 38 static const unsigned CalleeSavedRegs[] = { 39 SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D, 40 SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D, 41 SystemZ::R14D, SystemZ::R15D, 42 SystemZ::F8L, SystemZ::F9L, SystemZ::F10L, SystemZ::F11L, 43 SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L, 44 0 45 }; 46 47 return CalleeSavedRegs; 48 } 49 50 const TargetRegisterClass* const* 51 SystemZRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const { 52 static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 53 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 54 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 55 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 56 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 57 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 58 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 59 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 60 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 61 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 0 62 }; 63 return CalleeSavedRegClasses; 64 } 65 66 BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const { 67 BitVector Reserved(getNumRegs()); 68 if (hasFP(MF)) 69 Reserved.set(SystemZ::R11D); 70 Reserved.set(SystemZ::R14D); 71 Reserved.set(SystemZ::R15D); 72 return Reserved; 73 } 74 75 /// needsFP - Return true if the specified function should have a dedicated 76 /// frame pointer register. This is true if the function has variable sized 77 /// allocas or if frame pointer elimination is disabled. 78 bool SystemZRegisterInfo::hasFP(const MachineFunction &MF) const { 79 const MachineFrameInfo *MFI = MF.getFrameInfo(); 80 return NoFramePointerElim || MFI->hasVarSizedObjects(); 81 } 82 83 void SystemZRegisterInfo:: 84 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 85 MachineBasicBlock::iterator I) const { 86 MBB.erase(I); 87 } 88 89 int SystemZRegisterInfo::getFrameIndexOffset(MachineFunction &MF, int FI) const { 90 const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo(); 91 MachineFrameInfo *MFI = MF.getFrameInfo(); 92 SystemZMachineFunctionInfo *SystemZMFI = 93 MF.getInfo<SystemZMachineFunctionInfo>(); 94 int Offset = MFI->getObjectOffset(FI) + MFI->getOffsetAdjustment(); 95 uint64_t StackSize = MFI->getStackSize(); 96 97 // Fixed objects are really located in the "previous" frame. 98 if (FI < 0) 99 StackSize -= SystemZMFI->getCalleeSavedFrameSize(); 100 101 Offset += StackSize - TFI.getOffsetOfLocalArea(); 102 103 // Skip the register save area if we generated the stack frame. 104 if (StackSize || MFI->hasCalls()) 105 Offset -= TFI.getOffsetOfLocalArea(); 106 107 return Offset; 108 } 109 110 void SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, 111 int SPAdj, RegScavenger *RS) const { 112 assert(SPAdj == 0 && "Unxpected"); 113 114 unsigned i = 0; 115 MachineInstr &MI = *II; 116 MachineFunction &MF = *MI.getParent()->getParent(); 117 while (!MI.getOperand(i).isFI()) { 118 ++i; 119 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 120 } 121 122 int FrameIndex = MI.getOperand(i).getIndex(); 123 124 unsigned BasePtr = (hasFP(MF) ? SystemZ::R11D : SystemZ::R15D); 125 126 // This must be part of a rri or ri operand memory reference. Replace the 127 // FrameIndex with base register with BasePtr. Add an offset to the 128 // displacement field. 129 MI.getOperand(i).ChangeToRegister(BasePtr, false); 130 131 // Offset is a either 12-bit unsigned or 20-bit signed integer. 132 // FIXME: handle "too long" displacements. 133 int Offset = getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm(); 134 135 // Check whether displacement is too long to fit into 12 bit zext field. 136 MI.setDesc(TII.getMemoryInstr(MI.getOpcode(), Offset)); 137 138 MI.getOperand(i+1).ChangeToImmediate(Offset); 139 } 140 141 void 142 SystemZRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, 143 RegScavenger *RS) const { 144 // Determine whether R15/R14 will ever be clobbered inside the function. And 145 // if yes - mark it as 'callee' saved. 146 MachineFrameInfo *FFI = MF.getFrameInfo(); 147 MachineRegisterInfo &MRI = MF.getRegInfo(); 148 149 // Check whether high FPRs are ever used, if yes - we need to save R15 as 150 // well. 151 static const unsigned HighFPRs[] = { 152 SystemZ::F8L, SystemZ::F9L, SystemZ::F10L, SystemZ::F11L, 153 SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L, 154 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S, 155 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S, 156 }; 157 158 bool HighFPRsUsed = false; 159 for (unsigned i = 0, e = array_lengthof(HighFPRs); i != e; ++i) 160 HighFPRsUsed |= MRI.isPhysRegUsed(HighFPRs[i]); 161 162 if (FFI->hasCalls()) 163 /* FIXME: function is varargs */ 164 /* FIXME: function grabs RA */ 165 /* FIXME: function calls eh_return */ 166 MRI.setPhysRegUsed(SystemZ::R14D); 167 168 if (HighFPRsUsed || 169 FFI->hasCalls() || 170 FFI->getObjectIndexEnd() != 0 || // Contains automatic variables 171 FFI->hasVarSizedObjects() // Function calls dynamic alloca's 172 /* FIXME: function is varargs */) 173 MRI.setPhysRegUsed(SystemZ::R15D); 174 } 175 176 /// emitSPUpdate - Emit a series of instructions to increment / decrement the 177 /// stack pointer by a constant value. 178 static 179 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, 180 int64_t NumBytes, const TargetInstrInfo &TII) { 181 unsigned Opc; uint64_t Chunk; 182 bool isSub = NumBytes < 0; 183 uint64_t Offset = isSub ? -NumBytes : NumBytes; 184 185 if (Offset >= (1LL << 15) - 1) { 186 Opc = SystemZ::ADD64ri32; 187 Chunk = (1LL << 31) - 1; 188 } else { 189 Opc = SystemZ::ADD64ri16; 190 Chunk = (1LL << 15) - 1; 191 } 192 193 DebugLoc DL = (MBBI != MBB.end() ? MBBI->getDebugLoc() : 194 DebugLoc::getUnknownLoc()); 195 196 while (Offset) { 197 uint64_t ThisVal = (Offset > Chunk) ? Chunk : Offset; 198 MachineInstr *MI = 199 BuildMI(MBB, MBBI, DL, TII.get(Opc), SystemZ::R15D) 200 .addReg(SystemZ::R15D).addImm((isSub ? -(int64_t)ThisVal : ThisVal)); 201 // The PSW implicit def is dead. 202 MI->getOperand(3).setIsDead(); 203 Offset -= ThisVal; 204 } 205 } 206 207 void SystemZRegisterInfo::emitPrologue(MachineFunction &MF) const { 208 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB 209 const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo(); 210 MachineFrameInfo *MFI = MF.getFrameInfo(); 211 SystemZMachineFunctionInfo *SystemZMFI = 212 MF.getInfo<SystemZMachineFunctionInfo>(); 213 MachineBasicBlock::iterator MBBI = MBB.begin(); 214 DebugLoc DL = (MBBI != MBB.end() ? MBBI->getDebugLoc() : 215 DebugLoc::getUnknownLoc()); 216 217 // Get the number of bytes to allocate from the FrameInfo. 218 // Note that area for callee-saved stuff is already allocated, thus we need to 219 // 'undo' the stack movement. 220 uint64_t StackSize = MFI->getStackSize(); 221 StackSize -= SystemZMFI->getCalleeSavedFrameSize(); 222 223 uint64_t NumBytes = StackSize - TFI.getOffsetOfLocalArea(); 224 225 // Skip the callee-saved push instructions. 226 while (MBBI != MBB.end() && 227 (MBBI->getOpcode() == SystemZ::MOV64mr || 228 MBBI->getOpcode() == SystemZ::MOV64mrm)) 229 ++MBBI; 230 231 if (MBBI != MBB.end()) 232 DL = MBBI->getDebugLoc(); 233 234 // adjust stack pointer: R15 -= numbytes 235 if (StackSize || MFI->hasCalls()) { 236 assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) && 237 "Invalid stack frame calculation!"); 238 emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, TII); 239 } 240 241 if (hasFP(MF)) { 242 // Update R11 with the new base value... 243 BuildMI(MBB, MBBI, DL, TII.get(SystemZ::MOV64rr), SystemZ::R11D) 244 .addReg(SystemZ::R15D); 245 246 // Mark the FramePtr as live-in in every block except the entry. 247 for (MachineFunction::iterator I = next(MF.begin()), E = MF.end(); 248 I != E; ++I) 249 I->addLiveIn(SystemZ::R11D); 250 251 } 252 } 253 254 void SystemZRegisterInfo::emitEpilogue(MachineFunction &MF, 255 MachineBasicBlock &MBB) const { 256 const MachineFrameInfo *MFI = MF.getFrameInfo(); 257 const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo(); 258 MachineBasicBlock::iterator MBBI = prior(MBB.end()); 259 SystemZMachineFunctionInfo *SystemZMFI = 260 MF.getInfo<SystemZMachineFunctionInfo>(); 261 unsigned RetOpcode = MBBI->getOpcode(); 262 DebugLoc DL = MBBI->getDebugLoc(); 263 264 switch (RetOpcode) { 265 case SystemZ::RET: break; // These are ok 266 default: 267 assert(0 && "Can only insert epilog into returning blocks"); 268 } 269 270 // Get the number of bytes to allocate from the FrameInfo 271 // Note that area for callee-saved stuff is already allocated, thus we need to 272 // 'undo' the stack movement. 273 uint64_t StackSize = 274 MFI->getStackSize() - SystemZMFI->getCalleeSavedFrameSize(); 275 uint64_t NumBytes = StackSize - TFI.getOffsetOfLocalArea(); 276 277 // Skip the final terminator instruction. 278 while (MBBI != MBB.begin()) { 279 MachineBasicBlock::iterator PI = prior(MBBI); 280 --MBBI; 281 if (!PI->getDesc().isTerminator()) 282 break; 283 } 284 285 // During callee-saved restores emission stack frame was not yet finialized 286 // (and thus - the stack size was unknown). Tune the offset having full stack 287 // size in hands. 288 if (StackSize || MFI->hasCalls()) { 289 assert((MBBI->getOpcode() == SystemZ::MOV64rmm || 290 MBBI->getOpcode() == SystemZ::MOV64rm) && 291 "Expected to see callee-save register restore code"); 292 assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) && 293 "Invalid stack frame calculation!"); 294 295 unsigned i = 0; 296 MachineInstr &MI = *MBBI; 297 while (!MI.getOperand(i).isImm()) { 298 ++i; 299 assert(i < MI.getNumOperands() && "Unexpected restore code!"); 300 } 301 302 uint64_t Offset = NumBytes + MI.getOperand(i).getImm(); 303 // If Offset does not fit into 20-bit signed displacement field we need to 304 // emit some additional code... 305 if (Offset > 524287) { 306 // Fold the displacement into load instruction as much as possible. 307 NumBytes = Offset - 524287; 308 Offset = 524287; 309 emitSPUpdate(MBB, MBBI, NumBytes, TII); 310 } 311 312 MI.getOperand(i).ChangeToImmediate(Offset); 313 } 314 } 315 316 unsigned SystemZRegisterInfo::getRARegister() const { 317 assert(0 && "What is the return address register"); 318 return 0; 319 } 320 321 unsigned SystemZRegisterInfo::getFrameRegister(MachineFunction &MF) const { 322 assert(0 && "What is the frame register"); 323 return 0; 324 } 325 326 unsigned SystemZRegisterInfo::getEHExceptionRegister() const { 327 assert(0 && "What is the exception register"); 328 return 0; 329 } 330 331 unsigned SystemZRegisterInfo::getEHHandlerRegister() const { 332 assert(0 && "What is the exception handler register"); 333 return 0; 334 } 335 336 int SystemZRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { 337 assert(0 && "What is the dwarf register number"); 338 return -1; 339 } 340 341 #include "SystemZGenRegisterInfo.inc" 342