1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Type profiles 12//===----------------------------------------------------------------------===// 13def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>; 18def SDT_ZICmp : SDTypeProfile<0, 3, 19 [SDTCisSameAs<0, 1>, 20 SDTCisVT<2, i32>]>; 21def SDT_ZBRCCMask : SDTypeProfile<0, 3, 22 [SDTCisVT<0, i32>, 23 SDTCisVT<1, i32>, 24 SDTCisVT<2, OtherVT>]>; 25def SDT_ZSelectCCMask : SDTypeProfile<1, 4, 26 [SDTCisSameAs<0, 1>, 27 SDTCisSameAs<1, 2>, 28 SDTCisVT<3, i32>, 29 SDTCisVT<4, i32>]>; 30def SDT_ZWrapPtr : SDTypeProfile<1, 1, 31 [SDTCisSameAs<0, 1>, 32 SDTCisPtrTy<0>]>; 33def SDT_ZWrapOffset : SDTypeProfile<1, 2, 34 [SDTCisSameAs<0, 1>, 35 SDTCisSameAs<0, 2>, 36 SDTCisPtrTy<0>]>; 37def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 38def SDT_ZExtractAccess : SDTypeProfile<1, 1, 39 [SDTCisVT<0, i32>, 40 SDTCisVT<1, i32>]>; 41def SDT_ZGR128Binary32 : SDTypeProfile<1, 2, 42 [SDTCisVT<0, untyped>, 43 SDTCisVT<1, untyped>, 44 SDTCisVT<2, i32>]>; 45def SDT_ZGR128Binary64 : SDTypeProfile<1, 2, 46 [SDTCisVT<0, untyped>, 47 SDTCisVT<1, untyped>, 48 SDTCisVT<2, i64>]>; 49def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 50 [SDTCisVT<0, i32>, 51 SDTCisPtrTy<1>, 52 SDTCisVT<2, i32>, 53 SDTCisVT<3, i32>, 54 SDTCisVT<4, i32>, 55 SDTCisVT<5, i32>]>; 56def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6, 57 [SDTCisVT<0, i32>, 58 SDTCisPtrTy<1>, 59 SDTCisVT<2, i32>, 60 SDTCisVT<3, i32>, 61 SDTCisVT<4, i32>, 62 SDTCisVT<5, i32>, 63 SDTCisVT<6, i32>]>; 64def SDT_ZMemMemLength : SDTypeProfile<0, 3, 65 [SDTCisPtrTy<0>, 66 SDTCisPtrTy<1>, 67 SDTCisVT<2, i64>]>; 68def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 69 [SDTCisPtrTy<0>, 70 SDTCisPtrTy<1>, 71 SDTCisVT<2, i64>, 72 SDTCisVT<3, i64>]>; 73def SDT_ZString : SDTypeProfile<1, 3, 74 [SDTCisPtrTy<0>, 75 SDTCisPtrTy<1>, 76 SDTCisPtrTy<2>, 77 SDTCisVT<3, i32>]>; 78def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>; 79def SDT_ZPrefetch : SDTypeProfile<0, 2, 80 [SDTCisVT<0, i32>, 81 SDTCisPtrTy<1>]>; 82 83//===----------------------------------------------------------------------===// 84// Node definitions 85//===----------------------------------------------------------------------===// 86 87// These are target-independent nodes, but have target-specific formats. 88def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 89 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 90def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 91 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 92 SDNPOutGlue]>; 93def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 94 95// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 96def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 97 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 98def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 99 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 100 SDNPVariadic]>; 101def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 102 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 103 SDNPVariadic]>; 104def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 105 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 106 SDNPVariadic]>; 107def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 108 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 109 SDNPVariadic]>; 110def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 111def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 112 SDT_ZWrapOffset, []>; 113def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 114def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>; 115def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>; 116def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>; 117def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 118 [SDNPHasChain, SDNPInGlue]>; 119def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask, 120 [SDNPInGlue]>; 121def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 122def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS", 123 SDT_ZExtractAccess>; 124def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>; 125def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>; 126def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>; 127def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>; 128def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>; 129 130def z_serialize : SDNode<"SystemZISD::SERIALIZE", SDTNone, 131 [SDNPHasChain, SDNPMayStore]>; 132 133class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 134 : SDNode<"SystemZISD::"##name, profile, 135 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 136 137def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 138def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 139def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 140def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 141def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 142def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 143def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 144def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 145def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 146def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 147def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 148def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>; 149 150def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 151 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 152def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 153 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 154def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 155 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 156def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 157 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 158def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 159 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 160def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 161 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 162def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 163 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 164def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 165 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 166def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength, 167 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 168def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop, 169 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 170def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString, 171 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 172def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 173 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 174def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString, 175 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 176def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic, 177 [SDNPInGlue]>; 178def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 179 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 180 SDNPMemOperand]>; 181 182//===----------------------------------------------------------------------===// 183// Pattern fragments 184//===----------------------------------------------------------------------===// 185 186// Signed and unsigned comparisons. 187def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 188 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 189 return Type != SystemZICMP::UnsignedOnly; 190}]>; 191def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 192 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 193 return Type != SystemZICMP::SignedOnly; 194}]>; 195 196// Register- and memory-based TEST UNDER MASK. 197def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 198def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 199 200// Register sign-extend operations. Sub-32-bit values are represented as i32s. 201def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 202def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 203def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 204 205// Register zero-extend operations. Sub-32-bit values are represented as i32s. 206def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 207def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 208def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 209 210// Typed floating-point loads. 211def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>; 212def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>; 213 214// Extending loads in which the extension type can be signed. 215def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 216 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 217 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 218}]>; 219def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 220 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 221}]>; 222def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 223 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 224}]>; 225def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 226 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 227}]>; 228 229// Extending loads in which the extension type can be unsigned. 230def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 231 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 232 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 233}]>; 234def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 235 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 236}]>; 237def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 238 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 239}]>; 240def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 241 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 242}]>; 243 244// Extending loads in which the extension type doesn't matter. 245def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 246 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 247}]>; 248def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 249 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 250}]>; 251def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 252 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 253}]>; 254def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 255 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 256}]>; 257 258// Aligned loads. 259class AlignedLoad<SDPatternOperator load> 260 : PatFrag<(ops node:$addr), (load node:$addr), [{ 261 auto *Load = cast<LoadSDNode>(N); 262 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 263}]>; 264def aligned_load : AlignedLoad<load>; 265def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 266def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 267def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 268def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 269 270// Aligned stores. 271class AlignedStore<SDPatternOperator store> 272 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 273 auto *Store = cast<StoreSDNode>(N); 274 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 275}]>; 276def aligned_store : AlignedStore<store>; 277def aligned_truncstorei16 : AlignedStore<truncstorei16>; 278def aligned_truncstorei32 : AlignedStore<truncstorei32>; 279 280// Non-volatile loads. Used for instructions that might access the storage 281// location multiple times. 282class NonvolatileLoad<SDPatternOperator load> 283 : PatFrag<(ops node:$addr), (load node:$addr), [{ 284 auto *Load = cast<LoadSDNode>(N); 285 return !Load->isVolatile(); 286}]>; 287def nonvolatile_load : NonvolatileLoad<load>; 288def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 289def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 290def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 291 292// Non-volatile stores. 293class NonvolatileStore<SDPatternOperator store> 294 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 295 auto *Store = cast<StoreSDNode>(N); 296 return !Store->isVolatile(); 297}]>; 298def nonvolatile_store : NonvolatileStore<store>; 299def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 300def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 301def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 302 303// A store of a load that can be implemented using MVC. 304def mvc_store : PatFrag<(ops node:$value, node:$addr), 305 (unindexedstore node:$value, node:$addr), 306 [{ return storeLoadCanUseMVC(N); }]>; 307 308// Binary read-modify-write operations on memory in which the other 309// operand is also memory and for which block operations like NC can 310// be used. There are two patterns for each operator, depending on 311// which operand contains the "other" load. 312multiclass block_op<SDPatternOperator operator> { 313 def "1" : PatFrag<(ops node:$value, node:$addr), 314 (unindexedstore (operator node:$value, 315 (unindexedload node:$addr)), 316 node:$addr), 317 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 318 def "2" : PatFrag<(ops node:$value, node:$addr), 319 (unindexedstore (operator (unindexedload node:$addr), 320 node:$value), 321 node:$addr), 322 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 323} 324defm block_and : block_op<and>; 325defm block_or : block_op<or>; 326defm block_xor : block_op<xor>; 327 328// Insertions. 329def inserti8 : PatFrag<(ops node:$src1, node:$src2), 330 (or (and node:$src1, -256), node:$src2)>; 331def insertll : PatFrag<(ops node:$src1, node:$src2), 332 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 333def insertlh : PatFrag<(ops node:$src1, node:$src2), 334 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 335def inserthl : PatFrag<(ops node:$src1, node:$src2), 336 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 337def inserthh : PatFrag<(ops node:$src1, node:$src2), 338 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 339def insertlf : PatFrag<(ops node:$src1, node:$src2), 340 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 341def inserthf : PatFrag<(ops node:$src1, node:$src2), 342 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 343 344// ORs that can be treated as insertions. 345def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 346 (or node:$src1, node:$src2), [{ 347 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits(); 348 return CurDAG->MaskedValueIsZero(N->getOperand(0), 349 APInt::getLowBitsSet(BitWidth, 8)); 350}]>; 351 352// ORs that can be treated as reversed insertions. 353def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 354 (or node:$src1, node:$src2), [{ 355 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits(); 356 return CurDAG->MaskedValueIsZero(N->getOperand(1), 357 APInt::getLowBitsSet(BitWidth, 8)); 358}]>; 359 360// Negative integer absolute. 361def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 362 363// Integer absolute, matching the canonical form generated by DAGCombiner. 364def z_iabs32 : PatFrag<(ops node:$src), 365 (xor (add node:$src, (sra node:$src, (i32 31))), 366 (sra node:$src, (i32 31)))>; 367def z_iabs64 : PatFrag<(ops node:$src), 368 (xor (add node:$src, (sra node:$src, (i32 63))), 369 (sra node:$src, (i32 63)))>; 370def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 371def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 372 373// Fused multiply-add and multiply-subtract, but with the order of the 374// operands matching SystemZ's MA and MS instructions. 375def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 376 (fma node:$src2, node:$src3, node:$src1)>; 377def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 378 (fma node:$src2, node:$src3, (fneg node:$src1))>; 379 380// Floating-point negative absolute. 381def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 382 383// Create a unary operator that loads from memory and then performs 384// the given operation on it. 385class loadu<SDPatternOperator operator, SDPatternOperator load = load> 386 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 387 388// Create a store operator that performs the given unary operation 389// on the value before storing it. 390class storeu<SDPatternOperator operator, SDPatternOperator store = store> 391 : PatFrag<(ops node:$value, node:$addr), 392 (store (operator node:$value), node:$addr)>; 393