1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11// Type profiles
12//===----------------------------------------------------------------------===//
13def SDT_CallSeqStart        : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14def SDT_CallSeqEnd          : SDCallSeqEnd<[SDTCisVT<0, i64>,
15                                            SDTCisVT<1, i64>]>;
16def SDT_ZCall               : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17def SDT_ZCmp                : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18def SDT_ZICmp               : SDTypeProfile<0, 3,
19                                            [SDTCisSameAs<0, 1>,
20                                             SDTCisVT<2, i32>]>;
21def SDT_ZBRCCMask           : SDTypeProfile<0, 3,
22                                            [SDTCisVT<0, i32>,
23                                             SDTCisVT<1, i32>,
24                                             SDTCisVT<2, OtherVT>]>;
25def SDT_ZSelectCCMask       : SDTypeProfile<1, 4,
26                                            [SDTCisSameAs<0, 1>,
27                                             SDTCisSameAs<1, 2>,
28                                             SDTCisVT<3, i32>,
29                                             SDTCisVT<4, i32>]>;
30def SDT_ZWrapPtr            : SDTypeProfile<1, 1,
31                                            [SDTCisSameAs<0, 1>,
32                                             SDTCisPtrTy<0>]>;
33def SDT_ZWrapOffset         : SDTypeProfile<1, 2,
34                                            [SDTCisSameAs<0, 1>,
35                                             SDTCisSameAs<0, 2>,
36                                             SDTCisPtrTy<0>]>;
37def SDT_ZAdjDynAlloc        : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
38def SDT_ZExtractAccess      : SDTypeProfile<1, 1,
39                                            [SDTCisVT<0, i32>,
40                                             SDTCisVT<1, i32>]>;
41def SDT_ZGR128Binary32      : SDTypeProfile<1, 2,
42                                            [SDTCisVT<0, untyped>,
43                                             SDTCisVT<1, untyped>,
44                                             SDTCisVT<2, i32>]>;
45def SDT_ZGR128Binary64      : SDTypeProfile<1, 2,
46                                            [SDTCisVT<0, untyped>,
47                                             SDTCisVT<1, untyped>,
48                                             SDTCisVT<2, i64>]>;
49def SDT_ZAtomicLoadBinaryW  : SDTypeProfile<1, 5,
50                                            [SDTCisVT<0, i32>,
51                                             SDTCisPtrTy<1>,
52                                             SDTCisVT<2, i32>,
53                                             SDTCisVT<3, i32>,
54                                             SDTCisVT<4, i32>,
55                                             SDTCisVT<5, i32>]>;
56def SDT_ZAtomicCmpSwapW     : SDTypeProfile<1, 6,
57                                            [SDTCisVT<0, i32>,
58                                             SDTCisPtrTy<1>,
59                                             SDTCisVT<2, i32>,
60                                             SDTCisVT<3, i32>,
61                                             SDTCisVT<4, i32>,
62                                             SDTCisVT<5, i32>,
63                                             SDTCisVT<6, i32>]>;
64def SDT_ZMemMemLength       : SDTypeProfile<0, 3,
65                                            [SDTCisPtrTy<0>,
66                                             SDTCisPtrTy<1>,
67                                             SDTCisVT<2, i64>]>;
68def SDT_ZMemMemLoop         : SDTypeProfile<0, 4,
69                                            [SDTCisPtrTy<0>,
70                                             SDTCisPtrTy<1>,
71                                             SDTCisVT<2, i64>,
72                                             SDTCisVT<3, i64>]>;
73def SDT_ZString             : SDTypeProfile<1, 3,
74                                            [SDTCisPtrTy<0>,
75                                             SDTCisPtrTy<1>,
76                                             SDTCisPtrTy<2>,
77                                             SDTCisVT<3, i32>]>;
78def SDT_ZI32Intrinsic       : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>;
79def SDT_ZPrefetch           : SDTypeProfile<0, 2,
80                                            [SDTCisVT<0, i32>,
81                                             SDTCisPtrTy<1>]>;
82def SDT_ZTBegin             : SDTypeProfile<0, 2,
83                                            [SDTCisPtrTy<0>,
84                                             SDTCisVT<1, i32>]>;
85def SDT_ZInsertVectorElt    : SDTypeProfile<1, 3,
86                                            [SDTCisVec<0>,
87                                             SDTCisSameAs<0, 1>,
88                                             SDTCisVT<3, i32>]>;
89def SDT_ZExtractVectorElt   : SDTypeProfile<1, 2,
90                                            [SDTCisVec<1>,
91                                             SDTCisVT<2, i32>]>;
92def SDT_ZReplicate          : SDTypeProfile<1, 1,
93                                            [SDTCisVec<0>]>;
94def SDT_ZVecUnaryConv       : SDTypeProfile<1, 1,
95                                            [SDTCisVec<0>,
96                                             SDTCisVec<1>]>;
97def SDT_ZVecUnary           : SDTypeProfile<1, 1,
98                                            [SDTCisVec<0>,
99                                             SDTCisSameAs<0, 1>]>;
100def SDT_ZVecBinary          : SDTypeProfile<1, 2,
101                                            [SDTCisVec<0>,
102                                             SDTCisSameAs<0, 1>,
103                                             SDTCisSameAs<0, 2>]>;
104def SDT_ZVecBinaryInt       : SDTypeProfile<1, 2,
105                                            [SDTCisVec<0>,
106                                             SDTCisSameAs<0, 1>,
107                                             SDTCisVT<2, i32>]>;
108def SDT_ZVecBinaryConv      : SDTypeProfile<1, 2,
109                                            [SDTCisVec<0>,
110                                             SDTCisVec<1>,
111                                             SDTCisSameAs<1, 2>]>;
112def SDT_ZVecBinaryConvInt   : SDTypeProfile<1, 2,
113                                            [SDTCisVec<0>,
114                                             SDTCisVec<1>,
115                                             SDTCisVT<2, i32>]>;
116def SDT_ZRotateMask         : SDTypeProfile<1, 2,
117                                            [SDTCisVec<0>,
118                                             SDTCisVT<1, i32>,
119                                             SDTCisVT<2, i32>]>;
120def SDT_ZJoinDwords         : SDTypeProfile<1, 2,
121                                            [SDTCisVT<0, v2i64>,
122                                             SDTCisVT<1, i64>,
123                                             SDTCisVT<2, i64>]>;
124def SDT_ZVecTernary         : SDTypeProfile<1, 3,
125                                            [SDTCisVec<0>,
126                                             SDTCisSameAs<0, 1>,
127                                             SDTCisSameAs<0, 2>,
128                                             SDTCisSameAs<0, 3>]>;
129def SDT_ZVecTernaryInt      : SDTypeProfile<1, 3,
130                                            [SDTCisVec<0>,
131                                             SDTCisSameAs<0, 1>,
132                                             SDTCisSameAs<0, 2>,
133                                             SDTCisVT<3, i32>]>;
134def SDT_ZVecQuaternaryInt   : SDTypeProfile<1, 4,
135                                            [SDTCisVec<0>,
136                                             SDTCisSameAs<0, 1>,
137                                             SDTCisSameAs<0, 2>,
138                                             SDTCisSameAs<0, 3>,
139                                             SDTCisVT<4, i32>]>;
140
141//===----------------------------------------------------------------------===//
142// Node definitions
143//===----------------------------------------------------------------------===//
144
145// These are target-independent nodes, but have target-specific formats.
146def callseq_start       : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
147                                 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
148def callseq_end         : SDNode<"ISD::CALLSEQ_END",   SDT_CallSeqEnd,
149                                 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
150                                  SDNPOutGlue]>;
151def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
152
153// Nodes for SystemZISD::*.  See SystemZISelLowering.h for more details.
154def z_retflag           : SDNode<"SystemZISD::RET_FLAG", SDTNone,
155                                 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
156def z_call              : SDNode<"SystemZISD::CALL", SDT_ZCall,
157                                 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
158                                  SDNPVariadic]>;
159def z_sibcall           : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
160                                 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
161                                  SDNPVariadic]>;
162def z_tls_gdcall        : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
163                                 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
164                                  SDNPVariadic]>;
165def z_tls_ldcall        : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
166                                 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
167                                  SDNPVariadic]>;
168def z_pcrel_wrapper     : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
169def z_pcrel_offset      : SDNode<"SystemZISD::PCREL_OFFSET",
170                                 SDT_ZWrapOffset, []>;
171def z_iabs              : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>;
172def z_icmp              : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>;
173def z_fcmp              : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>;
174def z_tm                : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>;
175def z_br_ccmask         : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
176                                 [SDNPHasChain, SDNPInGlue]>;
177def z_select_ccmask     : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
178    		                 [SDNPInGlue]>;
179def z_adjdynalloc       : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
180def z_extract_access    : SDNode<"SystemZISD::EXTRACT_ACCESS",
181                                 SDT_ZExtractAccess>;
182def z_popcnt            : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>;
183def z_umul_lohi64       : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
184def z_sdivrem32         : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
185def z_sdivrem64         : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
186def z_udivrem32         : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
187def z_udivrem64         : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
188
189def z_serialize         : SDNode<"SystemZISD::SERIALIZE", SDTNone,
190                                 [SDNPHasChain, SDNPMayStore]>;
191def z_membarrier        : SDNode<"SystemZISD::MEMBARRIER", SDTNone,
192                                 [SDNPHasChain, SDNPSideEffect]>;
193
194// Defined because the index is an i32 rather than a pointer.
195def z_vector_insert     : SDNode<"ISD::INSERT_VECTOR_ELT",
196                                 SDT_ZInsertVectorElt>;
197def z_vector_extract    : SDNode<"ISD::EXTRACT_VECTOR_ELT",
198                                 SDT_ZExtractVectorElt>;
199def z_byte_mask         : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>;
200def z_rotate_mask       : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>;
201def z_replicate         : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>;
202def z_join_dwords       : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>;
203def z_splat             : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>;
204def z_merge_high        : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>;
205def z_merge_low         : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>;
206def z_shl_double        : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>;
207def z_permute_dwords    : SDNode<"SystemZISD::PERMUTE_DWORDS",
208                                 SDT_ZVecTernaryInt>;
209def z_permute           : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>;
210def z_pack              : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>;
211def z_packs_cc          : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConv,
212                                 [SDNPOutGlue]>;
213def z_packls_cc         : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConv,
214                                 [SDNPOutGlue]>;
215def z_unpack_high       : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>;
216def z_unpackl_high      : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>;
217def z_unpack_low        : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>;
218def z_unpackl_low       : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>;
219def z_vshl_by_scalar    : SDNode<"SystemZISD::VSHL_BY_SCALAR",
220                                 SDT_ZVecBinaryInt>;
221def z_vsrl_by_scalar    : SDNode<"SystemZISD::VSRL_BY_SCALAR",
222                                 SDT_ZVecBinaryInt>;
223def z_vsra_by_scalar    : SDNode<"SystemZISD::VSRA_BY_SCALAR",
224                                 SDT_ZVecBinaryInt>;
225def z_vsum              : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>;
226def z_vicmpe            : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>;
227def z_vicmph            : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>;
228def z_vicmphl           : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>;
229def z_vicmpes           : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinary,
230                                 [SDNPOutGlue]>;
231def z_vicmphs           : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinary,
232                                 [SDNPOutGlue]>;
233def z_vicmphls          : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinary,
234                                 [SDNPOutGlue]>;
235def z_vfcmpe            : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>;
236def z_vfcmph            : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>;
237def z_vfcmphe           : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>;
238def z_vfcmpes           : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConv,
239                                 [SDNPOutGlue]>;
240def z_vfcmphs           : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConv,
241                                 [SDNPOutGlue]>;
242def z_vfcmphes          : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConv,
243                                 [SDNPOutGlue]>;
244def z_vextend           : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>;
245def z_vround            : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>;
246def z_vtm               : SDNode<"SystemZISD::VTM", SDT_ZCmp, [SDNPOutGlue]>;
247def z_vfae_cc           : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryInt,
248                                 [SDNPOutGlue]>;
249def z_vfaez_cc          : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryInt,
250                                 [SDNPOutGlue]>;
251def z_vfee_cc           : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinary,
252                                 [SDNPOutGlue]>;
253def z_vfeez_cc          : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinary,
254                                 [SDNPOutGlue]>;
255def z_vfene_cc          : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinary,
256                                 [SDNPOutGlue]>;
257def z_vfenez_cc         : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinary,
258                                 [SDNPOutGlue]>;
259def z_vistr_cc          : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnary,
260                                 [SDNPOutGlue]>;
261def z_vstrc_cc          : SDNode<"SystemZISD::VSTRC_CC", SDT_ZVecQuaternaryInt,
262                                 [SDNPOutGlue]>;
263def z_vstrcz_cc         : SDNode<"SystemZISD::VSTRCZ_CC",
264                                 SDT_ZVecQuaternaryInt, [SDNPOutGlue]>;
265def z_vftci             : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvInt,
266                                 [SDNPOutGlue]>;
267
268class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
269  : SDNode<"SystemZISD::"##name, profile,
270           [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
271
272def z_atomic_swapw      : AtomicWOp<"ATOMIC_SWAPW">;
273def z_atomic_loadw_add  : AtomicWOp<"ATOMIC_LOADW_ADD">;
274def z_atomic_loadw_sub  : AtomicWOp<"ATOMIC_LOADW_SUB">;
275def z_atomic_loadw_and  : AtomicWOp<"ATOMIC_LOADW_AND">;
276def z_atomic_loadw_or   : AtomicWOp<"ATOMIC_LOADW_OR">;
277def z_atomic_loadw_xor  : AtomicWOp<"ATOMIC_LOADW_XOR">;
278def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
279def z_atomic_loadw_min  : AtomicWOp<"ATOMIC_LOADW_MIN">;
280def z_atomic_loadw_max  : AtomicWOp<"ATOMIC_LOADW_MAX">;
281def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
282def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
283def z_atomic_cmp_swapw  : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
284
285def z_mvc               : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
286                                 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
287def z_mvc_loop          : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
288                                 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
289def z_nc                : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
290                                  [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
291def z_nc_loop           : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
292                                  [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
293def z_oc                : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
294                                  [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
295def z_oc_loop           : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
296                                  [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
297def z_xc                : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
298                                  [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
299def z_xc_loop           : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
300                                  [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
301def z_clc               : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
302                                 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
303def z_clc_loop          : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop,
304                                 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
305def z_strcmp            : SDNode<"SystemZISD::STRCMP", SDT_ZString,
306                                 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
307def z_stpcpy            : SDNode<"SystemZISD::STPCPY", SDT_ZString,
308                                 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
309def z_search_string     : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString,
310                                 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
311def z_ipm               : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic,
312                                 [SDNPInGlue]>;
313def z_prefetch          : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
314                                 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
315                                  SDNPMemOperand]>;
316
317def z_tbegin            : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin,
318                                 [SDNPHasChain, SDNPOutGlue, SDNPMayStore,
319                                  SDNPSideEffect]>;
320def z_tbegin_nofloat    : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin,
321                                 [SDNPHasChain, SDNPOutGlue, SDNPMayStore,
322                                  SDNPSideEffect]>;
323def z_tend              : SDNode<"SystemZISD::TEND", SDTNone,
324                                 [SDNPHasChain, SDNPOutGlue, SDNPSideEffect]>;
325
326def z_vshl              : SDNode<"ISD::SHL", SDT_ZVecBinary>;
327def z_vsra              : SDNode<"ISD::SRA", SDT_ZVecBinary>;
328def z_vsrl              : SDNode<"ISD::SRL", SDT_ZVecBinary>;
329
330//===----------------------------------------------------------------------===//
331// Pattern fragments
332//===----------------------------------------------------------------------===//
333
334// Signed and unsigned comparisons.
335def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
336  unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
337  return Type != SystemZICMP::UnsignedOnly;
338}]>;
339def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
340  unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
341  return Type != SystemZICMP::SignedOnly;
342}]>;
343
344// Register- and memory-based TEST UNDER MASK.
345def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>;
346def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>;
347
348// Register sign-extend operations.  Sub-32-bit values are represented as i32s.
349def sext8  : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
350def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
351def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
352
353// Match extensions of an i32 to an i64, followed by an in-register sign
354// extension from a sub-i32 value.
355def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>;
356def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>;
357
358// Register zero-extend operations.  Sub-32-bit values are represented as i32s.
359def zext8  : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
360def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
361def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
362
363// Match extensions of an i32 to an i64, followed by an AND of the low
364// i8 or i16 part.
365def zext8dbl : PatFrag<(ops node:$src), (zext8 (anyext node:$src))>;
366def zext16dbl : PatFrag<(ops node:$src), (zext16 (anyext node:$src))>;
367
368// Typed floating-point loads.
369def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
370def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
371
372// Extending loads in which the extension type can be signed.
373def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
374  unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
375  return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
376}]>;
377def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
378  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
379}]>;
380def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
381  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
382}]>;
383def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
384  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
385}]>;
386
387// Extending loads in which the extension type can be unsigned.
388def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
389  unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
390  return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
391}]>;
392def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
393  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
394}]>;
395def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
396  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
397}]>;
398def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
399  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
400}]>;
401
402// Extending loads in which the extension type doesn't matter.
403def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
404  return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
405}]>;
406def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
407  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
408}]>;
409def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
410  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
411}]>;
412def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
413  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
414}]>;
415
416// Aligned loads.
417class AlignedLoad<SDPatternOperator load>
418  : PatFrag<(ops node:$addr), (load node:$addr), [{
419  auto *Load = cast<LoadSDNode>(N);
420  return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
421}]>;
422def aligned_load         : AlignedLoad<load>;
423def aligned_asextloadi16 : AlignedLoad<asextloadi16>;
424def aligned_asextloadi32 : AlignedLoad<asextloadi32>;
425def aligned_azextloadi16 : AlignedLoad<azextloadi16>;
426def aligned_azextloadi32 : AlignedLoad<azextloadi32>;
427
428// Aligned stores.
429class AlignedStore<SDPatternOperator store>
430  : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
431  auto *Store = cast<StoreSDNode>(N);
432  return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
433}]>;
434def aligned_store         : AlignedStore<store>;
435def aligned_truncstorei16 : AlignedStore<truncstorei16>;
436def aligned_truncstorei32 : AlignedStore<truncstorei32>;
437
438// Non-volatile loads.  Used for instructions that might access the storage
439// location multiple times.
440class NonvolatileLoad<SDPatternOperator load>
441  : PatFrag<(ops node:$addr), (load node:$addr), [{
442  auto *Load = cast<LoadSDNode>(N);
443  return !Load->isVolatile();
444}]>;
445def nonvolatile_load          : NonvolatileLoad<load>;
446def nonvolatile_anyextloadi8  : NonvolatileLoad<anyextloadi8>;
447def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
448def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
449
450// Non-volatile stores.
451class NonvolatileStore<SDPatternOperator store>
452  : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
453  auto *Store = cast<StoreSDNode>(N);
454  return !Store->isVolatile();
455}]>;
456def nonvolatile_store         : NonvolatileStore<store>;
457def nonvolatile_truncstorei8  : NonvolatileStore<truncstorei8>;
458def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
459def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
460
461// A store of a load that can be implemented using MVC.
462def mvc_store : PatFrag<(ops node:$value, node:$addr),
463                        (unindexedstore node:$value, node:$addr),
464                        [{ return storeLoadCanUseMVC(N); }]>;
465
466// Binary read-modify-write operations on memory in which the other
467// operand is also memory and for which block operations like NC can
468// be used.  There are two patterns for each operator, depending on
469// which operand contains the "other" load.
470multiclass block_op<SDPatternOperator operator> {
471  def "1" : PatFrag<(ops node:$value, node:$addr),
472                    (unindexedstore (operator node:$value,
473                                              (unindexedload node:$addr)),
474                                    node:$addr),
475                    [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
476  def "2" : PatFrag<(ops node:$value, node:$addr),
477                    (unindexedstore (operator (unindexedload node:$addr),
478                                              node:$value),
479                                    node:$addr),
480                    [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
481}
482defm block_and : block_op<and>;
483defm block_or  : block_op<or>;
484defm block_xor : block_op<xor>;
485
486// Insertions.
487def inserti8 : PatFrag<(ops node:$src1, node:$src2),
488                       (or (and node:$src1, -256), node:$src2)>;
489def insertll : PatFrag<(ops node:$src1, node:$src2),
490                       (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
491def insertlh : PatFrag<(ops node:$src1, node:$src2),
492                       (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
493def inserthl : PatFrag<(ops node:$src1, node:$src2),
494                       (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
495def inserthh : PatFrag<(ops node:$src1, node:$src2),
496                       (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
497def insertlf : PatFrag<(ops node:$src1, node:$src2),
498                       (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
499def inserthf : PatFrag<(ops node:$src1, node:$src2),
500                       (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
501
502// ORs that can be treated as insertions.
503def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
504                             (or node:$src1, node:$src2), [{
505  unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
506  return CurDAG->MaskedValueIsZero(N->getOperand(0),
507                                   APInt::getLowBitsSet(BitWidth, 8));
508}]>;
509
510// ORs that can be treated as reversed insertions.
511def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
512                                (or node:$src1, node:$src2), [{
513  unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
514  return CurDAG->MaskedValueIsZero(N->getOperand(1),
515                                   APInt::getLowBitsSet(BitWidth, 8));
516}]>;
517
518// Negative integer absolute.
519def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>;
520
521// Integer absolute, matching the canonical form generated by DAGCombiner.
522def z_iabs32 : PatFrag<(ops node:$src),
523                       (xor (add node:$src, (sra node:$src, (i32 31))),
524                            (sra node:$src, (i32 31)))>;
525def z_iabs64 : PatFrag<(ops node:$src),
526                       (xor (add node:$src, (sra node:$src, (i32 63))),
527                            (sra node:$src, (i32 63)))>;
528def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
529def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
530
531// Integer multiply-and-add
532def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3),
533                       (add (mul node:$src1, node:$src2), node:$src3)>;
534
535// Fused multiply-subtract, using the natural operand order.
536def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
537                  (fma node:$src1, node:$src2, (fneg node:$src3))>;
538
539// Fused multiply-add and multiply-subtract, but with the order of the
540// operands matching SystemZ's MA and MS instructions.
541def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
542                    (fma node:$src2, node:$src3, node:$src1)>;
543def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
544                    (fma node:$src2, node:$src3, (fneg node:$src1))>;
545
546// Floating-point negative absolute.
547def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
548
549// Create a unary operator that loads from memory and then performs
550// the given operation on it.
551class loadu<SDPatternOperator operator, SDPatternOperator load = load>
552  : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
553
554// Create a store operator that performs the given unary operation
555// on the value before storing it.
556class storeu<SDPatternOperator operator, SDPatternOperator store = store>
557  : PatFrag<(ops node:$value, node:$addr),
558            (store (operator node:$value), node:$addr)>;
559
560// Vector representation of all-zeros and all-ones.
561def z_vzero : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 0))))>;
562def z_vones : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 65535))))>;
563
564// Load a scalar and replicate it in all elements of a vector.
565class z_replicate_load<ValueType scalartype, SDPatternOperator load>
566  : PatFrag<(ops node:$addr),
567            (z_replicate (scalartype (load node:$addr)))>;
568def z_replicate_loadi8  : z_replicate_load<i32, anyextloadi8>;
569def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>;
570def z_replicate_loadi32 : z_replicate_load<i32, load>;
571def z_replicate_loadi64 : z_replicate_load<i64, load>;
572def z_replicate_loadf32 : z_replicate_load<f32, load>;
573def z_replicate_loadf64 : z_replicate_load<f64, load>;
574
575// Load a scalar and insert it into a single element of a vector.
576class z_vle<ValueType scalartype, SDPatternOperator load>
577  : PatFrag<(ops node:$vec, node:$addr, node:$index),
578            (z_vector_insert node:$vec, (scalartype (load node:$addr)),
579                             node:$index)>;
580def z_vlei8  : z_vle<i32, anyextloadi8>;
581def z_vlei16 : z_vle<i32, anyextloadi16>;
582def z_vlei32 : z_vle<i32, load>;
583def z_vlei64 : z_vle<i64, load>;
584def z_vlef32 : z_vle<f32, load>;
585def z_vlef64 : z_vle<f64, load>;
586
587// Load a scalar and insert it into the low element of the high i64 of a
588// zeroed vector.
589class z_vllez<ValueType scalartype, SDPatternOperator load, int index>
590  : PatFrag<(ops node:$addr),
591            (z_vector_insert (z_vzero),
592                             (scalartype (load node:$addr)), (i32 index))>;
593def z_vllezi8  : z_vllez<i32, anyextloadi8, 7>;
594def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>;
595def z_vllezi32 : z_vllez<i32, load, 1>;
596def z_vllezi64 : PatFrag<(ops node:$addr),
597                         (z_join_dwords (i64 (load node:$addr)), (i64 0))>;
598// We use high merges to form a v4f32 from four f32s.  Propagating zero
599// into all elements but index 1 gives this expression.
600def z_vllezf32 : PatFrag<(ops node:$addr),
601                         (bitconvert
602                          (z_merge_high
603                           (v2i64
604                            (z_unpackl_high
605                             (v4i32
606                              (bitconvert
607                               (v4f32 (scalar_to_vector
608                                       (f32 (load node:$addr)))))))),
609                           (v2i64 (z_vzero))))>;
610def z_vllezf64 : PatFrag<(ops node:$addr),
611                         (z_merge_high
612                          (scalar_to_vector (f64 (load node:$addr))),
613                          (z_vzero))>;
614
615// Store one element of a vector.
616class z_vste<ValueType scalartype, SDPatternOperator store>
617  : PatFrag<(ops node:$vec, node:$addr, node:$index),
618            (store (scalartype (z_vector_extract node:$vec, node:$index)),
619                   node:$addr)>;
620def z_vstei8  : z_vste<i32, truncstorei8>;
621def z_vstei16 : z_vste<i32, truncstorei16>;
622def z_vstei32 : z_vste<i32, store>;
623def z_vstei64 : z_vste<i64, store>;
624def z_vstef32 : z_vste<f32, store>;
625def z_vstef64 : z_vste<f64, store>;
626
627// Arithmetic negation on vectors.
628def z_vneg : PatFrag<(ops node:$x), (sub (z_vzero), node:$x)>;
629
630// Bitwise negation on vectors.
631def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (z_vones))>;
632
633// Signed "integer greater than zero" on vectors.
634def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (z_vzero))>;
635
636// Signed "integer less than zero" on vectors.
637def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (z_vzero), node:$x)>;
638
639// Integer absolute on vectors.
640class z_viabs<int shift>
641  : PatFrag<(ops node:$src),
642            (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))),
643                 (z_vsra_by_scalar node:$src, (i32 shift)))>;
644def z_viabs8  : z_viabs<7>;
645def z_viabs16 : z_viabs<15>;
646def z_viabs32 : z_viabs<31>;
647def z_viabs64 : z_viabs<63>;
648
649// Sign-extend the i64 elements of a vector.
650class z_vse<int shift>
651  : PatFrag<(ops node:$src),
652            (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>;
653def z_vsei8  : z_vse<56>;
654def z_vsei16 : z_vse<48>;
655def z_vsei32 : z_vse<32>;
656
657// ...and again with the extensions being done on individual i64 scalars.
658class z_vse_by_parts<SDPatternOperator operator, int index1, int index2>
659  : PatFrag<(ops node:$src),
660            (z_join_dwords
661             (operator (z_vector_extract node:$src, index1)),
662             (operator (z_vector_extract node:$src, index2)))>;
663def z_vsei8_by_parts  : z_vse_by_parts<sext8dbl, 7, 15>;
664def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>;
665def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>;
666