1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZGR128Binary : SDTypeProfile<1, 2, 44 [SDTCisVT<0, untyped>, 45 SDTCisInt<1>, 46 SDTCisInt<2>]>; 47def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 48 [SDTCisInt<0>, 49 SDTCisVT<1, i32>, 50 SDTCisSameAs<0, 2>, 51 SDTCisSameAs<0, 3>]>; 52def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 53 [SDTCisInt<0>, 54 SDTCisVT<1, i32>, 55 SDTCisSameAs<0, 2>, 56 SDTCisSameAs<0, 3>, 57 SDTCisVT<1, i32>]>; 58def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 59 [SDTCisVT<0, i32>, 60 SDTCisPtrTy<1>, 61 SDTCisVT<2, i32>, 62 SDTCisVT<3, i32>, 63 SDTCisVT<4, i32>, 64 SDTCisVT<5, i32>]>; 65def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 66 [SDTCisVT<0, i32>, 67 SDTCisVT<1, i32>, 68 SDTCisPtrTy<2>, 69 SDTCisVT<3, i32>, 70 SDTCisVT<4, i32>, 71 SDTCisVT<5, i32>, 72 SDTCisVT<6, i32>, 73 SDTCisVT<7, i32>]>; 74def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 75 [SDTCisInt<0>, 76 SDTCisVT<1, i32>, 77 SDTCisPtrTy<2>, 78 SDTCisSameAs<0, 3>, 79 SDTCisSameAs<0, 4>]>; 80def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 81 [SDTCisVT<0, untyped>, 82 SDTCisPtrTy<1>]>; 83def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 84 [SDTCisVT<0, untyped>, 85 SDTCisPtrTy<1>]>; 86def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 87 [SDTCisVT<0, untyped>, 88 SDTCisVT<1, i32>, 89 SDTCisPtrTy<2>, 90 SDTCisVT<3, untyped>, 91 SDTCisVT<4, untyped>]>; 92def SDT_ZMemMemLength : SDTypeProfile<0, 3, 93 [SDTCisPtrTy<0>, 94 SDTCisPtrTy<1>, 95 SDTCisVT<2, i64>]>; 96def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 97 [SDTCisVT<0, i32>, 98 SDTCisPtrTy<1>, 99 SDTCisPtrTy<2>, 100 SDTCisVT<3, i64>]>; 101def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 102 [SDTCisPtrTy<0>, 103 SDTCisPtrTy<1>, 104 SDTCisVT<2, i64>, 105 SDTCisVT<3, i64>]>; 106def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4, 107 [SDTCisVT<0, i32>, 108 SDTCisPtrTy<1>, 109 SDTCisPtrTy<2>, 110 SDTCisVT<3, i64>, 111 SDTCisVT<4, i64>]>; 112def SDT_ZString : SDTypeProfile<1, 3, 113 [SDTCisPtrTy<0>, 114 SDTCisPtrTy<1>, 115 SDTCisPtrTy<2>, 116 SDTCisVT<3, i32>]>; 117def SDT_ZStringCC : SDTypeProfile<2, 3, 118 [SDTCisPtrTy<0>, 119 SDTCisVT<1, i32>, 120 SDTCisPtrTy<2>, 121 SDTCisPtrTy<3>, 122 SDTCisVT<4, i32>]>; 123def SDT_ZIPM : SDTypeProfile<1, 1, 124 [SDTCisVT<0, i32>, 125 SDTCisVT<1, i32>]>; 126def SDT_ZPrefetch : SDTypeProfile<0, 2, 127 [SDTCisVT<0, i32>, 128 SDTCisPtrTy<1>]>; 129def SDT_ZTBegin : SDTypeProfile<1, 2, 130 [SDTCisVT<0, i32>, 131 SDTCisPtrTy<1>, 132 SDTCisVT<2, i32>]>; 133def SDT_ZTEnd : SDTypeProfile<1, 0, 134 [SDTCisVT<0, i32>]>; 135def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 136 [SDTCisVec<0>, 137 SDTCisSameAs<0, 1>, 138 SDTCisVT<3, i32>]>; 139def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 140 [SDTCisVec<1>, 141 SDTCisVT<2, i32>]>; 142def SDT_ZReplicate : SDTypeProfile<1, 1, 143 [SDTCisVec<0>]>; 144def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 145 [SDTCisVec<0>, 146 SDTCisVec<1>]>; 147def SDT_ZVecUnary : SDTypeProfile<1, 1, 148 [SDTCisVec<0>, 149 SDTCisSameAs<0, 1>]>; 150def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 151 [SDTCisVec<0>, 152 SDTCisVT<1, i32>, 153 SDTCisSameAs<0, 2>]>; 154def SDT_ZVecBinary : SDTypeProfile<1, 2, 155 [SDTCisVec<0>, 156 SDTCisSameAs<0, 1>, 157 SDTCisSameAs<0, 2>]>; 158def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 159 [SDTCisVec<0>, 160 SDTCisVT<1, i32>, 161 SDTCisSameAs<0, 2>, 162 SDTCisSameAs<0, 2>]>; 163def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 164 [SDTCisVec<0>, 165 SDTCisSameAs<0, 1>, 166 SDTCisVT<2, i32>]>; 167def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 168 [SDTCisVec<0>, 169 SDTCisVec<1>, 170 SDTCisSameAs<1, 2>]>; 171def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 172 [SDTCisVec<0>, 173 SDTCisVT<1, i32>, 174 SDTCisVec<2>, 175 SDTCisSameAs<2, 3>]>; 176def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 177 [SDTCisVec<0>, 178 SDTCisVT<1, i32>, 179 SDTCisVec<2>, 180 SDTCisVT<3, i32>]>; 181def SDT_ZRotateMask : SDTypeProfile<1, 2, 182 [SDTCisVec<0>, 183 SDTCisVT<1, i32>, 184 SDTCisVT<2, i32>]>; 185def SDT_ZJoinDwords : SDTypeProfile<1, 2, 186 [SDTCisVT<0, v2i64>, 187 SDTCisVT<1, i64>, 188 SDTCisVT<2, i64>]>; 189def SDT_ZVecTernary : SDTypeProfile<1, 3, 190 [SDTCisVec<0>, 191 SDTCisSameAs<0, 1>, 192 SDTCisSameAs<0, 2>, 193 SDTCisSameAs<0, 3>]>; 194def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3, 195 [SDTCisVec<0>, 196 SDTCisVT<1, i32>, 197 SDTCisVec<2>, 198 SDTCisSameAs<2, 3>, 199 SDTCisSameAs<0, 4>]>; 200def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 201 [SDTCisVec<0>, 202 SDTCisSameAs<0, 1>, 203 SDTCisSameAs<0, 2>, 204 SDTCisVT<3, i32>]>; 205def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 206 [SDTCisVec<0>, 207 SDTCisVT<1, i32>, 208 SDTCisSameAs<0, 2>, 209 SDTCisSameAs<0, 3>, 210 SDTCisVT<4, i32>]>; 211def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 212 [SDTCisVec<0>, 213 SDTCisSameAs<0, 1>, 214 SDTCisSameAs<0, 2>, 215 SDTCisSameAs<0, 3>, 216 SDTCisVT<4, i32>]>; 217def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 218 [SDTCisVec<0>, 219 SDTCisVT<1, i32>, 220 SDTCisSameAs<0, 2>, 221 SDTCisSameAs<0, 3>, 222 SDTCisSameAs<0, 4>, 223 SDTCisVT<5, i32>]>; 224def SDT_ZTest : SDTypeProfile<1, 2, 225 [SDTCisVT<0, i32>, 226 SDTCisVT<2, i64>]>; 227 228//===----------------------------------------------------------------------===// 229// Node definitions 230//===----------------------------------------------------------------------===// 231 232// These are target-independent nodes, but have target-specific formats. 233def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 234 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 235def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 236 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 237 SDNPOutGlue]>; 238def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 239 240// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 241def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 242 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 243def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 244 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 245 SDNPVariadic]>; 246def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 247 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 248 SDNPVariadic]>; 249def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 250 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 251 SDNPVariadic]>; 252def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 253 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 254 SDNPVariadic]>; 255def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 256def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 257 SDT_ZWrapOffset, []>; 258def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 259def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 260def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 261def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp, 262 [SDNPHasChain]>; 263def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp, 264 [SDNPHasChain]>; 265def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 266def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 267 [SDNPHasChain]>; 268def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 269 SDT_ZSelectCCMask>; 270def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 271def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 272def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 273def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 274def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 275def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 276def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 277def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 278def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 279def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 280def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 281def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 282def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 283 284def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 285 [SDNPHasChain, SDNPSideEffect]>; 286 287def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 288 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 289def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 290 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 291def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad, 292 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 293def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore, 294 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 295 296def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 297 298// Defined because the index is an i32 rather than a pointer. 299def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 300 SDT_ZInsertVectorElt>; 301def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 302 SDT_ZExtractVectorElt>; 303def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 304def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 305def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 306def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 307def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 308def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 309def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 310def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 311def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 312 SDT_ZVecTernaryInt>; 313def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 314def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 315def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 316def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 317def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 318def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 319def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 320def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 321def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 322 SDT_ZVecBinaryInt>; 323def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 324 SDT_ZVecBinaryInt>; 325def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 326 SDT_ZVecBinaryInt>; 327def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 328def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 329def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 330def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 331def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 332def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 333def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 334def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 335def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE", 336 SDT_ZVecBinaryConv, [SDNPHasChain]>; 337def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES", 338 SDT_ZVecBinaryConv, [SDNPHasChain]>; 339def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 340def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH", 341 SDT_ZVecBinaryConv, [SDNPHasChain]>; 342def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS", 343 SDT_ZVecBinaryConv, [SDNPHasChain]>; 344def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 345def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE", 346 SDT_ZVecBinaryConv, [SDNPHasChain]>; 347def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES", 348 SDT_ZVecBinaryConv, [SDNPHasChain]>; 349def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 350def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 351def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 352def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 353def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND", 354 SDT_ZVecUnaryConv, [SDNPHasChain]>; 355def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 356def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 357def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 358def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 359def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 360def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 361def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 362def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 363def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 364def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 365 SDT_ZVecQuaternaryIntCC>; 366def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 367 SDT_ZVecQuaternaryIntCC>; 368def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC", 369 SDT_ZVecTernaryConvCC>; 370def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC", 371 SDT_ZVecTernaryConvCC>; 372def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 373 374class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 375 : SDNode<"SystemZISD::"##name, profile, 376 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 377 378def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 379def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 380def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 381def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 382def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 383def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 384def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 385def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 386def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 387def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 388def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 389 390def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 391 SDT_ZAtomicCmpSwap, 392 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 393 SDNPMemOperand]>; 394def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 395 SDT_ZAtomicCmpSwapW, 396 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 397 SDNPMemOperand]>; 398 399def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 400 SDT_ZAtomicLoad128, 401 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 402def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 403 SDT_ZAtomicStore128, 404 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 405def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 406 SDT_ZAtomicCmpSwap128, 407 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 408 SDNPMemOperand]>; 409 410def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 411 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 412def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 413 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 414def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 415 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 416def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 417 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 418def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 419 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 420def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 421 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 422def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 423 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 424def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 425 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 426def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 427 [SDNPHasChain, SDNPMayLoad]>; 428def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC, 429 [SDNPHasChain, SDNPMayLoad]>; 430def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 431 [SDNPHasChain, SDNPMayLoad]>; 432def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 433 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 434def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 435 [SDNPHasChain, SDNPMayLoad]>; 436def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 437 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 438 SDNPMemOperand]>; 439 440def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 441 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 442def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 443 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 444def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 445 [SDNPHasChain, SDNPSideEffect]>; 446 447def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 448def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 449def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 450 451//===----------------------------------------------------------------------===// 452// Pattern fragments 453//===----------------------------------------------------------------------===// 454 455def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 456 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 457}]>; 458def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 459 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 460}]>; 461def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 462 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 463}]>; 464 465def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 466 (z_storebswap node:$src, node:$addr), [{ 467 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 468}]>; 469def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 470 (z_storebswap node:$src, node:$addr), [{ 471 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 472}]>; 473def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 474 (z_storebswap node:$src, node:$addr), [{ 475 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 476}]>; 477 478// Fragments including CC as an implicit source. 479def z_br_ccmask 480 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 481 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 482def z_select_ccmask 483 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 484 (z_select_ccmask_1 node:$true, node:$false, 485 node:$valid, node:$mask, CC)>; 486def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 487def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 488 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 489def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 490 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 491 492// Signed and unsigned comparisons. 493def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 494 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 495 return Type != SystemZICMP::UnsignedOnly; 496}]>; 497def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 498 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 499 return Type != SystemZICMP::SignedOnly; 500}]>; 501 502// Register- and memory-based TEST UNDER MASK. 503def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>; 504def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 505 506// Register sign-extend operations. Sub-32-bit values are represented as i32s. 507def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 508def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 509def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 510 511// Match extensions of an i32 to an i64, followed by an in-register sign 512// extension from a sub-i32 value. 513def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 514def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 515 516// Register zero-extend operations. Sub-32-bit values are represented as i32s. 517def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 518def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 519def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 520 521// Extending loads in which the extension type can be signed. 522def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 523 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 524 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 525}]>; 526def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 527 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 528}]>; 529def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 530 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 531}]>; 532def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 533 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 534}]>; 535 536// Extending loads in which the extension type can be unsigned. 537def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 538 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 539 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 540}]>; 541def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 542 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 543}]>; 544def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 545 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 546}]>; 547def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 548 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 549}]>; 550 551// Extending loads in which the extension type doesn't matter. 552def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 553 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 554}]>; 555def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 556 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 557}]>; 558def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 559 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 560}]>; 561def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 562 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 563}]>; 564 565// Aligned loads. 566class AlignedLoad<SDPatternOperator load> 567 : PatFrag<(ops node:$addr), (load node:$addr), [{ 568 auto *Load = cast<LoadSDNode>(N); 569 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 570}]>; 571def aligned_load : AlignedLoad<load>; 572def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 573def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 574def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 575def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 576 577// Aligned stores. 578class AlignedStore<SDPatternOperator store> 579 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 580 auto *Store = cast<StoreSDNode>(N); 581 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 582}]>; 583def aligned_store : AlignedStore<store>; 584def aligned_truncstorei16 : AlignedStore<truncstorei16>; 585def aligned_truncstorei32 : AlignedStore<truncstorei32>; 586 587// Non-volatile loads. Used for instructions that might access the storage 588// location multiple times. 589class NonvolatileLoad<SDPatternOperator load> 590 : PatFrag<(ops node:$addr), (load node:$addr), [{ 591 auto *Load = cast<LoadSDNode>(N); 592 return !Load->isVolatile(); 593}]>; 594def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 595def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 596def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 597 598// Non-volatile stores. 599class NonvolatileStore<SDPatternOperator store> 600 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 601 auto *Store = cast<StoreSDNode>(N); 602 return !Store->isVolatile(); 603}]>; 604def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 605def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 606def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 607 608// A store of a load that can be implemented using MVC. 609def mvc_store : PatFrag<(ops node:$value, node:$addr), 610 (unindexedstore node:$value, node:$addr), 611 [{ return storeLoadCanUseMVC(N); }]>; 612 613// Binary read-modify-write operations on memory in which the other 614// operand is also memory and for which block operations like NC can 615// be used. There are two patterns for each operator, depending on 616// which operand contains the "other" load. 617multiclass block_op<SDPatternOperator operator> { 618 def "1" : PatFrag<(ops node:$value, node:$addr), 619 (unindexedstore (operator node:$value, 620 (unindexedload node:$addr)), 621 node:$addr), 622 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 623 def "2" : PatFrag<(ops node:$value, node:$addr), 624 (unindexedstore (operator (unindexedload node:$addr), 625 node:$value), 626 node:$addr), 627 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 628} 629defm block_and : block_op<and>; 630defm block_or : block_op<or>; 631defm block_xor : block_op<xor>; 632 633// Insertions. 634def inserti8 : PatFrag<(ops node:$src1, node:$src2), 635 (or (and node:$src1, -256), node:$src2)>; 636def insertll : PatFrag<(ops node:$src1, node:$src2), 637 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 638def insertlh : PatFrag<(ops node:$src1, node:$src2), 639 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 640def inserthl : PatFrag<(ops node:$src1, node:$src2), 641 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 642def inserthh : PatFrag<(ops node:$src1, node:$src2), 643 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 644def insertlf : PatFrag<(ops node:$src1, node:$src2), 645 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 646def inserthf : PatFrag<(ops node:$src1, node:$src2), 647 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 648 649// ORs that can be treated as insertions. 650def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 651 (or node:$src1, node:$src2), [{ 652 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 653 return CurDAG->MaskedValueIsZero(N->getOperand(0), 654 APInt::getLowBitsSet(BitWidth, 8)); 655}]>; 656 657// ORs that can be treated as reversed insertions. 658def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 659 (or node:$src1, node:$src2), [{ 660 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 661 return CurDAG->MaskedValueIsZero(N->getOperand(1), 662 APInt::getLowBitsSet(BitWidth, 8)); 663}]>; 664 665// Negative integer absolute. 666def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 667 668// Integer absolute, matching the canonical form generated by DAGCombiner. 669def z_iabs32 : PatFrag<(ops node:$src), 670 (xor (add node:$src, (sra node:$src, (i32 31))), 671 (sra node:$src, (i32 31)))>; 672def z_iabs64 : PatFrag<(ops node:$src), 673 (xor (add node:$src, (sra node:$src, (i32 63))), 674 (sra node:$src, (i32 63)))>; 675def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 676def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 677 678// Integer multiply-and-add 679def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 680 (add (mul node:$src1, node:$src2), node:$src3)>; 681 682// Alternatives to match operations with or without an overflow CC result. 683def z_sadd : PatFrags<(ops node:$src1, node:$src2), 684 [(z_saddo node:$src1, node:$src2), 685 (add node:$src1, node:$src2)]>; 686def z_uadd : PatFrags<(ops node:$src1, node:$src2), 687 [(z_uaddo node:$src1, node:$src2), 688 (add node:$src1, node:$src2)]>; 689def z_ssub : PatFrags<(ops node:$src1, node:$src2), 690 [(z_ssubo node:$src1, node:$src2), 691 (sub node:$src1, node:$src2)]>; 692def z_usub : PatFrags<(ops node:$src1, node:$src2), 693 [(z_usubo node:$src1, node:$src2), 694 (sub node:$src1, node:$src2)]>; 695 696// Combined logical operations. 697def andc : PatFrag<(ops node:$src1, node:$src2), 698 (and node:$src1, (not node:$src2))>; 699def orc : PatFrag<(ops node:$src1, node:$src2), 700 (or node:$src1, (not node:$src2))>; 701def nand : PatFrag<(ops node:$src1, node:$src2), 702 (not (and node:$src1, node:$src2))>; 703def nor : PatFrag<(ops node:$src1, node:$src2), 704 (not (or node:$src1, node:$src2))>; 705def nxor : PatFrag<(ops node:$src1, node:$src2), 706 (not (xor node:$src1, node:$src2))>; 707 708// Fused multiply-subtract, using the natural operand order. 709def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 710 (any_fma node:$src1, node:$src2, (fneg node:$src3))>; 711 712// Fused multiply-add and multiply-subtract, but with the order of the 713// operands matching SystemZ's MA and MS instructions. 714def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 715 (any_fma node:$src2, node:$src3, node:$src1)>; 716def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 717 (any_fma node:$src2, node:$src3, (fneg node:$src1))>; 718 719// Negative fused multiply-add and multiply-subtract. 720def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 721 (fneg (any_fma node:$src1, node:$src2, node:$src3))>; 722def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 723 (fneg (any_fms node:$src1, node:$src2, node:$src3))>; 724 725// Floating-point negative absolute. 726def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 727 728// Strict floating-point fragments. 729def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs), 730 [(z_strict_fcmp node:$lhs, node:$rhs), 731 (z_fcmp node:$lhs, node:$rhs)]>; 732def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs), 733 [(z_strict_vfcmpe node:$lhs, node:$rhs), 734 (z_vfcmpe node:$lhs, node:$rhs)]>; 735def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs), 736 [(z_strict_vfcmph node:$lhs, node:$rhs), 737 (z_vfcmph node:$lhs, node:$rhs)]>; 738def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs), 739 [(z_strict_vfcmphe node:$lhs, node:$rhs), 740 (z_vfcmphe node:$lhs, node:$rhs)]>; 741def z_any_vextend : PatFrags<(ops node:$src), 742 [(z_strict_vextend node:$src), 743 (z_vextend node:$src)]>; 744 745// Create a unary operator that loads from memory and then performs 746// the given operation on it. 747class loadu<SDPatternOperator operator, SDPatternOperator load = load> 748 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 749 750// Create a store operator that performs the given unary operation 751// on the value before storing it. 752class storeu<SDPatternOperator operator, SDPatternOperator store = store> 753 : PatFrag<(ops node:$value, node:$addr), 754 (store (operator node:$value), node:$addr)>; 755 756// Create a store operator that performs the given inherent operation 757// and stores the resulting value. 758class storei<SDPatternOperator operator, SDPatternOperator store = store> 759 : PatFrag<(ops node:$addr), 760 (store (operator), node:$addr)>; 761 762// Create a shift operator that optionally ignores an AND of the 763// shift count with an immediate if the bottom 6 bits are all set. 764def imm32bottom6set : PatLeaf<(i32 imm), [{ 765 return (N->getZExtValue() & 0x3f) == 0x3f; 766}]>; 767class shiftop<SDPatternOperator operator> 768 : PatFrags<(ops node:$val, node:$count), 769 [(operator node:$val, node:$count), 770 (operator node:$val, (and node:$count, imm32bottom6set))]>; 771 772def imm32mod64 : PatLeaf<(i32 imm), [{ 773 return (N->getZExtValue() % 64 == 0); 774}]>; 775 776// Load a scalar and replicate it in all elements of a vector. 777class z_replicate_load<ValueType scalartype, SDPatternOperator load> 778 : PatFrag<(ops node:$addr), 779 (z_replicate (scalartype (load node:$addr)))>; 780def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 781def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 782def z_replicate_loadi32 : z_replicate_load<i32, load>; 783def z_replicate_loadi64 : z_replicate_load<i64, load>; 784def z_replicate_loadf32 : z_replicate_load<f32, load>; 785def z_replicate_loadf64 : z_replicate_load<f64, load>; 786// Byte-swapped replicated vector element loads. 787def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>; 788def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>; 789def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>; 790 791// Load a scalar and insert it into a single element of a vector. 792class z_vle<ValueType scalartype, SDPatternOperator load> 793 : PatFrag<(ops node:$vec, node:$addr, node:$index), 794 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 795 node:$index)>; 796def z_vlei8 : z_vle<i32, anyextloadi8>; 797def z_vlei16 : z_vle<i32, anyextloadi16>; 798def z_vlei32 : z_vle<i32, load>; 799def z_vlei64 : z_vle<i64, load>; 800def z_vlef32 : z_vle<f32, load>; 801def z_vlef64 : z_vle<f64, load>; 802// Byte-swapped vector element loads. 803def z_vlebri16 : z_vle<i32, z_loadbswap16>; 804def z_vlebri32 : z_vle<i32, z_loadbswap32>; 805def z_vlebri64 : z_vle<i64, z_loadbswap64>; 806 807// Load a scalar and insert it into the low element of the high i64 of a 808// zeroed vector. 809class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 810 : PatFrag<(ops node:$addr), 811 (z_vector_insert immAllZerosV, 812 (scalartype (load node:$addr)), (i32 index))>; 813def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 814def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 815def z_vllezi32 : z_vllez<i32, load, 1>; 816def z_vllezi64 : PatFrags<(ops node:$addr), 817 [(z_vector_insert immAllZerosV, 818 (i64 (load node:$addr)), (i32 0)), 819 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 820// We use high merges to form a v4f32 from four f32s. Propagating zero 821// into all elements but index 1 gives this expression. 822def z_vllezf32 : PatFrag<(ops node:$addr), 823 (z_merge_high 824 (v2i64 825 (z_unpackl_high 826 (v4i32 827 (bitconvert 828 (v4f32 (scalar_to_vector 829 (f32 (load node:$addr)))))))), 830 (v2i64 831 (bitconvert (v4f32 immAllZerosV))))>; 832def z_vllezf64 : PatFrag<(ops node:$addr), 833 (z_merge_high 834 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 835 immAllZerosV)>; 836 837// Similarly for the high element of a zeroed vector. 838def z_vllezli32 : z_vllez<i32, load, 0>; 839def z_vllezlf32 : PatFrag<(ops node:$addr), 840 (z_merge_high 841 (v2i64 842 (bitconvert 843 (z_merge_high 844 (v4f32 (scalar_to_vector 845 (f32 (load node:$addr)))), 846 (v4f32 immAllZerosV)))), 847 (v2i64 848 (bitconvert (v4f32 immAllZerosV))))>; 849 850// Byte-swapped variants. 851def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>; 852def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>; 853def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>; 854def z_vllebrzi64 : PatFrags<(ops node:$addr), 855 [(z_vector_insert immAllZerosV, 856 (i64 (z_loadbswap64 node:$addr)), 857 (i32 0)), 858 (z_join_dwords (i64 (z_loadbswap64 node:$addr)), 859 (i64 0))]>; 860 861 862// Store one element of a vector. 863class z_vste<ValueType scalartype, SDPatternOperator store> 864 : PatFrag<(ops node:$vec, node:$addr, node:$index), 865 (store (scalartype (z_vector_extract node:$vec, node:$index)), 866 node:$addr)>; 867def z_vstei8 : z_vste<i32, truncstorei8>; 868def z_vstei16 : z_vste<i32, truncstorei16>; 869def z_vstei32 : z_vste<i32, store>; 870def z_vstei64 : z_vste<i64, store>; 871def z_vstef32 : z_vste<f32, store>; 872def z_vstef64 : z_vste<f64, store>; 873// Byte-swapped vector element stores. 874def z_vstebri16 : z_vste<i32, z_storebswap16>; 875def z_vstebri32 : z_vste<i32, z_storebswap32>; 876def z_vstebri64 : z_vste<i64, z_storebswap64>; 877 878// Arithmetic negation on vectors. 879def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 880 881// Bitwise negation on vectors. 882def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 883 884// Signed "integer greater than zero" on vectors. 885def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 886 887// Signed "integer less than zero" on vectors. 888def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 889 890// Integer absolute on vectors. 891class z_viabs<int shift> 892 : PatFrag<(ops node:$src), 893 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 894 (z_vsra_by_scalar node:$src, (i32 shift)))>; 895def z_viabs8 : z_viabs<7>; 896def z_viabs16 : z_viabs<15>; 897def z_viabs32 : z_viabs<31>; 898def z_viabs64 : z_viabs<63>; 899 900// Sign-extend the i64 elements of a vector. 901class z_vse<int shift> 902 : PatFrag<(ops node:$src), 903 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 904def z_vsei8 : z_vse<56>; 905def z_vsei16 : z_vse<48>; 906def z_vsei32 : z_vse<32>; 907 908// ...and again with the extensions being done on individual i64 scalars. 909class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 910 : PatFrag<(ops node:$src), 911 (z_join_dwords 912 (operator (z_vector_extract node:$src, index1)), 913 (operator (z_vector_extract node:$src, index2)))>; 914def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 915def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 916def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 917