1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZGR128Binary : SDTypeProfile<1, 2, 44 [SDTCisVT<0, untyped>, 45 SDTCisInt<1>, 46 SDTCisInt<2>]>; 47def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 48 [SDTCisInt<0>, 49 SDTCisVT<1, i32>, 50 SDTCisSameAs<0, 2>, 51 SDTCisSameAs<0, 3>]>; 52def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 53 [SDTCisInt<0>, 54 SDTCisVT<1, i32>, 55 SDTCisSameAs<0, 2>, 56 SDTCisSameAs<0, 3>, 57 SDTCisVT<1, i32>]>; 58def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 59 [SDTCisVT<0, i32>, 60 SDTCisPtrTy<1>, 61 SDTCisVT<2, i32>, 62 SDTCisVT<3, i32>, 63 SDTCisVT<4, i32>, 64 SDTCisVT<5, i32>]>; 65def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 66 [SDTCisVT<0, i32>, 67 SDTCisVT<1, i32>, 68 SDTCisPtrTy<2>, 69 SDTCisVT<3, i32>, 70 SDTCisVT<4, i32>, 71 SDTCisVT<5, i32>, 72 SDTCisVT<6, i32>, 73 SDTCisVT<7, i32>]>; 74def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 75 [SDTCisInt<0>, 76 SDTCisVT<1, i32>, 77 SDTCisPtrTy<2>, 78 SDTCisSameAs<0, 3>, 79 SDTCisSameAs<0, 4>]>; 80def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 81 [SDTCisVT<0, untyped>, 82 SDTCisPtrTy<1>]>; 83def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 84 [SDTCisVT<0, untyped>, 85 SDTCisPtrTy<1>]>; 86def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 87 [SDTCisVT<0, untyped>, 88 SDTCisVT<1, i32>, 89 SDTCisPtrTy<2>, 90 SDTCisVT<3, untyped>, 91 SDTCisVT<4, untyped>]>; 92def SDT_ZMemMemLength : SDTypeProfile<0, 3, 93 [SDTCisPtrTy<0>, 94 SDTCisPtrTy<1>, 95 SDTCisVT<2, i64>]>; 96def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 97 [SDTCisVT<0, i32>, 98 SDTCisPtrTy<1>, 99 SDTCisPtrTy<2>, 100 SDTCisVT<3, i64>]>; 101def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 102 [SDTCisPtrTy<0>, 103 SDTCisPtrTy<1>, 104 SDTCisVT<2, i64>, 105 SDTCisVT<3, i64>]>; 106def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4, 107 [SDTCisVT<0, i32>, 108 SDTCisPtrTy<1>, 109 SDTCisPtrTy<2>, 110 SDTCisVT<3, i64>, 111 SDTCisVT<4, i64>]>; 112def SDT_ZString : SDTypeProfile<1, 3, 113 [SDTCisPtrTy<0>, 114 SDTCisPtrTy<1>, 115 SDTCisPtrTy<2>, 116 SDTCisVT<3, i32>]>; 117def SDT_ZStringCC : SDTypeProfile<2, 3, 118 [SDTCisPtrTy<0>, 119 SDTCisVT<1, i32>, 120 SDTCisPtrTy<2>, 121 SDTCisPtrTy<3>, 122 SDTCisVT<4, i32>]>; 123def SDT_ZIPM : SDTypeProfile<1, 1, 124 [SDTCisVT<0, i32>, 125 SDTCisVT<1, i32>]>; 126def SDT_ZPrefetch : SDTypeProfile<0, 2, 127 [SDTCisVT<0, i32>, 128 SDTCisPtrTy<1>]>; 129def SDT_ZTBegin : SDTypeProfile<1, 2, 130 [SDTCisVT<0, i32>, 131 SDTCisPtrTy<1>, 132 SDTCisVT<2, i32>]>; 133def SDT_ZTEnd : SDTypeProfile<1, 0, 134 [SDTCisVT<0, i32>]>; 135def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 136 [SDTCisVec<0>, 137 SDTCisSameAs<0, 1>, 138 SDTCisVT<3, i32>]>; 139def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 140 [SDTCisVec<1>, 141 SDTCisVT<2, i32>]>; 142def SDT_ZReplicate : SDTypeProfile<1, 1, 143 [SDTCisVec<0>]>; 144def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 145 [SDTCisVec<0>, 146 SDTCisVec<1>]>; 147def SDT_ZVecUnary : SDTypeProfile<1, 1, 148 [SDTCisVec<0>, 149 SDTCisSameAs<0, 1>]>; 150def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 151 [SDTCisVec<0>, 152 SDTCisVT<1, i32>, 153 SDTCisSameAs<0, 2>]>; 154def SDT_ZVecBinary : SDTypeProfile<1, 2, 155 [SDTCisVec<0>, 156 SDTCisSameAs<0, 1>, 157 SDTCisSameAs<0, 2>]>; 158def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 159 [SDTCisVec<0>, 160 SDTCisVT<1, i32>, 161 SDTCisSameAs<0, 2>, 162 SDTCisSameAs<0, 2>]>; 163def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 164 [SDTCisVec<0>, 165 SDTCisSameAs<0, 1>, 166 SDTCisVT<2, i32>]>; 167def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 168 [SDTCisVec<0>, 169 SDTCisVec<1>, 170 SDTCisSameAs<1, 2>]>; 171def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 172 [SDTCisVec<0>, 173 SDTCisVT<1, i32>, 174 SDTCisVec<2>, 175 SDTCisSameAs<2, 3>]>; 176def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 177 [SDTCisVec<0>, 178 SDTCisVT<1, i32>, 179 SDTCisVec<2>, 180 SDTCisVT<3, i32>]>; 181def SDT_ZRotateMask : SDTypeProfile<1, 2, 182 [SDTCisVec<0>, 183 SDTCisVT<1, i32>, 184 SDTCisVT<2, i32>]>; 185def SDT_ZJoinDwords : SDTypeProfile<1, 2, 186 [SDTCisVT<0, v2i64>, 187 SDTCisVT<1, i64>, 188 SDTCisVT<2, i64>]>; 189def SDT_ZVecTernary : SDTypeProfile<1, 3, 190 [SDTCisVec<0>, 191 SDTCisSameAs<0, 1>, 192 SDTCisSameAs<0, 2>, 193 SDTCisSameAs<0, 3>]>; 194def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 195 [SDTCisVec<0>, 196 SDTCisSameAs<0, 1>, 197 SDTCisSameAs<0, 2>, 198 SDTCisVT<3, i32>]>; 199def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 200 [SDTCisVec<0>, 201 SDTCisVT<1, i32>, 202 SDTCisSameAs<0, 2>, 203 SDTCisSameAs<0, 3>, 204 SDTCisVT<4, i32>]>; 205def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 206 [SDTCisVec<0>, 207 SDTCisSameAs<0, 1>, 208 SDTCisSameAs<0, 2>, 209 SDTCisSameAs<0, 3>, 210 SDTCisVT<4, i32>]>; 211def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 212 [SDTCisVec<0>, 213 SDTCisVT<1, i32>, 214 SDTCisSameAs<0, 2>, 215 SDTCisSameAs<0, 3>, 216 SDTCisSameAs<0, 4>, 217 SDTCisVT<5, i32>]>; 218def SDT_ZTest : SDTypeProfile<1, 2, 219 [SDTCisVT<0, i32>, 220 SDTCisVT<2, i64>]>; 221 222//===----------------------------------------------------------------------===// 223// Node definitions 224//===----------------------------------------------------------------------===// 225 226// These are target-independent nodes, but have target-specific formats. 227def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 228 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 229def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 230 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 231 SDNPOutGlue]>; 232def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 233 234// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 235def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 236 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 237def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 238 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 239 SDNPVariadic]>; 240def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 241 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 242 SDNPVariadic]>; 243def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 244 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 245 SDNPVariadic]>; 246def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 247 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 248 SDNPVariadic]>; 249def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 250def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 251 SDT_ZWrapOffset, []>; 252def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 253def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 254def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 255def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 256def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 257 [SDNPHasChain]>; 258def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 259 SDT_ZSelectCCMask>; 260def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 261def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 262def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 263def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 264def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 265def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 266def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 267def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 268def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 269def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 270def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 271def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 272def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 273 274def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 275 [SDNPHasChain, SDNPSideEffect]>; 276 277def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 278 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 279def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 280 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 281 282def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 283 284// Defined because the index is an i32 rather than a pointer. 285def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 286 SDT_ZInsertVectorElt>; 287def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 288 SDT_ZExtractVectorElt>; 289def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 290def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 291def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 292def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 293def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 294def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 295def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 296def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 297def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 298 SDT_ZVecTernaryInt>; 299def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 300def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 301def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 302def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 303def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 304def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 305def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 306def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 307def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 308 SDT_ZVecBinaryInt>; 309def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 310 SDT_ZVecBinaryInt>; 311def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 312 SDT_ZVecBinaryInt>; 313def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 314def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 315def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 316def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 317def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 318def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 319def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 320def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 321def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 322def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 323def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 324def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 325def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 326def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 327def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 328def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 329def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 330def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 331def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 332def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 333def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 334def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 335def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 336def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 337 SDT_ZVecQuaternaryIntCC>; 338def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 339 SDT_ZVecQuaternaryIntCC>; 340def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 341 342class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 343 : SDNode<"SystemZISD::"##name, profile, 344 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 345 346def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 347def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 348def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 349def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 350def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 351def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 352def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 353def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 354def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 355def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 356def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 357 358def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 359 SDT_ZAtomicCmpSwap, 360 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 361 SDNPMemOperand]>; 362def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 363 SDT_ZAtomicCmpSwapW, 364 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 365 SDNPMemOperand]>; 366 367def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 368 SDT_ZAtomicLoad128, 369 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 370def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 371 SDT_ZAtomicStore128, 372 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 373def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 374 SDT_ZAtomicCmpSwap128, 375 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 376 SDNPMemOperand]>; 377 378def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 379 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 380def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 381 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 382def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 383 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 384def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 385 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 386def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 387 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 388def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 389 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 390def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 391 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 392def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 393 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 394def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 395 [SDNPHasChain, SDNPMayLoad]>; 396def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC, 397 [SDNPHasChain, SDNPMayLoad]>; 398def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 399 [SDNPHasChain, SDNPMayLoad]>; 400def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 401 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 402def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 403 [SDNPHasChain, SDNPMayLoad]>; 404def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 405 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 406 SDNPMemOperand]>; 407 408def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 409 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 410def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 411 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 412def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 413 [SDNPHasChain, SDNPSideEffect]>; 414 415def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 416def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 417def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 418 419//===----------------------------------------------------------------------===// 420// Pattern fragments 421//===----------------------------------------------------------------------===// 422 423def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 424 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 425}]>; 426def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 427 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 428}]>; 429def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 430 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 431}]>; 432 433def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 434 (z_storebswap node:$src, node:$addr), [{ 435 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 436}]>; 437def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 438 (z_storebswap node:$src, node:$addr), [{ 439 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 440}]>; 441def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 442 (z_storebswap node:$src, node:$addr), [{ 443 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 444}]>; 445 446// Fragments including CC as an implicit source. 447def z_br_ccmask 448 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 449 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 450def z_select_ccmask 451 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 452 (z_select_ccmask_1 node:$true, node:$false, 453 node:$valid, node:$mask, CC)>; 454def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 455def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 456 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 457def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 458 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 459 460// Signed and unsigned comparisons. 461def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 462 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 463 return Type != SystemZICMP::UnsignedOnly; 464}]>; 465def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 466 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 467 return Type != SystemZICMP::SignedOnly; 468}]>; 469 470// Register- and memory-based TEST UNDER MASK. 471def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 472def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 473 474// Register sign-extend operations. Sub-32-bit values are represented as i32s. 475def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 476def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 477def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 478 479// Match extensions of an i32 to an i64, followed by an in-register sign 480// extension from a sub-i32 value. 481def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 482def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 483 484// Register zero-extend operations. Sub-32-bit values are represented as i32s. 485def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 486def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 487def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 488 489// Extending loads in which the extension type can be signed. 490def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 491 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 492 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 493}]>; 494def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 495 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 496}]>; 497def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 498 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 499}]>; 500def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 501 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 502}]>; 503 504// Extending loads in which the extension type can be unsigned. 505def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 506 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 507 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 508}]>; 509def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 510 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 511}]>; 512def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 513 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 514}]>; 515def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 516 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 517}]>; 518 519// Extending loads in which the extension type doesn't matter. 520def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 521 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 522}]>; 523def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 524 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 525}]>; 526def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 527 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 528}]>; 529def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 530 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 531}]>; 532 533// Aligned loads. 534class AlignedLoad<SDPatternOperator load> 535 : PatFrag<(ops node:$addr), (load node:$addr), [{ 536 auto *Load = cast<LoadSDNode>(N); 537 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 538}]>; 539def aligned_load : AlignedLoad<load>; 540def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 541def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 542def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 543def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 544 545// Aligned stores. 546class AlignedStore<SDPatternOperator store> 547 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 548 auto *Store = cast<StoreSDNode>(N); 549 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 550}]>; 551def aligned_store : AlignedStore<store>; 552def aligned_truncstorei16 : AlignedStore<truncstorei16>; 553def aligned_truncstorei32 : AlignedStore<truncstorei32>; 554 555// Non-volatile loads. Used for instructions that might access the storage 556// location multiple times. 557class NonvolatileLoad<SDPatternOperator load> 558 : PatFrag<(ops node:$addr), (load node:$addr), [{ 559 auto *Load = cast<LoadSDNode>(N); 560 return !Load->isVolatile(); 561}]>; 562def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 563def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 564def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 565 566// Non-volatile stores. 567class NonvolatileStore<SDPatternOperator store> 568 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 569 auto *Store = cast<StoreSDNode>(N); 570 return !Store->isVolatile(); 571}]>; 572def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 573def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 574def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 575 576// A store of a load that can be implemented using MVC. 577def mvc_store : PatFrag<(ops node:$value, node:$addr), 578 (unindexedstore node:$value, node:$addr), 579 [{ return storeLoadCanUseMVC(N); }]>; 580 581// Binary read-modify-write operations on memory in which the other 582// operand is also memory and for which block operations like NC can 583// be used. There are two patterns for each operator, depending on 584// which operand contains the "other" load. 585multiclass block_op<SDPatternOperator operator> { 586 def "1" : PatFrag<(ops node:$value, node:$addr), 587 (unindexedstore (operator node:$value, 588 (unindexedload node:$addr)), 589 node:$addr), 590 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 591 def "2" : PatFrag<(ops node:$value, node:$addr), 592 (unindexedstore (operator (unindexedload node:$addr), 593 node:$value), 594 node:$addr), 595 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 596} 597defm block_and : block_op<and>; 598defm block_or : block_op<or>; 599defm block_xor : block_op<xor>; 600 601// Insertions. 602def inserti8 : PatFrag<(ops node:$src1, node:$src2), 603 (or (and node:$src1, -256), node:$src2)>; 604def insertll : PatFrag<(ops node:$src1, node:$src2), 605 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 606def insertlh : PatFrag<(ops node:$src1, node:$src2), 607 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 608def inserthl : PatFrag<(ops node:$src1, node:$src2), 609 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 610def inserthh : PatFrag<(ops node:$src1, node:$src2), 611 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 612def insertlf : PatFrag<(ops node:$src1, node:$src2), 613 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 614def inserthf : PatFrag<(ops node:$src1, node:$src2), 615 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 616 617// ORs that can be treated as insertions. 618def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 619 (or node:$src1, node:$src2), [{ 620 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 621 return CurDAG->MaskedValueIsZero(N->getOperand(0), 622 APInt::getLowBitsSet(BitWidth, 8)); 623}]>; 624 625// ORs that can be treated as reversed insertions. 626def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 627 (or node:$src1, node:$src2), [{ 628 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 629 return CurDAG->MaskedValueIsZero(N->getOperand(1), 630 APInt::getLowBitsSet(BitWidth, 8)); 631}]>; 632 633// Negative integer absolute. 634def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 635 636// Integer absolute, matching the canonical form generated by DAGCombiner. 637def z_iabs32 : PatFrag<(ops node:$src), 638 (xor (add node:$src, (sra node:$src, (i32 31))), 639 (sra node:$src, (i32 31)))>; 640def z_iabs64 : PatFrag<(ops node:$src), 641 (xor (add node:$src, (sra node:$src, (i32 63))), 642 (sra node:$src, (i32 63)))>; 643def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 644def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 645 646// Integer multiply-and-add 647def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 648 (add (mul node:$src1, node:$src2), node:$src3)>; 649 650// Alternatives to match operations with or without an overflow CC result. 651def z_sadd : PatFrags<(ops node:$src1, node:$src2), 652 [(z_saddo node:$src1, node:$src2), 653 (add node:$src1, node:$src2)]>; 654def z_uadd : PatFrags<(ops node:$src1, node:$src2), 655 [(z_uaddo node:$src1, node:$src2), 656 (add node:$src1, node:$src2)]>; 657def z_ssub : PatFrags<(ops node:$src1, node:$src2), 658 [(z_ssubo node:$src1, node:$src2), 659 (sub node:$src1, node:$src2)]>; 660def z_usub : PatFrags<(ops node:$src1, node:$src2), 661 [(z_usubo node:$src1, node:$src2), 662 (sub node:$src1, node:$src2)]>; 663 664// Fused multiply-subtract, using the natural operand order. 665def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 666 (fma node:$src1, node:$src2, (fneg node:$src3))>; 667 668// Fused multiply-add and multiply-subtract, but with the order of the 669// operands matching SystemZ's MA and MS instructions. 670def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 671 (fma node:$src2, node:$src3, node:$src1)>; 672def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 673 (fma node:$src2, node:$src3, (fneg node:$src1))>; 674 675// Negative fused multiply-add and multiply-subtract. 676def fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 677 (fneg (fma node:$src1, node:$src2, node:$src3))>; 678def fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 679 (fneg (fms node:$src1, node:$src2, node:$src3))>; 680 681// Floating-point negative absolute. 682def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 683 684// Create a unary operator that loads from memory and then performs 685// the given operation on it. 686class loadu<SDPatternOperator operator, SDPatternOperator load = load> 687 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 688 689// Create a store operator that performs the given unary operation 690// on the value before storing it. 691class storeu<SDPatternOperator operator, SDPatternOperator store = store> 692 : PatFrag<(ops node:$value, node:$addr), 693 (store (operator node:$value), node:$addr)>; 694 695// Create a store operator that performs the given inherent operation 696// and stores the resulting value. 697class storei<SDPatternOperator operator, SDPatternOperator store = store> 698 : PatFrag<(ops node:$addr), 699 (store (operator), node:$addr)>; 700 701// Create a shift operator that optionally ignores an AND of the 702// shift count with an immediate if the bottom 6 bits are all set. 703def imm32bottom6set : PatLeaf<(i32 imm), [{ 704 return (N->getZExtValue() & 0x3f) == 0x3f; 705}]>; 706class shiftop<SDPatternOperator operator> 707 : PatFrags<(ops node:$val, node:$count), 708 [(operator node:$val, node:$count), 709 (operator node:$val, (and node:$count, imm32bottom6set))]>; 710 711def imm32mod64 : PatLeaf<(i32 imm), [{ 712 return (N->getZExtValue() % 64 == 0); 713}]>; 714 715// Load a scalar and replicate it in all elements of a vector. 716class z_replicate_load<ValueType scalartype, SDPatternOperator load> 717 : PatFrag<(ops node:$addr), 718 (z_replicate (scalartype (load node:$addr)))>; 719def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 720def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 721def z_replicate_loadi32 : z_replicate_load<i32, load>; 722def z_replicate_loadi64 : z_replicate_load<i64, load>; 723def z_replicate_loadf32 : z_replicate_load<f32, load>; 724def z_replicate_loadf64 : z_replicate_load<f64, load>; 725 726// Load a scalar and insert it into a single element of a vector. 727class z_vle<ValueType scalartype, SDPatternOperator load> 728 : PatFrag<(ops node:$vec, node:$addr, node:$index), 729 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 730 node:$index)>; 731def z_vlei8 : z_vle<i32, anyextloadi8>; 732def z_vlei16 : z_vle<i32, anyextloadi16>; 733def z_vlei32 : z_vle<i32, load>; 734def z_vlei64 : z_vle<i64, load>; 735def z_vlef32 : z_vle<f32, load>; 736def z_vlef64 : z_vle<f64, load>; 737 738// Load a scalar and insert it into the low element of the high i64 of a 739// zeroed vector. 740class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 741 : PatFrag<(ops node:$addr), 742 (z_vector_insert immAllZerosV, 743 (scalartype (load node:$addr)), (i32 index))>; 744def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 745def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 746def z_vllezi32 : z_vllez<i32, load, 1>; 747def z_vllezi64 : PatFrags<(ops node:$addr), 748 [(z_vector_insert immAllZerosV, 749 (i64 (load node:$addr)), (i32 0)), 750 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 751// We use high merges to form a v4f32 from four f32s. Propagating zero 752// into all elements but index 1 gives this expression. 753def z_vllezf32 : PatFrag<(ops node:$addr), 754 (z_merge_high 755 (v2i64 756 (z_unpackl_high 757 (v4i32 758 (bitconvert 759 (v4f32 (scalar_to_vector 760 (f32 (load node:$addr)))))))), 761 (v2i64 762 (bitconvert (v4f32 immAllZerosV))))>; 763def z_vllezf64 : PatFrag<(ops node:$addr), 764 (z_merge_high 765 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 766 immAllZerosV)>; 767 768// Similarly for the high element of a zeroed vector. 769def z_vllezli32 : z_vllez<i32, load, 0>; 770def z_vllezlf32 : PatFrag<(ops node:$addr), 771 (z_merge_high 772 (v2i64 773 (bitconvert 774 (z_merge_high 775 (v4f32 (scalar_to_vector 776 (f32 (load node:$addr)))), 777 (v4f32 immAllZerosV)))), 778 (v2i64 779 (bitconvert (v4f32 immAllZerosV))))>; 780 781// Store one element of a vector. 782class z_vste<ValueType scalartype, SDPatternOperator store> 783 : PatFrag<(ops node:$vec, node:$addr, node:$index), 784 (store (scalartype (z_vector_extract node:$vec, node:$index)), 785 node:$addr)>; 786def z_vstei8 : z_vste<i32, truncstorei8>; 787def z_vstei16 : z_vste<i32, truncstorei16>; 788def z_vstei32 : z_vste<i32, store>; 789def z_vstei64 : z_vste<i64, store>; 790def z_vstef32 : z_vste<f32, store>; 791def z_vstef64 : z_vste<f64, store>; 792 793// Arithmetic negation on vectors. 794def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 795 796// Bitwise negation on vectors. 797def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 798 799// Signed "integer greater than zero" on vectors. 800def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 801 802// Signed "integer less than zero" on vectors. 803def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 804 805// Integer absolute on vectors. 806class z_viabs<int shift> 807 : PatFrag<(ops node:$src), 808 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 809 (z_vsra_by_scalar node:$src, (i32 shift)))>; 810def z_viabs8 : z_viabs<7>; 811def z_viabs16 : z_viabs<15>; 812def z_viabs32 : z_viabs<31>; 813def z_viabs64 : z_viabs<63>; 814 815// Sign-extend the i64 elements of a vector. 816class z_vse<int shift> 817 : PatFrag<(ops node:$src), 818 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 819def z_vsei8 : z_vse<56>; 820def z_vsei16 : z_vse<48>; 821def z_vsei32 : z_vse<32>; 822 823// ...and again with the extensions being done on individual i64 scalars. 824class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 825 : PatFrag<(ops node:$src), 826 (z_join_dwords 827 (operator (z_vector_extract node:$src, index1)), 828 (operator (z_vector_extract node:$src, index2)))>; 829def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 830def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 831def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 832