1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZGR128Binary : SDTypeProfile<1, 2, 44 [SDTCisVT<0, untyped>, 45 SDTCisInt<1>, 46 SDTCisInt<2>]>; 47def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 48 [SDTCisInt<0>, 49 SDTCisVT<1, i32>, 50 SDTCisSameAs<0, 2>, 51 SDTCisSameAs<0, 3>]>; 52def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 53 [SDTCisInt<0>, 54 SDTCisVT<1, i32>, 55 SDTCisSameAs<0, 2>, 56 SDTCisSameAs<0, 3>, 57 SDTCisVT<1, i32>]>; 58def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 59 [SDTCisVT<0, i32>, 60 SDTCisPtrTy<1>, 61 SDTCisVT<2, i32>, 62 SDTCisVT<3, i32>, 63 SDTCisVT<4, i32>, 64 SDTCisVT<5, i32>]>; 65def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 66 [SDTCisVT<0, i32>, 67 SDTCisVT<1, i32>, 68 SDTCisPtrTy<2>, 69 SDTCisVT<3, i32>, 70 SDTCisVT<4, i32>, 71 SDTCisVT<5, i32>, 72 SDTCisVT<6, i32>, 73 SDTCisVT<7, i32>]>; 74def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 75 [SDTCisInt<0>, 76 SDTCisVT<1, i32>, 77 SDTCisPtrTy<2>, 78 SDTCisSameAs<0, 3>, 79 SDTCisSameAs<0, 4>]>; 80def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 81 [SDTCisVT<0, untyped>, 82 SDTCisPtrTy<1>]>; 83def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 84 [SDTCisVT<0, untyped>, 85 SDTCisPtrTy<1>]>; 86def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 87 [SDTCisVT<0, untyped>, 88 SDTCisVT<1, i32>, 89 SDTCisPtrTy<2>, 90 SDTCisVT<3, untyped>, 91 SDTCisVT<4, untyped>]>; 92def SDT_ZMemMemLength : SDTypeProfile<0, 3, 93 [SDTCisPtrTy<0>, 94 SDTCisPtrTy<1>, 95 SDTCisVT<2, i64>]>; 96def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 97 [SDTCisVT<0, i32>, 98 SDTCisPtrTy<1>, 99 SDTCisPtrTy<2>, 100 SDTCisVT<3, i64>]>; 101def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 102 [SDTCisPtrTy<0>, 103 SDTCisPtrTy<1>, 104 SDTCisVT<2, i64>, 105 SDTCisVT<3, i64>]>; 106def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4, 107 [SDTCisVT<0, i32>, 108 SDTCisPtrTy<1>, 109 SDTCisPtrTy<2>, 110 SDTCisVT<3, i64>, 111 SDTCisVT<4, i64>]>; 112def SDT_ZString : SDTypeProfile<1, 3, 113 [SDTCisPtrTy<0>, 114 SDTCisPtrTy<1>, 115 SDTCisPtrTy<2>, 116 SDTCisVT<3, i32>]>; 117def SDT_ZStringCC : SDTypeProfile<2, 3, 118 [SDTCisPtrTy<0>, 119 SDTCisVT<1, i32>, 120 SDTCisPtrTy<2>, 121 SDTCisPtrTy<3>, 122 SDTCisVT<4, i32>]>; 123def SDT_ZIPM : SDTypeProfile<1, 1, 124 [SDTCisVT<0, i32>, 125 SDTCisVT<1, i32>]>; 126def SDT_ZPrefetch : SDTypeProfile<0, 2, 127 [SDTCisVT<0, i32>, 128 SDTCisPtrTy<1>]>; 129def SDT_ZTBegin : SDTypeProfile<1, 2, 130 [SDTCisVT<0, i32>, 131 SDTCisPtrTy<1>, 132 SDTCisVT<2, i32>]>; 133def SDT_ZTEnd : SDTypeProfile<1, 0, 134 [SDTCisVT<0, i32>]>; 135def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 136 [SDTCisVec<0>, 137 SDTCisSameAs<0, 1>, 138 SDTCisVT<3, i32>]>; 139def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 140 [SDTCisVec<1>, 141 SDTCisVT<2, i32>]>; 142def SDT_ZReplicate : SDTypeProfile<1, 1, 143 [SDTCisVec<0>]>; 144def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 145 [SDTCisVec<0>, 146 SDTCisVec<1>]>; 147def SDT_ZVecUnary : SDTypeProfile<1, 1, 148 [SDTCisVec<0>, 149 SDTCisSameAs<0, 1>]>; 150def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 151 [SDTCisVec<0>, 152 SDTCisVT<1, i32>, 153 SDTCisSameAs<0, 2>]>; 154def SDT_ZVecBinary : SDTypeProfile<1, 2, 155 [SDTCisVec<0>, 156 SDTCisSameAs<0, 1>, 157 SDTCisSameAs<0, 2>]>; 158def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 159 [SDTCisVec<0>, 160 SDTCisVT<1, i32>, 161 SDTCisSameAs<0, 2>, 162 SDTCisSameAs<0, 2>]>; 163def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 164 [SDTCisVec<0>, 165 SDTCisSameAs<0, 1>, 166 SDTCisVT<2, i32>]>; 167def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 168 [SDTCisVec<0>, 169 SDTCisVec<1>, 170 SDTCisSameAs<1, 2>]>; 171def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 172 [SDTCisVec<0>, 173 SDTCisVT<1, i32>, 174 SDTCisVec<2>, 175 SDTCisSameAs<2, 3>]>; 176def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 177 [SDTCisVec<0>, 178 SDTCisVT<1, i32>, 179 SDTCisVec<2>, 180 SDTCisVT<3, i32>]>; 181def SDT_ZRotateMask : SDTypeProfile<1, 2, 182 [SDTCisVec<0>, 183 SDTCisVT<1, i32>, 184 SDTCisVT<2, i32>]>; 185def SDT_ZJoinDwords : SDTypeProfile<1, 2, 186 [SDTCisVT<0, v2i64>, 187 SDTCisVT<1, i64>, 188 SDTCisVT<2, i64>]>; 189def SDT_ZVecTernary : SDTypeProfile<1, 3, 190 [SDTCisVec<0>, 191 SDTCisSameAs<0, 1>, 192 SDTCisSameAs<0, 2>, 193 SDTCisSameAs<0, 3>]>; 194def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 195 [SDTCisVec<0>, 196 SDTCisSameAs<0, 1>, 197 SDTCisSameAs<0, 2>, 198 SDTCisVT<3, i32>]>; 199def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 200 [SDTCisVec<0>, 201 SDTCisVT<1, i32>, 202 SDTCisSameAs<0, 2>, 203 SDTCisSameAs<0, 3>, 204 SDTCisVT<4, i32>]>; 205def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 206 [SDTCisVec<0>, 207 SDTCisSameAs<0, 1>, 208 SDTCisSameAs<0, 2>, 209 SDTCisSameAs<0, 3>, 210 SDTCisVT<4, i32>]>; 211def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 212 [SDTCisVec<0>, 213 SDTCisVT<1, i32>, 214 SDTCisSameAs<0, 2>, 215 SDTCisSameAs<0, 3>, 216 SDTCisSameAs<0, 4>, 217 SDTCisVT<5, i32>]>; 218def SDT_ZTest : SDTypeProfile<1, 2, 219 [SDTCisVT<0, i32>, 220 SDTCisVT<2, i64>]>; 221 222//===----------------------------------------------------------------------===// 223// Node definitions 224//===----------------------------------------------------------------------===// 225 226// These are target-independent nodes, but have target-specific formats. 227def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 228 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 229def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 230 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 231 SDNPOutGlue]>; 232def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 233 234// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 235def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 236 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 237def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 238 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 239 SDNPVariadic]>; 240def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 241 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 242 SDNPVariadic]>; 243def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 244 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 245 SDNPVariadic]>; 246def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 247 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 248 SDNPVariadic]>; 249def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 250def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 251 SDT_ZWrapOffset, []>; 252def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 253def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 254def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 255def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 256def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 257 [SDNPHasChain]>; 258def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 259 SDT_ZSelectCCMask>; 260def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 261def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 262def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 263def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 264def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 265def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 266def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 267def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 268def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 269def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 270def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 271def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 272def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 273 274def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 275 [SDNPHasChain, SDNPSideEffect]>; 276 277def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 278 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 279def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 280 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 281 282def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 283 284// Defined because the index is an i32 rather than a pointer. 285def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 286 SDT_ZInsertVectorElt>; 287def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 288 SDT_ZExtractVectorElt>; 289def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 290def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 291def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 292def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 293def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 294def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 295def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 296def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 297 SDT_ZVecTernaryInt>; 298def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 299def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 300def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 301def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 302def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 303def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 304def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 305def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 306def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 307 SDT_ZVecBinaryInt>; 308def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 309 SDT_ZVecBinaryInt>; 310def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 311 SDT_ZVecBinaryInt>; 312def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 313def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 314def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 315def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 316def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 317def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 318def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 319def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 320def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 321def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 322def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 323def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 324def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 325def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 326def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 327def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 328def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 329def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 330def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 331def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 332def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 333def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 334def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 335def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 336 SDT_ZVecQuaternaryIntCC>; 337def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 338 SDT_ZVecQuaternaryIntCC>; 339def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 340 341class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 342 : SDNode<"SystemZISD::"##name, profile, 343 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 344 345def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 346def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 347def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 348def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 349def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 350def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 351def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 352def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 353def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 354def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 355def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 356 357def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 358 SDT_ZAtomicCmpSwap, 359 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 360 SDNPMemOperand]>; 361def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 362 SDT_ZAtomicCmpSwapW, 363 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 364 SDNPMemOperand]>; 365 366def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 367 SDT_ZAtomicLoad128, 368 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 369def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 370 SDT_ZAtomicStore128, 371 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 372def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 373 SDT_ZAtomicCmpSwap128, 374 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 375 SDNPMemOperand]>; 376 377def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 378 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 379def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 380 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 381def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 382 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 383def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 384 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 385def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 386 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 387def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 388 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 389def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 390 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 391def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 392 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 393def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 394 [SDNPHasChain, SDNPMayLoad]>; 395def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC, 396 [SDNPHasChain, SDNPMayLoad]>; 397def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 398 [SDNPHasChain, SDNPMayLoad]>; 399def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 400 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 401def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 402 [SDNPHasChain, SDNPMayLoad]>; 403def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 404 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 405 SDNPMemOperand]>; 406 407def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 408 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 409def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 410 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 411def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 412 [SDNPHasChain, SDNPSideEffect]>; 413 414def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 415def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 416def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 417 418//===----------------------------------------------------------------------===// 419// Pattern fragments 420//===----------------------------------------------------------------------===// 421 422def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 423 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 424}]>; 425def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 426 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 427}]>; 428def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 429 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 430}]>; 431 432def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 433 (z_storebswap node:$src, node:$addr), [{ 434 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 435}]>; 436def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 437 (z_storebswap node:$src, node:$addr), [{ 438 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 439}]>; 440def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 441 (z_storebswap node:$src, node:$addr), [{ 442 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 443}]>; 444 445// Fragments including CC as an implicit source. 446def z_br_ccmask 447 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 448 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 449def z_select_ccmask 450 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 451 (z_select_ccmask_1 node:$true, node:$false, 452 node:$valid, node:$mask, CC)>; 453def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 454def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 455 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 456def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 457 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 458 459// Signed and unsigned comparisons. 460def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 461 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 462 return Type != SystemZICMP::UnsignedOnly; 463}]>; 464def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 465 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 466 return Type != SystemZICMP::SignedOnly; 467}]>; 468 469// Register- and memory-based TEST UNDER MASK. 470def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 471def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 472 473// Register sign-extend operations. Sub-32-bit values are represented as i32s. 474def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 475def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 476def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 477 478// Match extensions of an i32 to an i64, followed by an in-register sign 479// extension from a sub-i32 value. 480def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 481def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 482 483// Register zero-extend operations. Sub-32-bit values are represented as i32s. 484def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 485def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 486def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 487 488// Extending loads in which the extension type can be signed. 489def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 490 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 491 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 492}]>; 493def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 494 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 495}]>; 496def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 497 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 498}]>; 499def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 500 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 501}]>; 502 503// Extending loads in which the extension type can be unsigned. 504def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 505 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 506 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 507}]>; 508def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 509 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 510}]>; 511def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 512 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 513}]>; 514def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 515 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 516}]>; 517 518// Extending loads in which the extension type doesn't matter. 519def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 520 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 521}]>; 522def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 523 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 524}]>; 525def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 526 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 527}]>; 528def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 529 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 530}]>; 531 532// Aligned loads. 533class AlignedLoad<SDPatternOperator load> 534 : PatFrag<(ops node:$addr), (load node:$addr), [{ 535 auto *Load = cast<LoadSDNode>(N); 536 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 537}]>; 538def aligned_load : AlignedLoad<load>; 539def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 540def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 541def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 542def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 543 544// Aligned stores. 545class AlignedStore<SDPatternOperator store> 546 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 547 auto *Store = cast<StoreSDNode>(N); 548 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 549}]>; 550def aligned_store : AlignedStore<store>; 551def aligned_truncstorei16 : AlignedStore<truncstorei16>; 552def aligned_truncstorei32 : AlignedStore<truncstorei32>; 553 554// Non-volatile loads. Used for instructions that might access the storage 555// location multiple times. 556class NonvolatileLoad<SDPatternOperator load> 557 : PatFrag<(ops node:$addr), (load node:$addr), [{ 558 auto *Load = cast<LoadSDNode>(N); 559 return !Load->isVolatile(); 560}]>; 561def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 562def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 563def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 564 565// Non-volatile stores. 566class NonvolatileStore<SDPatternOperator store> 567 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 568 auto *Store = cast<StoreSDNode>(N); 569 return !Store->isVolatile(); 570}]>; 571def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 572def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 573def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 574 575// A store of a load that can be implemented using MVC. 576def mvc_store : PatFrag<(ops node:$value, node:$addr), 577 (unindexedstore node:$value, node:$addr), 578 [{ return storeLoadCanUseMVC(N); }]>; 579 580// Binary read-modify-write operations on memory in which the other 581// operand is also memory and for which block operations like NC can 582// be used. There are two patterns for each operator, depending on 583// which operand contains the "other" load. 584multiclass block_op<SDPatternOperator operator> { 585 def "1" : PatFrag<(ops node:$value, node:$addr), 586 (unindexedstore (operator node:$value, 587 (unindexedload node:$addr)), 588 node:$addr), 589 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 590 def "2" : PatFrag<(ops node:$value, node:$addr), 591 (unindexedstore (operator (unindexedload node:$addr), 592 node:$value), 593 node:$addr), 594 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 595} 596defm block_and : block_op<and>; 597defm block_or : block_op<or>; 598defm block_xor : block_op<xor>; 599 600// Insertions. 601def inserti8 : PatFrag<(ops node:$src1, node:$src2), 602 (or (and node:$src1, -256), node:$src2)>; 603def insertll : PatFrag<(ops node:$src1, node:$src2), 604 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 605def insertlh : PatFrag<(ops node:$src1, node:$src2), 606 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 607def inserthl : PatFrag<(ops node:$src1, node:$src2), 608 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 609def inserthh : PatFrag<(ops node:$src1, node:$src2), 610 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 611def insertlf : PatFrag<(ops node:$src1, node:$src2), 612 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 613def inserthf : PatFrag<(ops node:$src1, node:$src2), 614 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 615 616// ORs that can be treated as insertions. 617def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 618 (or node:$src1, node:$src2), [{ 619 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 620 return CurDAG->MaskedValueIsZero(N->getOperand(0), 621 APInt::getLowBitsSet(BitWidth, 8)); 622}]>; 623 624// ORs that can be treated as reversed insertions. 625def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 626 (or node:$src1, node:$src2), [{ 627 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 628 return CurDAG->MaskedValueIsZero(N->getOperand(1), 629 APInt::getLowBitsSet(BitWidth, 8)); 630}]>; 631 632// Negative integer absolute. 633def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 634 635// Integer absolute, matching the canonical form generated by DAGCombiner. 636def z_iabs32 : PatFrag<(ops node:$src), 637 (xor (add node:$src, (sra node:$src, (i32 31))), 638 (sra node:$src, (i32 31)))>; 639def z_iabs64 : PatFrag<(ops node:$src), 640 (xor (add node:$src, (sra node:$src, (i32 63))), 641 (sra node:$src, (i32 63)))>; 642def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 643def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 644 645// Integer multiply-and-add 646def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 647 (add (mul node:$src1, node:$src2), node:$src3)>; 648 649// Alternatives to match operations with or without an overflow CC result. 650def z_sadd : PatFrags<(ops node:$src1, node:$src2), 651 [(z_saddo node:$src1, node:$src2), 652 (add node:$src1, node:$src2)]>; 653def z_uadd : PatFrags<(ops node:$src1, node:$src2), 654 [(z_uaddo node:$src1, node:$src2), 655 (add node:$src1, node:$src2)]>; 656def z_ssub : PatFrags<(ops node:$src1, node:$src2), 657 [(z_ssubo node:$src1, node:$src2), 658 (sub node:$src1, node:$src2)]>; 659def z_usub : PatFrags<(ops node:$src1, node:$src2), 660 [(z_usubo node:$src1, node:$src2), 661 (sub node:$src1, node:$src2)]>; 662 663// Fused multiply-subtract, using the natural operand order. 664def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 665 (fma node:$src1, node:$src2, (fneg node:$src3))>; 666 667// Fused multiply-add and multiply-subtract, but with the order of the 668// operands matching SystemZ's MA and MS instructions. 669def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 670 (fma node:$src2, node:$src3, node:$src1)>; 671def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 672 (fma node:$src2, node:$src3, (fneg node:$src1))>; 673 674// Negative fused multiply-add and multiply-subtract. 675def fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 676 (fneg (fma node:$src1, node:$src2, node:$src3))>; 677def fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 678 (fneg (fms node:$src1, node:$src2, node:$src3))>; 679 680// Floating-point negative absolute. 681def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 682 683// Create a unary operator that loads from memory and then performs 684// the given operation on it. 685class loadu<SDPatternOperator operator, SDPatternOperator load = load> 686 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 687 688// Create a store operator that performs the given unary operation 689// on the value before storing it. 690class storeu<SDPatternOperator operator, SDPatternOperator store = store> 691 : PatFrag<(ops node:$value, node:$addr), 692 (store (operator node:$value), node:$addr)>; 693 694// Create a store operator that performs the given inherent operation 695// and stores the resulting value. 696class storei<SDPatternOperator operator, SDPatternOperator store = store> 697 : PatFrag<(ops node:$addr), 698 (store (operator), node:$addr)>; 699 700// Create a shift operator that optionally ignores an AND of the 701// shift count with an immediate if the bottom 6 bits are all set. 702def imm32bottom6set : PatLeaf<(i32 imm), [{ 703 return (N->getZExtValue() & 0x3f) == 0x3f; 704}]>; 705class shiftop<SDPatternOperator operator> 706 : PatFrags<(ops node:$val, node:$count), 707 [(operator node:$val, node:$count), 708 (operator node:$val, (and node:$count, imm32bottom6set))]>; 709 710// Load a scalar and replicate it in all elements of a vector. 711class z_replicate_load<ValueType scalartype, SDPatternOperator load> 712 : PatFrag<(ops node:$addr), 713 (z_replicate (scalartype (load node:$addr)))>; 714def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 715def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 716def z_replicate_loadi32 : z_replicate_load<i32, load>; 717def z_replicate_loadi64 : z_replicate_load<i64, load>; 718def z_replicate_loadf32 : z_replicate_load<f32, load>; 719def z_replicate_loadf64 : z_replicate_load<f64, load>; 720 721// Load a scalar and insert it into a single element of a vector. 722class z_vle<ValueType scalartype, SDPatternOperator load> 723 : PatFrag<(ops node:$vec, node:$addr, node:$index), 724 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 725 node:$index)>; 726def z_vlei8 : z_vle<i32, anyextloadi8>; 727def z_vlei16 : z_vle<i32, anyextloadi16>; 728def z_vlei32 : z_vle<i32, load>; 729def z_vlei64 : z_vle<i64, load>; 730def z_vlef32 : z_vle<f32, load>; 731def z_vlef64 : z_vle<f64, load>; 732 733// Load a scalar and insert it into the low element of the high i64 of a 734// zeroed vector. 735class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 736 : PatFrag<(ops node:$addr), 737 (z_vector_insert (immAllZerosV), 738 (scalartype (load node:$addr)), (i32 index))>; 739def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 740def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 741def z_vllezi32 : z_vllez<i32, load, 1>; 742def z_vllezi64 : PatFrags<(ops node:$addr), 743 [(z_vector_insert (immAllZerosV), 744 (i64 (load node:$addr)), (i32 0)), 745 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 746// We use high merges to form a v4f32 from four f32s. Propagating zero 747// into all elements but index 1 gives this expression. 748def z_vllezf32 : PatFrag<(ops node:$addr), 749 (z_merge_high 750 (v2i64 751 (z_unpackl_high 752 (v4i32 753 (bitconvert 754 (v4f32 (scalar_to_vector 755 (f32 (load node:$addr)))))))), 756 (v2i64 757 (bitconvert (v4f32 (immAllZerosV)))))>; 758def z_vllezf64 : PatFrag<(ops node:$addr), 759 (z_merge_high 760 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 761 (immAllZerosV))>; 762 763// Similarly for the high element of a zeroed vector. 764def z_vllezli32 : z_vllez<i32, load, 0>; 765def z_vllezlf32 : PatFrag<(ops node:$addr), 766 (z_merge_high 767 (v2i64 768 (bitconvert 769 (z_merge_high 770 (v4f32 (scalar_to_vector 771 (f32 (load node:$addr)))), 772 (v4f32 (immAllZerosV))))), 773 (v2i64 774 (bitconvert (v4f32 (immAllZerosV)))))>; 775 776// Store one element of a vector. 777class z_vste<ValueType scalartype, SDPatternOperator store> 778 : PatFrag<(ops node:$vec, node:$addr, node:$index), 779 (store (scalartype (z_vector_extract node:$vec, node:$index)), 780 node:$addr)>; 781def z_vstei8 : z_vste<i32, truncstorei8>; 782def z_vstei16 : z_vste<i32, truncstorei16>; 783def z_vstei32 : z_vste<i32, store>; 784def z_vstei64 : z_vste<i64, store>; 785def z_vstef32 : z_vste<f32, store>; 786def z_vstef64 : z_vste<f64, store>; 787 788// Arithmetic negation on vectors. 789def z_vneg : PatFrag<(ops node:$x), (sub (immAllZerosV), node:$x)>; 790 791// Bitwise negation on vectors. 792def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (immAllOnesV))>; 793 794// Signed "integer greater than zero" on vectors. 795def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (immAllZerosV))>; 796 797// Signed "integer less than zero" on vectors. 798def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (immAllZerosV), node:$x)>; 799 800// Integer absolute on vectors. 801class z_viabs<int shift> 802 : PatFrag<(ops node:$src), 803 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 804 (z_vsra_by_scalar node:$src, (i32 shift)))>; 805def z_viabs8 : z_viabs<7>; 806def z_viabs16 : z_viabs<15>; 807def z_viabs32 : z_viabs<31>; 808def z_viabs64 : z_viabs<63>; 809 810// Sign-extend the i64 elements of a vector. 811class z_vse<int shift> 812 : PatFrag<(ops node:$src), 813 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 814def z_vsei8 : z_vse<56>; 815def z_vsei16 : z_vse<48>; 816def z_vsei32 : z_vse<32>; 817 818// ...and again with the extensions being done on individual i64 scalars. 819class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 820 : PatFrag<(ops node:$src), 821 (z_join_dwords 822 (operator (z_vector_extract node:$src, index1)), 823 (operator (z_vector_extract node:$src, index2)))>; 824def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 825def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 826def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 827