1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Type profiles 12//===----------------------------------------------------------------------===// 13def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 14 SDTCisVT<1, i64>]>; 15def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 16 SDTCisVT<1, i64>]>; 17def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 18def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>; 19def SDT_ZICmp : SDTypeProfile<0, 3, 20 [SDTCisSameAs<0, 1>, 21 SDTCisVT<2, i32>]>; 22def SDT_ZBRCCMask : SDTypeProfile<0, 3, 23 [SDTCisVT<0, i32>, 24 SDTCisVT<1, i32>, 25 SDTCisVT<2, OtherVT>]>; 26def SDT_ZSelectCCMask : SDTypeProfile<1, 4, 27 [SDTCisSameAs<0, 1>, 28 SDTCisSameAs<1, 2>, 29 SDTCisVT<3, i32>, 30 SDTCisVT<4, i32>]>; 31def SDT_ZWrapPtr : SDTypeProfile<1, 1, 32 [SDTCisSameAs<0, 1>, 33 SDTCisPtrTy<0>]>; 34def SDT_ZWrapOffset : SDTypeProfile<1, 2, 35 [SDTCisSameAs<0, 1>, 36 SDTCisSameAs<0, 2>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 39def SDT_ZGR128Binary : SDTypeProfile<1, 2, 40 [SDTCisVT<0, untyped>, 41 SDTCisInt<1>, 42 SDTCisInt<2>]>; 43def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 44 [SDTCisVT<0, i32>, 45 SDTCisPtrTy<1>, 46 SDTCisVT<2, i32>, 47 SDTCisVT<3, i32>, 48 SDTCisVT<4, i32>, 49 SDTCisVT<5, i32>]>; 50def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6, 51 [SDTCisVT<0, i32>, 52 SDTCisPtrTy<1>, 53 SDTCisVT<2, i32>, 54 SDTCisVT<3, i32>, 55 SDTCisVT<4, i32>, 56 SDTCisVT<5, i32>, 57 SDTCisVT<6, i32>]>; 58def SDT_ZMemMemLength : SDTypeProfile<0, 3, 59 [SDTCisPtrTy<0>, 60 SDTCisPtrTy<1>, 61 SDTCisVT<2, i64>]>; 62def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 63 [SDTCisPtrTy<0>, 64 SDTCisPtrTy<1>, 65 SDTCisVT<2, i64>, 66 SDTCisVT<3, i64>]>; 67def SDT_ZString : SDTypeProfile<1, 3, 68 [SDTCisPtrTy<0>, 69 SDTCisPtrTy<1>, 70 SDTCisPtrTy<2>, 71 SDTCisVT<3, i32>]>; 72def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>; 73def SDT_ZPrefetch : SDTypeProfile<0, 2, 74 [SDTCisVT<0, i32>, 75 SDTCisPtrTy<1>]>; 76def SDT_ZLoadBSwap : SDTypeProfile<1, 2, 77 [SDTCisInt<0>, 78 SDTCisPtrTy<1>, 79 SDTCisVT<2, OtherVT>]>; 80def SDT_ZStoreBSwap : SDTypeProfile<0, 3, 81 [SDTCisInt<0>, 82 SDTCisPtrTy<1>, 83 SDTCisVT<2, OtherVT>]>; 84def SDT_ZTBegin : SDTypeProfile<0, 2, 85 [SDTCisPtrTy<0>, 86 SDTCisVT<1, i32>]>; 87def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 88 [SDTCisVec<0>, 89 SDTCisSameAs<0, 1>, 90 SDTCisVT<3, i32>]>; 91def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 92 [SDTCisVec<1>, 93 SDTCisVT<2, i32>]>; 94def SDT_ZReplicate : SDTypeProfile<1, 1, 95 [SDTCisVec<0>]>; 96def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 97 [SDTCisVec<0>, 98 SDTCisVec<1>]>; 99def SDT_ZVecUnary : SDTypeProfile<1, 1, 100 [SDTCisVec<0>, 101 SDTCisSameAs<0, 1>]>; 102def SDT_ZVecBinary : SDTypeProfile<1, 2, 103 [SDTCisVec<0>, 104 SDTCisSameAs<0, 1>, 105 SDTCisSameAs<0, 2>]>; 106def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 107 [SDTCisVec<0>, 108 SDTCisSameAs<0, 1>, 109 SDTCisVT<2, i32>]>; 110def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 111 [SDTCisVec<0>, 112 SDTCisVec<1>, 113 SDTCisSameAs<1, 2>]>; 114def SDT_ZVecBinaryConvInt : SDTypeProfile<1, 2, 115 [SDTCisVec<0>, 116 SDTCisVec<1>, 117 SDTCisVT<2, i32>]>; 118def SDT_ZRotateMask : SDTypeProfile<1, 2, 119 [SDTCisVec<0>, 120 SDTCisVT<1, i32>, 121 SDTCisVT<2, i32>]>; 122def SDT_ZJoinDwords : SDTypeProfile<1, 2, 123 [SDTCisVT<0, v2i64>, 124 SDTCisVT<1, i64>, 125 SDTCisVT<2, i64>]>; 126def SDT_ZVecTernary : SDTypeProfile<1, 3, 127 [SDTCisVec<0>, 128 SDTCisSameAs<0, 1>, 129 SDTCisSameAs<0, 2>, 130 SDTCisSameAs<0, 3>]>; 131def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 132 [SDTCisVec<0>, 133 SDTCisSameAs<0, 1>, 134 SDTCisSameAs<0, 2>, 135 SDTCisVT<3, i32>]>; 136def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 137 [SDTCisVec<0>, 138 SDTCisSameAs<0, 1>, 139 SDTCisSameAs<0, 2>, 140 SDTCisSameAs<0, 3>, 141 SDTCisVT<4, i32>]>; 142def SDT_ZTest : SDTypeProfile<0, 2, [SDTCisVT<1, i64>]>; 143 144//===----------------------------------------------------------------------===// 145// Node definitions 146//===----------------------------------------------------------------------===// 147 148// These are target-independent nodes, but have target-specific formats. 149def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 150 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 151def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 152 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 153 SDNPOutGlue]>; 154def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 155 156// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 157def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 158 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 159def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 160 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 161 SDNPVariadic]>; 162def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 163 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 164 SDNPVariadic]>; 165def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 166 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 167 SDNPVariadic]>; 168def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 169 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 170 SDNPVariadic]>; 171def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 172def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 173 SDT_ZWrapOffset, []>; 174def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 175def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>; 176def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>; 177def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>; 178def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 179 [SDNPHasChain, SDNPInGlue]>; 180def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask, 181 [SDNPInGlue]>; 182def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 183def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 184def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 185def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 186def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 187def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 188 189def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 190 [SDNPHasChain, SDNPSideEffect]>; 191 192def z_loadbswap : SDNode<"SystemZISD::LRV", SDT_ZLoadBSwap, 193 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 194def z_storebswap : SDNode<"SystemZISD::STRV", SDT_ZStoreBSwap, 195 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 196 197def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest, [SDNPOutGlue]>; 198 199// Defined because the index is an i32 rather than a pointer. 200def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 201 SDT_ZInsertVectorElt>; 202def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 203 SDT_ZExtractVectorElt>; 204def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 205def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 206def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 207def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 208def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 209def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 210def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 211def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 212def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 213 SDT_ZVecTernaryInt>; 214def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 215def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 216def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConv, 217 [SDNPOutGlue]>; 218def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConv, 219 [SDNPOutGlue]>; 220def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 221def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 222def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 223def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 224def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 225 SDT_ZVecBinaryInt>; 226def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 227 SDT_ZVecBinaryInt>; 228def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 229 SDT_ZVecBinaryInt>; 230def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 231def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 232def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 233def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 234def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinary, 235 [SDNPOutGlue]>; 236def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinary, 237 [SDNPOutGlue]>; 238def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinary, 239 [SDNPOutGlue]>; 240def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 241def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 242def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 243def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConv, 244 [SDNPOutGlue]>; 245def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConv, 246 [SDNPOutGlue]>; 247def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConv, 248 [SDNPOutGlue]>; 249def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 250def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 251def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp, [SDNPOutGlue]>; 252def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryInt, 253 [SDNPOutGlue]>; 254def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryInt, 255 [SDNPOutGlue]>; 256def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinary, 257 [SDNPOutGlue]>; 258def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinary, 259 [SDNPOutGlue]>; 260def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinary, 261 [SDNPOutGlue]>; 262def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinary, 263 [SDNPOutGlue]>; 264def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnary, 265 [SDNPOutGlue]>; 266def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", SDT_ZVecQuaternaryInt, 267 [SDNPOutGlue]>; 268def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 269 SDT_ZVecQuaternaryInt, [SDNPOutGlue]>; 270def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvInt, 271 [SDNPOutGlue]>; 272 273class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 274 : SDNode<"SystemZISD::"##name, profile, 275 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 276 277def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 278def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 279def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 280def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 281def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 282def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 283def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 284def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 285def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 286def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 287def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 288def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>; 289 290def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 291 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 292def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 293 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 294def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 295 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 296def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 297 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 298def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 299 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 300def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 301 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 302def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 303 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 304def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 305 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 306def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength, 307 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 308def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop, 309 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 310def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString, 311 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 312def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 313 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 314def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString, 315 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 316def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic, 317 [SDNPInGlue]>; 318def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 319 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 320 SDNPMemOperand]>; 321 322def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 323 [SDNPHasChain, SDNPOutGlue, SDNPMayStore, 324 SDNPSideEffect]>; 325def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 326 [SDNPHasChain, SDNPOutGlue, SDNPMayStore, 327 SDNPSideEffect]>; 328def z_tend : SDNode<"SystemZISD::TEND", SDTNone, 329 [SDNPHasChain, SDNPOutGlue, SDNPSideEffect]>; 330 331def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 332def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 333def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 334 335//===----------------------------------------------------------------------===// 336// Pattern fragments 337//===----------------------------------------------------------------------===// 338 339def z_lrvh : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i16)>; 340def z_lrv : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i32)>; 341def z_lrvg : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i64)>; 342 343def z_strvh : PatFrag<(ops node:$src, node:$addr), 344 (z_storebswap node:$src, node:$addr, i16)>; 345def z_strv : PatFrag<(ops node:$src, node:$addr), 346 (z_storebswap node:$src, node:$addr, i32)>; 347def z_strvg : PatFrag<(ops node:$src, node:$addr), 348 (z_storebswap node:$src, node:$addr, i64)>; 349 350// Signed and unsigned comparisons. 351def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 352 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 353 return Type != SystemZICMP::UnsignedOnly; 354}]>; 355def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 356 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 357 return Type != SystemZICMP::SignedOnly; 358}]>; 359 360// Register- and memory-based TEST UNDER MASK. 361def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 362def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 363 364// Register sign-extend operations. Sub-32-bit values are represented as i32s. 365def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 366def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 367def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 368 369// Match extensions of an i32 to an i64, followed by an in-register sign 370// extension from a sub-i32 value. 371def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 372def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 373 374// Register zero-extend operations. Sub-32-bit values are represented as i32s. 375def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 376def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 377def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 378 379// Extending loads in which the extension type can be signed. 380def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 381 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 382 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 383}]>; 384def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 385 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 386}]>; 387def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 388 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 389}]>; 390def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 391 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 392}]>; 393 394// Extending loads in which the extension type can be unsigned. 395def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 396 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 397 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 398}]>; 399def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 400 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 401}]>; 402def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 403 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 404}]>; 405def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 406 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 407}]>; 408 409// Extending loads in which the extension type doesn't matter. 410def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 411 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 412}]>; 413def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 414 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 415}]>; 416def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 417 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 418}]>; 419def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 420 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 421}]>; 422 423// Aligned loads. 424class AlignedLoad<SDPatternOperator load> 425 : PatFrag<(ops node:$addr), (load node:$addr), [{ 426 auto *Load = cast<LoadSDNode>(N); 427 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 428}]>; 429def aligned_load : AlignedLoad<load>; 430def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 431def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 432def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 433def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 434 435// Aligned stores. 436class AlignedStore<SDPatternOperator store> 437 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 438 auto *Store = cast<StoreSDNode>(N); 439 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 440}]>; 441def aligned_store : AlignedStore<store>; 442def aligned_truncstorei16 : AlignedStore<truncstorei16>; 443def aligned_truncstorei32 : AlignedStore<truncstorei32>; 444 445// Non-volatile loads. Used for instructions that might access the storage 446// location multiple times. 447class NonvolatileLoad<SDPatternOperator load> 448 : PatFrag<(ops node:$addr), (load node:$addr), [{ 449 auto *Load = cast<LoadSDNode>(N); 450 return !Load->isVolatile(); 451}]>; 452def nonvolatile_load : NonvolatileLoad<load>; 453def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 454def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 455def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 456 457// Non-volatile stores. 458class NonvolatileStore<SDPatternOperator store> 459 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 460 auto *Store = cast<StoreSDNode>(N); 461 return !Store->isVolatile(); 462}]>; 463def nonvolatile_store : NonvolatileStore<store>; 464def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 465def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 466def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 467 468// A store of a load that can be implemented using MVC. 469def mvc_store : PatFrag<(ops node:$value, node:$addr), 470 (unindexedstore node:$value, node:$addr), 471 [{ return storeLoadCanUseMVC(N); }]>; 472 473// Binary read-modify-write operations on memory in which the other 474// operand is also memory and for which block operations like NC can 475// be used. There are two patterns for each operator, depending on 476// which operand contains the "other" load. 477multiclass block_op<SDPatternOperator operator> { 478 def "1" : PatFrag<(ops node:$value, node:$addr), 479 (unindexedstore (operator node:$value, 480 (unindexedload node:$addr)), 481 node:$addr), 482 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 483 def "2" : PatFrag<(ops node:$value, node:$addr), 484 (unindexedstore (operator (unindexedload node:$addr), 485 node:$value), 486 node:$addr), 487 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 488} 489defm block_and : block_op<and>; 490defm block_or : block_op<or>; 491defm block_xor : block_op<xor>; 492 493// Insertions. 494def inserti8 : PatFrag<(ops node:$src1, node:$src2), 495 (or (and node:$src1, -256), node:$src2)>; 496def insertll : PatFrag<(ops node:$src1, node:$src2), 497 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 498def insertlh : PatFrag<(ops node:$src1, node:$src2), 499 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 500def inserthl : PatFrag<(ops node:$src1, node:$src2), 501 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 502def inserthh : PatFrag<(ops node:$src1, node:$src2), 503 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 504def insertlf : PatFrag<(ops node:$src1, node:$src2), 505 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 506def inserthf : PatFrag<(ops node:$src1, node:$src2), 507 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 508 509// ORs that can be treated as insertions. 510def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 511 (or node:$src1, node:$src2), [{ 512 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 513 return CurDAG->MaskedValueIsZero(N->getOperand(0), 514 APInt::getLowBitsSet(BitWidth, 8)); 515}]>; 516 517// ORs that can be treated as reversed insertions. 518def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 519 (or node:$src1, node:$src2), [{ 520 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 521 return CurDAG->MaskedValueIsZero(N->getOperand(1), 522 APInt::getLowBitsSet(BitWidth, 8)); 523}]>; 524 525// Negative integer absolute. 526def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 527 528// Integer absolute, matching the canonical form generated by DAGCombiner. 529def z_iabs32 : PatFrag<(ops node:$src), 530 (xor (add node:$src, (sra node:$src, (i32 31))), 531 (sra node:$src, (i32 31)))>; 532def z_iabs64 : PatFrag<(ops node:$src), 533 (xor (add node:$src, (sra node:$src, (i32 63))), 534 (sra node:$src, (i32 63)))>; 535def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 536def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 537 538// Integer multiply-and-add 539def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 540 (add (mul node:$src1, node:$src2), node:$src3)>; 541 542// Fused multiply-subtract, using the natural operand order. 543def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 544 (fma node:$src1, node:$src2, (fneg node:$src3))>; 545 546// Fused multiply-add and multiply-subtract, but with the order of the 547// operands matching SystemZ's MA and MS instructions. 548def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 549 (fma node:$src2, node:$src3, node:$src1)>; 550def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 551 (fma node:$src2, node:$src3, (fneg node:$src1))>; 552 553// Negative fused multiply-add and multiply-subtract. 554def fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 555 (fneg (fma node:$src1, node:$src2, node:$src3))>; 556def fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 557 (fneg (fms node:$src1, node:$src2, node:$src3))>; 558 559// Floating-point negative absolute. 560def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 561 562// Create a unary operator that loads from memory and then performs 563// the given operation on it. 564class loadu<SDPatternOperator operator, SDPatternOperator load = load> 565 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 566 567// Create a store operator that performs the given unary operation 568// on the value before storing it. 569class storeu<SDPatternOperator operator, SDPatternOperator store = store> 570 : PatFrag<(ops node:$value, node:$addr), 571 (store (operator node:$value), node:$addr)>; 572 573// Create a store operator that performs the given inherent operation 574// and stores the resulting value. 575class storei<SDPatternOperator operator, SDPatternOperator store = store> 576 : PatFrag<(ops node:$addr), 577 (store (operator), node:$addr)>; 578 579// Vector representation of all-zeros and all-ones. 580def z_vzero : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 0))))>; 581def z_vones : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 65535))))>; 582 583// Load a scalar and replicate it in all elements of a vector. 584class z_replicate_load<ValueType scalartype, SDPatternOperator load> 585 : PatFrag<(ops node:$addr), 586 (z_replicate (scalartype (load node:$addr)))>; 587def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 588def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 589def z_replicate_loadi32 : z_replicate_load<i32, load>; 590def z_replicate_loadi64 : z_replicate_load<i64, load>; 591def z_replicate_loadf32 : z_replicate_load<f32, load>; 592def z_replicate_loadf64 : z_replicate_load<f64, load>; 593 594// Load a scalar and insert it into a single element of a vector. 595class z_vle<ValueType scalartype, SDPatternOperator load> 596 : PatFrag<(ops node:$vec, node:$addr, node:$index), 597 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 598 node:$index)>; 599def z_vlei8 : z_vle<i32, anyextloadi8>; 600def z_vlei16 : z_vle<i32, anyextloadi16>; 601def z_vlei32 : z_vle<i32, load>; 602def z_vlei64 : z_vle<i64, load>; 603def z_vlef32 : z_vle<f32, load>; 604def z_vlef64 : z_vle<f64, load>; 605 606// Load a scalar and insert it into the low element of the high i64 of a 607// zeroed vector. 608class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 609 : PatFrag<(ops node:$addr), 610 (z_vector_insert (z_vzero), 611 (scalartype (load node:$addr)), (i32 index))>; 612def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 613def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 614def z_vllezi32 : z_vllez<i32, load, 1>; 615def z_vllezi64 : PatFrag<(ops node:$addr), 616 (z_join_dwords (i64 (load node:$addr)), (i64 0))>; 617// We use high merges to form a v4f32 from four f32s. Propagating zero 618// into all elements but index 1 gives this expression. 619def z_vllezf32 : PatFrag<(ops node:$addr), 620 (bitconvert 621 (z_merge_high 622 (v2i64 623 (z_unpackl_high 624 (v4i32 625 (bitconvert 626 (v4f32 (scalar_to_vector 627 (f32 (load node:$addr)))))))), 628 (v2i64 (z_vzero))))>; 629def z_vllezf64 : PatFrag<(ops node:$addr), 630 (z_merge_high 631 (scalar_to_vector (f64 (load node:$addr))), 632 (z_vzero))>; 633 634// Similarly for the high element of a zeroed vector. 635def z_vllezli32 : z_vllez<i32, load, 0>; 636def z_vllezlf32 : PatFrag<(ops node:$addr), 637 (bitconvert 638 (z_merge_high 639 (v2i64 640 (bitconvert 641 (z_merge_high 642 (v4f32 (scalar_to_vector 643 (f32 (load node:$addr)))), 644 (v4f32 (z_vzero))))), 645 (v2i64 (z_vzero))))>; 646 647// Store one element of a vector. 648class z_vste<ValueType scalartype, SDPatternOperator store> 649 : PatFrag<(ops node:$vec, node:$addr, node:$index), 650 (store (scalartype (z_vector_extract node:$vec, node:$index)), 651 node:$addr)>; 652def z_vstei8 : z_vste<i32, truncstorei8>; 653def z_vstei16 : z_vste<i32, truncstorei16>; 654def z_vstei32 : z_vste<i32, store>; 655def z_vstei64 : z_vste<i64, store>; 656def z_vstef32 : z_vste<f32, store>; 657def z_vstef64 : z_vste<f64, store>; 658 659// Arithmetic negation on vectors. 660def z_vneg : PatFrag<(ops node:$x), (sub (z_vzero), node:$x)>; 661 662// Bitwise negation on vectors. 663def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (z_vones))>; 664 665// Signed "integer greater than zero" on vectors. 666def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (z_vzero))>; 667 668// Signed "integer less than zero" on vectors. 669def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (z_vzero), node:$x)>; 670 671// Integer absolute on vectors. 672class z_viabs<int shift> 673 : PatFrag<(ops node:$src), 674 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 675 (z_vsra_by_scalar node:$src, (i32 shift)))>; 676def z_viabs8 : z_viabs<7>; 677def z_viabs16 : z_viabs<15>; 678def z_viabs32 : z_viabs<31>; 679def z_viabs64 : z_viabs<63>; 680 681// Sign-extend the i64 elements of a vector. 682class z_vse<int shift> 683 : PatFrag<(ops node:$src), 684 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 685def z_vsei8 : z_vse<56>; 686def z_vsei16 : z_vse<48>; 687def z_vsei32 : z_vse<32>; 688 689// ...and again with the extensions being done on individual i64 scalars. 690class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 691 : PatFrag<(ops node:$src), 692 (z_join_dwords 693 (operator (z_vector_extract node:$src, index1)), 694 (operator (z_vector_extract node:$src, index2)))>; 695def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 696def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 697def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 698