1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Type profiles 12//===----------------------------------------------------------------------===// 13def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 14 SDTCisVT<1, i64>]>; 15def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 16 SDTCisVT<1, i64>]>; 17def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 18def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>; 19def SDT_ZICmp : SDTypeProfile<0, 3, 20 [SDTCisSameAs<0, 1>, 21 SDTCisVT<2, i32>]>; 22def SDT_ZBRCCMask : SDTypeProfile<0, 3, 23 [SDTCisVT<0, i32>, 24 SDTCisVT<1, i32>, 25 SDTCisVT<2, OtherVT>]>; 26def SDT_ZSelectCCMask : SDTypeProfile<1, 4, 27 [SDTCisSameAs<0, 1>, 28 SDTCisSameAs<1, 2>, 29 SDTCisVT<3, i32>, 30 SDTCisVT<4, i32>]>; 31def SDT_ZWrapPtr : SDTypeProfile<1, 1, 32 [SDTCisSameAs<0, 1>, 33 SDTCisPtrTy<0>]>; 34def SDT_ZWrapOffset : SDTypeProfile<1, 2, 35 [SDTCisSameAs<0, 1>, 36 SDTCisSameAs<0, 2>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 39def SDT_ZGR128Binary : SDTypeProfile<1, 2, 40 [SDTCisVT<0, untyped>, 41 SDTCisInt<1>, 42 SDTCisInt<2>]>; 43def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 44 [SDTCisVT<0, i32>, 45 SDTCisPtrTy<1>, 46 SDTCisVT<2, i32>, 47 SDTCisVT<3, i32>, 48 SDTCisVT<4, i32>, 49 SDTCisVT<5, i32>]>; 50def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6, 51 [SDTCisVT<0, i32>, 52 SDTCisPtrTy<1>, 53 SDTCisVT<2, i32>, 54 SDTCisVT<3, i32>, 55 SDTCisVT<4, i32>, 56 SDTCisVT<5, i32>, 57 SDTCisVT<6, i32>]>; 58def SDT_ZAtomicCmpSwap : SDTypeProfile<1, 3, 59 [SDTCisInt<0>, 60 SDTCisPtrTy<1>, 61 SDTCisSameAs<0, 2>, 62 SDTCisSameAs<0, 3>]>; 63def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 64 [SDTCisVT<0, untyped>, 65 SDTCisPtrTy<1>]>; 66def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 67 [SDTCisVT<0, untyped>, 68 SDTCisPtrTy<1>]>; 69def SDT_ZAtomicCmpSwap128 : SDTypeProfile<1, 3, 70 [SDTCisVT<0, untyped>, 71 SDTCisPtrTy<1>, 72 SDTCisVT<2, untyped>, 73 SDTCisVT<3, untyped>]>; 74def SDT_ZMemMemLength : SDTypeProfile<0, 3, 75 [SDTCisPtrTy<0>, 76 SDTCisPtrTy<1>, 77 SDTCisVT<2, i64>]>; 78def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 79 [SDTCisPtrTy<0>, 80 SDTCisPtrTy<1>, 81 SDTCisVT<2, i64>, 82 SDTCisVT<3, i64>]>; 83def SDT_ZString : SDTypeProfile<1, 3, 84 [SDTCisPtrTy<0>, 85 SDTCisPtrTy<1>, 86 SDTCisPtrTy<2>, 87 SDTCisVT<3, i32>]>; 88def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>; 89def SDT_ZPrefetch : SDTypeProfile<0, 2, 90 [SDTCisVT<0, i32>, 91 SDTCisPtrTy<1>]>; 92def SDT_ZLoadBSwap : SDTypeProfile<1, 2, 93 [SDTCisInt<0>, 94 SDTCisPtrTy<1>, 95 SDTCisVT<2, OtherVT>]>; 96def SDT_ZStoreBSwap : SDTypeProfile<0, 3, 97 [SDTCisInt<0>, 98 SDTCisPtrTy<1>, 99 SDTCisVT<2, OtherVT>]>; 100def SDT_ZTBegin : SDTypeProfile<0, 2, 101 [SDTCisPtrTy<0>, 102 SDTCisVT<1, i32>]>; 103def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 104 [SDTCisVec<0>, 105 SDTCisSameAs<0, 1>, 106 SDTCisVT<3, i32>]>; 107def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 108 [SDTCisVec<1>, 109 SDTCisVT<2, i32>]>; 110def SDT_ZReplicate : SDTypeProfile<1, 1, 111 [SDTCisVec<0>]>; 112def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 113 [SDTCisVec<0>, 114 SDTCisVec<1>]>; 115def SDT_ZVecUnary : SDTypeProfile<1, 1, 116 [SDTCisVec<0>, 117 SDTCisSameAs<0, 1>]>; 118def SDT_ZVecBinary : SDTypeProfile<1, 2, 119 [SDTCisVec<0>, 120 SDTCisSameAs<0, 1>, 121 SDTCisSameAs<0, 2>]>; 122def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 123 [SDTCisVec<0>, 124 SDTCisSameAs<0, 1>, 125 SDTCisVT<2, i32>]>; 126def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 127 [SDTCisVec<0>, 128 SDTCisVec<1>, 129 SDTCisSameAs<1, 2>]>; 130def SDT_ZVecBinaryConvInt : SDTypeProfile<1, 2, 131 [SDTCisVec<0>, 132 SDTCisVec<1>, 133 SDTCisVT<2, i32>]>; 134def SDT_ZRotateMask : SDTypeProfile<1, 2, 135 [SDTCisVec<0>, 136 SDTCisVT<1, i32>, 137 SDTCisVT<2, i32>]>; 138def SDT_ZJoinDwords : SDTypeProfile<1, 2, 139 [SDTCisVT<0, v2i64>, 140 SDTCisVT<1, i64>, 141 SDTCisVT<2, i64>]>; 142def SDT_ZVecTernary : SDTypeProfile<1, 3, 143 [SDTCisVec<0>, 144 SDTCisSameAs<0, 1>, 145 SDTCisSameAs<0, 2>, 146 SDTCisSameAs<0, 3>]>; 147def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 148 [SDTCisVec<0>, 149 SDTCisSameAs<0, 1>, 150 SDTCisSameAs<0, 2>, 151 SDTCisVT<3, i32>]>; 152def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 153 [SDTCisVec<0>, 154 SDTCisSameAs<0, 1>, 155 SDTCisSameAs<0, 2>, 156 SDTCisSameAs<0, 3>, 157 SDTCisVT<4, i32>]>; 158def SDT_ZTest : SDTypeProfile<0, 2, [SDTCisVT<1, i64>]>; 159 160//===----------------------------------------------------------------------===// 161// Node definitions 162//===----------------------------------------------------------------------===// 163 164// These are target-independent nodes, but have target-specific formats. 165def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 166 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 167def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 168 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 169 SDNPOutGlue]>; 170def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 171 172// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 173def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 174 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 175def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 176 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 177 SDNPVariadic]>; 178def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 179 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 180 SDNPVariadic]>; 181def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 182 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 183 SDNPVariadic]>; 184def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 185 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 186 SDNPVariadic]>; 187def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 188def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 189 SDT_ZWrapOffset, []>; 190def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 191def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>; 192def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>; 193def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>; 194def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 195 [SDNPHasChain, SDNPInGlue]>; 196def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask, 197 [SDNPInGlue]>; 198def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 199def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 200def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 201def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 202def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 203def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 204 205def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 206 [SDNPHasChain, SDNPSideEffect]>; 207 208def z_loadbswap : SDNode<"SystemZISD::LRV", SDT_ZLoadBSwap, 209 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 210def z_storebswap : SDNode<"SystemZISD::STRV", SDT_ZStoreBSwap, 211 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 212 213def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest, [SDNPOutGlue]>; 214 215// Defined because the index is an i32 rather than a pointer. 216def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 217 SDT_ZInsertVectorElt>; 218def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 219 SDT_ZExtractVectorElt>; 220def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 221def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 222def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 223def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 224def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 225def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 226def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 227def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 228def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 229 SDT_ZVecTernaryInt>; 230def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 231def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 232def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConv, 233 [SDNPOutGlue]>; 234def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConv, 235 [SDNPOutGlue]>; 236def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 237def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 238def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 239def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 240def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 241 SDT_ZVecBinaryInt>; 242def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 243 SDT_ZVecBinaryInt>; 244def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 245 SDT_ZVecBinaryInt>; 246def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 247def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 248def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 249def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 250def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinary, 251 [SDNPOutGlue]>; 252def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinary, 253 [SDNPOutGlue]>; 254def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinary, 255 [SDNPOutGlue]>; 256def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 257def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 258def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 259def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConv, 260 [SDNPOutGlue]>; 261def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConv, 262 [SDNPOutGlue]>; 263def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConv, 264 [SDNPOutGlue]>; 265def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 266def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 267def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp, [SDNPOutGlue]>; 268def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryInt, 269 [SDNPOutGlue]>; 270def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryInt, 271 [SDNPOutGlue]>; 272def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinary, 273 [SDNPOutGlue]>; 274def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinary, 275 [SDNPOutGlue]>; 276def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinary, 277 [SDNPOutGlue]>; 278def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinary, 279 [SDNPOutGlue]>; 280def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnary, 281 [SDNPOutGlue]>; 282def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", SDT_ZVecQuaternaryInt, 283 [SDNPOutGlue]>; 284def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 285 SDT_ZVecQuaternaryInt, [SDNPOutGlue]>; 286def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvInt, 287 [SDNPOutGlue]>; 288 289class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 290 : SDNode<"SystemZISD::"##name, profile, 291 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 292 293def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 294def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 295def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 296def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 297def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 298def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 299def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 300def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 301def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 302def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 303def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 304 305def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 306 SDT_ZAtomicCmpSwap, 307 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 308 SDNPOutGlue, SDNPMemOperand]>; 309def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 310 SDT_ZAtomicCmpSwapW, 311 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 312 SDNPOutGlue, SDNPMemOperand]>; 313 314def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 315 SDT_ZAtomicLoad128, 316 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 317def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 318 SDT_ZAtomicStore128, 319 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 320def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 321 SDT_ZAtomicCmpSwap128, 322 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 323 SDNPOutGlue, SDNPMemOperand]>; 324 325def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 326 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 327def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 328 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 329def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 330 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 331def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 332 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 333def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 334 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 335def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 336 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 337def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 338 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 339def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 340 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 341def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength, 342 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 343def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop, 344 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 345def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString, 346 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 347def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 348 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 349def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString, 350 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>; 351def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic, 352 [SDNPInGlue]>; 353def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 354 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 355 SDNPMemOperand]>; 356 357def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 358 [SDNPHasChain, SDNPOutGlue, SDNPMayStore, 359 SDNPSideEffect]>; 360def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 361 [SDNPHasChain, SDNPOutGlue, SDNPMayStore, 362 SDNPSideEffect]>; 363def z_tend : SDNode<"SystemZISD::TEND", SDTNone, 364 [SDNPHasChain, SDNPOutGlue, SDNPSideEffect]>; 365 366def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 367def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 368def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 369 370//===----------------------------------------------------------------------===// 371// Pattern fragments 372//===----------------------------------------------------------------------===// 373 374def z_lrvh : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i16)>; 375def z_lrv : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i32)>; 376def z_lrvg : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i64)>; 377 378def z_strvh : PatFrag<(ops node:$src, node:$addr), 379 (z_storebswap node:$src, node:$addr, i16)>; 380def z_strv : PatFrag<(ops node:$src, node:$addr), 381 (z_storebswap node:$src, node:$addr, i32)>; 382def z_strvg : PatFrag<(ops node:$src, node:$addr), 383 (z_storebswap node:$src, node:$addr, i64)>; 384 385// Signed and unsigned comparisons. 386def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 387 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 388 return Type != SystemZICMP::UnsignedOnly; 389}]>; 390def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 391 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 392 return Type != SystemZICMP::SignedOnly; 393}]>; 394 395// Register- and memory-based TEST UNDER MASK. 396def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 397def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 398 399// Register sign-extend operations. Sub-32-bit values are represented as i32s. 400def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 401def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 402def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 403 404// Match extensions of an i32 to an i64, followed by an in-register sign 405// extension from a sub-i32 value. 406def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 407def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 408 409// Register zero-extend operations. Sub-32-bit values are represented as i32s. 410def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 411def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 412def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 413 414// Extending loads in which the extension type can be signed. 415def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 416 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 417 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 418}]>; 419def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 420 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 421}]>; 422def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 423 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 424}]>; 425def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 426 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 427}]>; 428 429// Extending loads in which the extension type can be unsigned. 430def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 431 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 432 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 433}]>; 434def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 435 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 436}]>; 437def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 438 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 439}]>; 440def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 441 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 442}]>; 443 444// Extending loads in which the extension type doesn't matter. 445def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 446 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 447}]>; 448def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 449 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 450}]>; 451def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 452 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 453}]>; 454def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 455 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 456}]>; 457 458// Aligned loads. 459class AlignedLoad<SDPatternOperator load> 460 : PatFrag<(ops node:$addr), (load node:$addr), [{ 461 auto *Load = cast<LoadSDNode>(N); 462 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 463}]>; 464def aligned_load : AlignedLoad<load>; 465def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 466def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 467def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 468def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 469 470// Aligned stores. 471class AlignedStore<SDPatternOperator store> 472 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 473 auto *Store = cast<StoreSDNode>(N); 474 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 475}]>; 476def aligned_store : AlignedStore<store>; 477def aligned_truncstorei16 : AlignedStore<truncstorei16>; 478def aligned_truncstorei32 : AlignedStore<truncstorei32>; 479 480// Non-volatile loads. Used for instructions that might access the storage 481// location multiple times. 482class NonvolatileLoad<SDPatternOperator load> 483 : PatFrag<(ops node:$addr), (load node:$addr), [{ 484 auto *Load = cast<LoadSDNode>(N); 485 return !Load->isVolatile(); 486}]>; 487def nonvolatile_load : NonvolatileLoad<load>; 488def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 489def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 490def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 491 492// Non-volatile stores. 493class NonvolatileStore<SDPatternOperator store> 494 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 495 auto *Store = cast<StoreSDNode>(N); 496 return !Store->isVolatile(); 497}]>; 498def nonvolatile_store : NonvolatileStore<store>; 499def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 500def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 501def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 502 503// A store of a load that can be implemented using MVC. 504def mvc_store : PatFrag<(ops node:$value, node:$addr), 505 (unindexedstore node:$value, node:$addr), 506 [{ return storeLoadCanUseMVC(N); }]>; 507 508// Binary read-modify-write operations on memory in which the other 509// operand is also memory and for which block operations like NC can 510// be used. There are two patterns for each operator, depending on 511// which operand contains the "other" load. 512multiclass block_op<SDPatternOperator operator> { 513 def "1" : PatFrag<(ops node:$value, node:$addr), 514 (unindexedstore (operator node:$value, 515 (unindexedload node:$addr)), 516 node:$addr), 517 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 518 def "2" : PatFrag<(ops node:$value, node:$addr), 519 (unindexedstore (operator (unindexedload node:$addr), 520 node:$value), 521 node:$addr), 522 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 523} 524defm block_and : block_op<and>; 525defm block_or : block_op<or>; 526defm block_xor : block_op<xor>; 527 528// Insertions. 529def inserti8 : PatFrag<(ops node:$src1, node:$src2), 530 (or (and node:$src1, -256), node:$src2)>; 531def insertll : PatFrag<(ops node:$src1, node:$src2), 532 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 533def insertlh : PatFrag<(ops node:$src1, node:$src2), 534 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 535def inserthl : PatFrag<(ops node:$src1, node:$src2), 536 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 537def inserthh : PatFrag<(ops node:$src1, node:$src2), 538 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 539def insertlf : PatFrag<(ops node:$src1, node:$src2), 540 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 541def inserthf : PatFrag<(ops node:$src1, node:$src2), 542 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 543 544// ORs that can be treated as insertions. 545def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 546 (or node:$src1, node:$src2), [{ 547 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 548 return CurDAG->MaskedValueIsZero(N->getOperand(0), 549 APInt::getLowBitsSet(BitWidth, 8)); 550}]>; 551 552// ORs that can be treated as reversed insertions. 553def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 554 (or node:$src1, node:$src2), [{ 555 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 556 return CurDAG->MaskedValueIsZero(N->getOperand(1), 557 APInt::getLowBitsSet(BitWidth, 8)); 558}]>; 559 560// Negative integer absolute. 561def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 562 563// Integer absolute, matching the canonical form generated by DAGCombiner. 564def z_iabs32 : PatFrag<(ops node:$src), 565 (xor (add node:$src, (sra node:$src, (i32 31))), 566 (sra node:$src, (i32 31)))>; 567def z_iabs64 : PatFrag<(ops node:$src), 568 (xor (add node:$src, (sra node:$src, (i32 63))), 569 (sra node:$src, (i32 63)))>; 570def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 571def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 572 573// Integer multiply-and-add 574def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 575 (add (mul node:$src1, node:$src2), node:$src3)>; 576 577// Fused multiply-subtract, using the natural operand order. 578def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 579 (fma node:$src1, node:$src2, (fneg node:$src3))>; 580 581// Fused multiply-add and multiply-subtract, but with the order of the 582// operands matching SystemZ's MA and MS instructions. 583def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 584 (fma node:$src2, node:$src3, node:$src1)>; 585def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 586 (fma node:$src2, node:$src3, (fneg node:$src1))>; 587 588// Negative fused multiply-add and multiply-subtract. 589def fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 590 (fneg (fma node:$src1, node:$src2, node:$src3))>; 591def fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 592 (fneg (fms node:$src1, node:$src2, node:$src3))>; 593 594// Floating-point negative absolute. 595def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 596 597// Create a unary operator that loads from memory and then performs 598// the given operation on it. 599class loadu<SDPatternOperator operator, SDPatternOperator load = load> 600 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 601 602// Create a store operator that performs the given unary operation 603// on the value before storing it. 604class storeu<SDPatternOperator operator, SDPatternOperator store = store> 605 : PatFrag<(ops node:$value, node:$addr), 606 (store (operator node:$value), node:$addr)>; 607 608// Create a store operator that performs the given inherent operation 609// and stores the resulting value. 610class storei<SDPatternOperator operator, SDPatternOperator store = store> 611 : PatFrag<(ops node:$addr), 612 (store (operator), node:$addr)>; 613 614// Vector representation of all-zeros and all-ones. 615def z_vzero : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 0))))>; 616def z_vones : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 65535))))>; 617 618// Load a scalar and replicate it in all elements of a vector. 619class z_replicate_load<ValueType scalartype, SDPatternOperator load> 620 : PatFrag<(ops node:$addr), 621 (z_replicate (scalartype (load node:$addr)))>; 622def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 623def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 624def z_replicate_loadi32 : z_replicate_load<i32, load>; 625def z_replicate_loadi64 : z_replicate_load<i64, load>; 626def z_replicate_loadf32 : z_replicate_load<f32, load>; 627def z_replicate_loadf64 : z_replicate_load<f64, load>; 628 629// Load a scalar and insert it into a single element of a vector. 630class z_vle<ValueType scalartype, SDPatternOperator load> 631 : PatFrag<(ops node:$vec, node:$addr, node:$index), 632 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 633 node:$index)>; 634def z_vlei8 : z_vle<i32, anyextloadi8>; 635def z_vlei16 : z_vle<i32, anyextloadi16>; 636def z_vlei32 : z_vle<i32, load>; 637def z_vlei64 : z_vle<i64, load>; 638def z_vlef32 : z_vle<f32, load>; 639def z_vlef64 : z_vle<f64, load>; 640 641// Load a scalar and insert it into the low element of the high i64 of a 642// zeroed vector. 643class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 644 : PatFrag<(ops node:$addr), 645 (z_vector_insert (z_vzero), 646 (scalartype (load node:$addr)), (i32 index))>; 647def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 648def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 649def z_vllezi32 : z_vllez<i32, load, 1>; 650def z_vllezi64 : PatFrag<(ops node:$addr), 651 (z_join_dwords (i64 (load node:$addr)), (i64 0))>; 652// We use high merges to form a v4f32 from four f32s. Propagating zero 653// into all elements but index 1 gives this expression. 654def z_vllezf32 : PatFrag<(ops node:$addr), 655 (bitconvert 656 (z_merge_high 657 (v2i64 658 (z_unpackl_high 659 (v4i32 660 (bitconvert 661 (v4f32 (scalar_to_vector 662 (f32 (load node:$addr)))))))), 663 (v2i64 (z_vzero))))>; 664def z_vllezf64 : PatFrag<(ops node:$addr), 665 (z_merge_high 666 (scalar_to_vector (f64 (load node:$addr))), 667 (z_vzero))>; 668 669// Similarly for the high element of a zeroed vector. 670def z_vllezli32 : z_vllez<i32, load, 0>; 671def z_vllezlf32 : PatFrag<(ops node:$addr), 672 (bitconvert 673 (z_merge_high 674 (v2i64 675 (bitconvert 676 (z_merge_high 677 (v4f32 (scalar_to_vector 678 (f32 (load node:$addr)))), 679 (v4f32 (z_vzero))))), 680 (v2i64 (z_vzero))))>; 681 682// Store one element of a vector. 683class z_vste<ValueType scalartype, SDPatternOperator store> 684 : PatFrag<(ops node:$vec, node:$addr, node:$index), 685 (store (scalartype (z_vector_extract node:$vec, node:$index)), 686 node:$addr)>; 687def z_vstei8 : z_vste<i32, truncstorei8>; 688def z_vstei16 : z_vste<i32, truncstorei16>; 689def z_vstei32 : z_vste<i32, store>; 690def z_vstei64 : z_vste<i64, store>; 691def z_vstef32 : z_vste<f32, store>; 692def z_vstef64 : z_vste<f64, store>; 693 694// Arithmetic negation on vectors. 695def z_vneg : PatFrag<(ops node:$x), (sub (z_vzero), node:$x)>; 696 697// Bitwise negation on vectors. 698def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (z_vones))>; 699 700// Signed "integer greater than zero" on vectors. 701def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (z_vzero))>; 702 703// Signed "integer less than zero" on vectors. 704def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (z_vzero), node:$x)>; 705 706// Integer absolute on vectors. 707class z_viabs<int shift> 708 : PatFrag<(ops node:$src), 709 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 710 (z_vsra_by_scalar node:$src, (i32 shift)))>; 711def z_viabs8 : z_viabs<7>; 712def z_viabs16 : z_viabs<15>; 713def z_viabs32 : z_viabs<31>; 714def z_viabs64 : z_viabs<63>; 715 716// Sign-extend the i64 elements of a vector. 717class z_vse<int shift> 718 : PatFrag<(ops node:$src), 719 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 720def z_vsei8 : z_vse<56>; 721def z_vsei16 : z_vse<48>; 722def z_vsei32 : z_vse<32>; 723 724// ...and again with the extensions being done on individual i64 scalars. 725class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 726 : PatFrag<(ops node:$src), 727 (z_join_dwords 728 (operator (z_vector_extract node:$src, index1)), 729 (operator (z_vector_extract node:$src, index2)))>; 730def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 731def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 732def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 733