1//===-- SystemZ.td - Describe the SystemZ target machine -----*- tblgen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11// Target-independent interfaces which we are implementing
12//===----------------------------------------------------------------------===//
13
14include "llvm/Target/Target.td"
15
16//===----------------------------------------------------------------------===//
17// SystemZ subtargets scheduling models.
18//===----------------------------------------------------------------------===//
19include "SystemZSchedule.td"
20
21//===----------------------------------------------------------------------===//
22// SystemZ supported processors and features
23//===----------------------------------------------------------------------===//
24
25include "SystemZProcessors.td"
26
27//===----------------------------------------------------------------------===//
28// Register file description
29//===----------------------------------------------------------------------===//
30
31include "SystemZRegisterInfo.td"
32
33//===----------------------------------------------------------------------===//
34// Calling convention description
35//===----------------------------------------------------------------------===//
36
37include "SystemZCallingConv.td"
38
39//===----------------------------------------------------------------------===//
40// Instruction descriptions
41//===----------------------------------------------------------------------===//
42
43include "SystemZOperators.td"
44include "SystemZOperands.td"
45include "SystemZPatterns.td"
46include "SystemZInstrFormats.td"
47include "SystemZInstrInfo.td"
48include "SystemZInstrVector.td"
49include "SystemZInstrFP.td"
50
51def SystemZInstrInfo : InstrInfo {}
52
53//===----------------------------------------------------------------------===//
54// Assembly parser
55//===----------------------------------------------------------------------===//
56
57def SystemZAsmParser : AsmParser {
58  let ShouldEmitMatchRegisterName = 0;
59}
60
61//===----------------------------------------------------------------------===//
62// Top-level target declaration
63//===----------------------------------------------------------------------===//
64
65def SystemZ : Target {
66  let InstructionSet = SystemZInstrInfo;
67  let AssemblyParsers = [SystemZAsmParser];
68}
69