1//===---------------------------------------------------------------------===//
2// Random notes about and ideas for the SystemZ backend.
3//===---------------------------------------------------------------------===//
4
5The initial backend is deliberately restricted to z10.  We should add support
6for later architectures at some point.
7
8--
9
10If an inline asm ties an i32 "r" result to an i64 input, the input
11will be treated as an i32, leaving the upper bits uninitialised.
12For example:
13
14define void @f4(i32 *%dst) {
15  %val = call i32 asm "blah $0", "=r,0" (i64 103)
16  store i32 %val, i32 *%dst
17  ret void
18}
19
20from CodeGen/SystemZ/asm-09.ll will use LHI rather than LGHI.
21to load 103.  This seems to be a general target-independent problem.
22
23--
24
25The tuning of the choice between LOAD ADDRESS (LA) and addition in
26SystemZISelDAGToDAG.cpp is suspect.  It should be tweaked based on
27performance measurements.
28
29--
30
31There is no scheduling support.
32
33--
34
35We don't use the BRANCH ON INDEX instructions.
36
37--
38
39We don't use the TEST DATA CLASS instructions.
40
41--
42
43We only use MVC, XC and CLC for constant-length block operations.
44We could extend them to variable-length operations too,
45using EXECUTE RELATIVE LONG.
46
47MVCIN, MVCLE and CLCLE may be worthwhile too.
48
49--
50
51We don't use CUSE or the TRANSLATE family of instructions for string
52operations.  The TRANSLATE ones are probably more difficult to exploit.
53
54--
55
56We don't take full advantage of builtins like fabsl because the calling
57conventions require f128s to be returned by invisible reference.
58
59--
60
61ADD LOGICAL WITH SIGNED IMMEDIATE could be useful when we need to
62produce a carry.  SUBTRACT LOGICAL IMMEDIATE could be useful when we
63need to produce a borrow.  (Note that there are no memory forms of
64ADD LOGICAL WITH CARRY and SUBTRACT LOGICAL WITH BORROW, so the high
65part of 128-bit memory operations would probably need to be done
66via a register.)
67
68--
69
70We don't use ICM or STCM.
71
72--
73
74DAGCombiner doesn't yet fold truncations of extended loads.  Functions like:
75
76    unsigned long f (unsigned long x, unsigned short *y)
77    {
78      return (x << 32) | *y;
79    }
80
81therefore end up as:
82
83        sllg    %r2, %r2, 32
84        llgh    %r0, 0(%r3)
85        lr      %r2, %r0
86        br      %r14
87
88but truncating the load would give:
89
90        sllg    %r2, %r2, 32
91        lh      %r2, 0(%r3)
92        br      %r14
93
94--
95
96Functions like:
97
98define i64 @f1(i64 %a) {
99  %and = and i64 %a, 1
100  ret i64 %and
101}
102
103ought to be implemented as:
104
105        lhi     %r0, 1
106        ngr     %r2, %r0
107        br      %r14
108
109but two-address optimisations reverse the order of the AND and force:
110
111        lhi     %r0, 1
112        ngr     %r0, %r2
113        lgr     %r2, %r0
114        br      %r14
115
116CodeGen/SystemZ/and-04.ll has several examples of this.
117
118--
119
120Out-of-range displacements are usually handled by loading the full
121address into a register.  In many cases it would be better to create
122an anchor point instead.  E.g. for:
123
124define void @f4a(i128 *%aptr, i64 %base) {
125  %addr = add i64 %base, 524288
126  %bptr = inttoptr i64 %addr to i128 *
127  %a = load volatile i128 *%aptr
128  %b = load i128 *%bptr
129  %add = add i128 %a, %b
130  store i128 %add, i128 *%aptr
131  ret void
132}
133
134(from CodeGen/SystemZ/int-add-08.ll) we load %base+524288 and %base+524296
135into separate registers, rather than using %base+524288 as a base for both.
136
137--
138
139Dynamic stack allocations round the size to 8 bytes and then allocate
140that rounded amount.  It would be simpler to subtract the unrounded
141size from the copy of the stack pointer and then align the result.
142See CodeGen/SystemZ/alloca-01.ll for an example.
143
144--
145
146If needed, we can support 16-byte atomics using LPQ, STPQ and CSDG.
147
148--
149
150We might want to model all access registers and use them to spill
15132-bit values.
152
153--
154
155We might want to use the 'overflow' condition of eg. AR to support
156llvm.sadd.with.overflow.i32 and related instructions - the generated code
157for signed overflow check is currently quite bad.  This would improve
158the results of using -ftrapv.
159