1 //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the Sparc specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef SPARCTARGETMACHINE_H 15 #define SPARCTARGETMACHINE_H 16 17 #include "SparcInstrInfo.h" 18 #include "SparcISelLowering.h" 19 #include "SparcFrameLowering.h" 20 #include "SparcSelectionDAGInfo.h" 21 #include "SparcSubtarget.h" 22 #include "llvm/Target/TargetMachine.h" 23 #include "llvm/Target/TargetData.h" 24 #include "llvm/Target/TargetFrameLowering.h" 25 26 namespace llvm { 27 28 class SparcTargetMachine : public LLVMTargetMachine { 29 SparcSubtarget Subtarget; 30 const TargetData DataLayout; // Calculates type size & alignment 31 SparcTargetLowering TLInfo; 32 SparcSelectionDAGInfo TSInfo; 33 SparcInstrInfo InstrInfo; 34 SparcFrameLowering FrameLowering; 35 public: 36 SparcTargetMachine(const Target &T, StringRef TT, 37 StringRef CPU, StringRef FS, 38 Reloc::Model RM, CodeModel::Model CM, 39 CodeGenOpt::Level OL, bool is64bit); 40 41 virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; } 42 virtual const TargetFrameLowering *getFrameLowering() const { 43 return &FrameLowering; 44 } 45 virtual const SparcSubtarget *getSubtargetImpl() const{ return &Subtarget; } 46 virtual const SparcRegisterInfo *getRegisterInfo() const { 47 return &InstrInfo.getRegisterInfo(); 48 } 49 virtual const SparcTargetLowering* getTargetLowering() const { 50 return &TLInfo; 51 } 52 virtual const SparcSelectionDAGInfo* getSelectionDAGInfo() const { 53 return &TSInfo; 54 } 55 virtual const TargetData *getTargetData() const { return &DataLayout; } 56 57 // Pass Pipeline Configuration 58 virtual bool addInstSelector(PassManagerBase &PM); 59 virtual bool addPreEmitPass(PassManagerBase &PM); 60 }; 61 62 /// SparcV8TargetMachine - Sparc 32-bit target machine 63 /// 64 class SparcV8TargetMachine : public SparcTargetMachine { 65 public: 66 SparcV8TargetMachine(const Target &T, StringRef TT, 67 StringRef CPU, StringRef FS, 68 Reloc::Model RM, CodeModel::Model CM, 69 CodeGenOpt::Level OL); 70 }; 71 72 /// SparcV9TargetMachine - Sparc 64-bit target machine 73 /// 74 class SparcV9TargetMachine : public SparcTargetMachine { 75 public: 76 SparcV9TargetMachine(const Target &T, StringRef TT, 77 StringRef CPU, StringRef FS, 78 Reloc::Model RM, CodeModel::Model CM, 79 CodeGenOpt::Level OL); 80 }; 81 82 } // end namespace llvm 83 84 #endif 85