1 //===-- SPIRVMCTargetDesc.cpp - SPIR-V Target Descriptions ----*- C++ -*---===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file provides SPIR-V specific target descriptions. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "SPIRVMCTargetDesc.h" 14 #include "SPIRVInstPrinter.h" 15 #include "SPIRVMCAsmInfo.h" 16 #include "SPIRVTargetStreamer.h" 17 #include "TargetInfo/SPIRVTargetInfo.h" 18 #include "llvm/MC/MCInstrAnalysis.h" 19 #include "llvm/MC/MCInstrInfo.h" 20 #include "llvm/MC/MCRegisterInfo.h" 21 #include "llvm/MC/MCSubtargetInfo.h" 22 #include "llvm/MC/TargetRegistry.h" 23 24 #define GET_INSTRINFO_MC_DESC 25 #include "SPIRVGenInstrInfo.inc" 26 27 #define GET_SUBTARGETINFO_MC_DESC 28 #include "SPIRVGenSubtargetInfo.inc" 29 30 #define GET_REGINFO_MC_DESC 31 #include "SPIRVGenRegisterInfo.inc" 32 33 using namespace llvm; 34 35 static MCInstrInfo *createSPIRVMCInstrInfo() { 36 MCInstrInfo *X = new MCInstrInfo(); 37 InitSPIRVMCInstrInfo(X); 38 return X; 39 } 40 41 static MCRegisterInfo *createSPIRVMCRegisterInfo(const Triple &TT) { 42 MCRegisterInfo *X = new MCRegisterInfo(); 43 return X; 44 } 45 46 static MCSubtargetInfo * 47 createSPIRVMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { 48 return createSPIRVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); 49 } 50 51 static MCStreamer * 52 createSPIRVMCStreamer(const Triple &T, MCContext &Ctx, 53 std::unique_ptr<MCAsmBackend> &&MAB, 54 std::unique_ptr<MCObjectWriter> &&OW, 55 std::unique_ptr<MCCodeEmitter> &&Emitter, bool RelaxAll) { 56 return createSPIRVStreamer(Ctx, std::move(MAB), std::move(OW), 57 std::move(Emitter), RelaxAll); 58 } 59 60 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S, 61 formatted_raw_ostream &, 62 MCInstPrinter *, bool) { 63 return new SPIRVTargetStreamer(S); 64 } 65 66 static MCInstPrinter *createSPIRVMCInstPrinter(const Triple &T, 67 unsigned SyntaxVariant, 68 const MCAsmInfo &MAI, 69 const MCInstrInfo &MII, 70 const MCRegisterInfo &MRI) { 71 assert(SyntaxVariant == 0); 72 return new SPIRVInstPrinter(MAI, MII, MRI); 73 } 74 75 namespace { 76 77 class SPIRVMCInstrAnalysis : public MCInstrAnalysis { 78 public: 79 explicit SPIRVMCInstrAnalysis(const MCInstrInfo *Info) 80 : MCInstrAnalysis(Info) {} 81 }; 82 83 } // end anonymous namespace 84 85 static MCInstrAnalysis *createSPIRVInstrAnalysis(const MCInstrInfo *Info) { 86 return new SPIRVMCInstrAnalysis(Info); 87 } 88 89 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSPIRVTargetMC() { 90 for (Target *T : {&getTheSPIRV32Target(), &getTheSPIRV64Target()}) { 91 RegisterMCAsmInfo<SPIRVMCAsmInfo> X(*T); 92 TargetRegistry::RegisterMCInstrInfo(*T, createSPIRVMCInstrInfo); 93 TargetRegistry::RegisterMCRegInfo(*T, createSPIRVMCRegisterInfo); 94 TargetRegistry::RegisterMCSubtargetInfo(*T, createSPIRVMCSubtargetInfo); 95 TargetRegistry::RegisterSPIRVStreamer(*T, createSPIRVMCStreamer); 96 TargetRegistry::RegisterMCInstPrinter(*T, createSPIRVMCInstPrinter); 97 TargetRegistry::RegisterMCInstrAnalysis(*T, createSPIRVInstrAnalysis); 98 TargetRegistry::RegisterMCCodeEmitter(*T, createSPIRVMCCodeEmitter); 99 TargetRegistry::RegisterMCAsmBackend(*T, createSPIRVAsmBackend); 100 TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer); 101 } 102 } 103