1 //===-- RISCVTargetMachine.cpp - Define TargetMachine for RISCV -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Implements the info about RISCV target spec.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "RISCVTargetMachine.h"
15 #include "llvm/ADT/STLExtras.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
18 #include "llvm/CodeGen/TargetPassConfig.h"
19 #include "llvm/IR/LegacyPassManager.h"
20 #include "llvm/Support/FormattedStream.h"
21 #include "llvm/Support/TargetRegistry.h"
22 #include "llvm/Target/TargetOptions.h"
23 using namespace llvm;
24 
25 extern "C" void LLVMInitializeRISCVTarget() {
26   RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target());
27   RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target());
28 }
29 
30 static std::string computeDataLayout(const Triple &TT) {
31   if (TT.isArch64Bit()) {
32     return "e-m:e-i64:64-n32:64-S128";
33   } else {
34     assert(TT.isArch32Bit() && "only RV32 and RV64 are currently supported");
35     return "e-m:e-p:32:32-i64:64-n32-S128";
36   }
37 }
38 
39 static Reloc::Model getEffectiveRelocModel(const Triple &TT,
40                                            Optional<Reloc::Model> RM) {
41   if (!RM.hasValue())
42     return Reloc::Static;
43   return *RM;
44 }
45 
46 static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM) {
47   if (CM)
48     return *CM;
49   return CodeModel::Small;
50 }
51 
52 RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
53                                        StringRef CPU, StringRef FS,
54                                        const TargetOptions &Options,
55                                        Optional<Reloc::Model> RM,
56                                        Optional<CodeModel::Model> CM,
57                                        CodeGenOpt::Level OL, bool JIT)
58     : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
59                         getEffectiveRelocModel(TT, RM),
60                         getEffectiveCodeModel(CM), OL),
61       TLOF(make_unique<TargetLoweringObjectFileELF>()) {
62   initAsmInfo();
63 }
64 
65 TargetPassConfig *RISCVTargetMachine::createPassConfig(PassManagerBase &PM) {
66   return new TargetPassConfig(*this, PM);
67 }
68