1 //===-- RISCVSubtarget.cpp - RISCV Subtarget Information ------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the RISCV specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "RISCVSubtarget.h"
15 #include "RISCV.h"
16 #include "RISCVFrameLowering.h"
17 #include "llvm/Support/TargetRegistry.h"
18 
19 using namespace llvm;
20 
21 #define DEBUG_TYPE "riscv-subtarget"
22 
23 #define GET_SUBTARGETINFO_TARGET_DESC
24 #define GET_SUBTARGETINFO_CTOR
25 #include "RISCVGenSubtargetInfo.inc"
26 
27 void RISCVSubtarget::anchor() {}
28 
29 RISCVSubtarget &RISCVSubtarget::initializeSubtargetDependencies(StringRef CPU,
30                                                                 StringRef FS,
31                                                                 bool Is64Bit) {
32   // Determine default and user-specified characteristics
33   std::string CPUName = CPU;
34   if (CPUName.empty())
35     CPUName = Is64Bit ? "generic-rv64" : "generic-rv32";
36   ParseSubtargetFeatures(CPUName, FS);
37   if (Is64Bit) {
38     XLenVT = MVT::i64;
39     XLen = 64;
40   }
41   return *this;
42 }
43 
44 RISCVSubtarget::RISCVSubtarget(const Triple &TT, const std::string &CPU,
45                                const std::string &FS, const TargetMachine &TM)
46     : RISCVGenSubtargetInfo(TT, CPU, FS),
47       FrameLowering(initializeSubtargetDependencies(CPU, FS, TT.isArch64Bit())),
48       InstrInfo(), RegInfo(getHwMode()), TLInfo(TM, *this) {}
49