1 //===-- RISCVSubtarget.cpp - RISCV Subtarget Information ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the RISCV specific subclass of TargetSubtargetInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "RISCVSubtarget.h"
14 #include "RISCV.h"
15 #include "RISCVFrameLowering.h"
16 #include "llvm/Support/TargetRegistry.h"
17 
18 using namespace llvm;
19 
20 #define DEBUG_TYPE "riscv-subtarget"
21 
22 #define GET_SUBTARGETINFO_TARGET_DESC
23 #define GET_SUBTARGETINFO_CTOR
24 #include "RISCVGenSubtargetInfo.inc"
25 
26 void RISCVSubtarget::anchor() {}
27 
28 RISCVSubtarget &RISCVSubtarget::initializeSubtargetDependencies(StringRef CPU,
29                                                                 StringRef FS,
30                                                                 bool Is64Bit) {
31   // Determine default and user-specified characteristics
32   std::string CPUName = CPU;
33   if (CPUName.empty())
34     CPUName = Is64Bit ? "generic-rv64" : "generic-rv32";
35   ParseSubtargetFeatures(CPUName, FS);
36   if (Is64Bit) {
37     XLenVT = MVT::i64;
38     XLen = 64;
39   }
40   return *this;
41 }
42 
43 RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
44                                const TargetMachine &TM)
45     : RISCVGenSubtargetInfo(TT, CPU, FS),
46       FrameLowering(initializeSubtargetDependencies(CPU, FS, TT.isArch64Bit())),
47       InstrInfo(), RegInfo(getHwMode()), TLInfo(TM, *this) {}
48