1 //===-- RISCVISelLowering.h - RISCV DAG Lowering Interface ------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the interfaces that RISCV uses to lower LLVM code into a
11 // selection DAG.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_RISCV_RISCVISELLOWERING_H
16 #define LLVM_LIB_TARGET_RISCV_RISCVISELLOWERING_H
17 
18 #include "RISCV.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/Target/TargetLowering.h"
21 
22 namespace llvm {
23 class RISCVSubtarget;
24 namespace RISCVISD {
25 enum NodeType : unsigned {
26   FIRST_NUMBER = ISD::BUILTIN_OP_END,
27   RET_FLAG
28 };
29 }
30 
31 class RISCVTargetLowering : public TargetLowering {
32   const RISCVSubtarget &Subtarget;
33 
34 public:
35   explicit RISCVTargetLowering(const TargetMachine &TM,
36                                const RISCVSubtarget &STI);
37 
38   // Provide custom lowering hooks for some operations.
39   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
40 
41   // This method returns the name of a target specific DAG node.
42   const char *getTargetNodeName(unsigned Opcode) const override;
43 
44 private:
45   // Lower incoming arguments, copy physregs into vregs
46   SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
47                                bool IsVarArg,
48                                const SmallVectorImpl<ISD::InputArg> &Ins,
49                                const SDLoc &DL, SelectionDAG &DAG,
50                                SmallVectorImpl<SDValue> &InVals) const override;
51   SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
52                       const SmallVectorImpl<ISD::OutputArg> &Outs,
53                       const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
54                       SelectionDAG &DAG) const override;
55   bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
56                                          Type *Ty) const override {
57     return true;
58   }
59 };
60 }
61 
62 #endif
63