1 //===-- RISCVFrameLowering.cpp - RISCV Frame Information ------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the RISCV implementation of TargetFrameLowering class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "RISCVFrameLowering.h" 15 #include "RISCVMachineFunctionInfo.h" 16 #include "RISCVSubtarget.h" 17 #include "llvm/CodeGen/MachineFrameInfo.h" 18 #include "llvm/CodeGen/MachineFunction.h" 19 #include "llvm/CodeGen/MachineInstrBuilder.h" 20 #include "llvm/CodeGen/MachineRegisterInfo.h" 21 #include "llvm/CodeGen/RegisterScavenging.h" 22 23 using namespace llvm; 24 25 bool RISCVFrameLowering::hasFP(const MachineFunction &MF) const { 26 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); 27 28 const MachineFrameInfo &MFI = MF.getFrameInfo(); 29 return MF.getTarget().Options.DisableFramePointerElim(MF) || 30 RegInfo->needsStackRealignment(MF) || MFI.hasVarSizedObjects() || 31 MFI.isFrameAddressTaken(); 32 } 33 34 // Determines the size of the frame and maximum call frame size. 35 void RISCVFrameLowering::determineFrameLayout(MachineFunction &MF) const { 36 MachineFrameInfo &MFI = MF.getFrameInfo(); 37 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); 38 39 // Get the number of bytes to allocate from the FrameInfo. 40 uint64_t FrameSize = MFI.getStackSize(); 41 42 // Get the alignment. 43 uint64_t StackAlign = RI->needsStackRealignment(MF) ? MFI.getMaxAlignment() 44 : getStackAlignment(); 45 46 // Make sure the frame is aligned. 47 FrameSize = alignTo(FrameSize, StackAlign); 48 49 // Update frame info. 50 MFI.setStackSize(FrameSize); 51 } 52 53 void RISCVFrameLowering::adjustReg(MachineBasicBlock &MBB, 54 MachineBasicBlock::iterator MBBI, 55 const DebugLoc &DL, unsigned DestReg, 56 unsigned SrcReg, int64_t Val, 57 MachineInstr::MIFlag Flag) const { 58 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); 59 const RISCVInstrInfo *TII = STI.getInstrInfo(); 60 61 if (DestReg == SrcReg && Val == 0) 62 return; 63 64 if (isInt<12>(Val)) { 65 BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), DestReg) 66 .addReg(SrcReg) 67 .addImm(Val) 68 .setMIFlag(Flag); 69 } else if (isInt<32>(Val)) { 70 unsigned Opc = RISCV::ADD; 71 bool isSub = Val < 0; 72 if (isSub) { 73 Val = -Val; 74 Opc = RISCV::SUB; 75 } 76 77 unsigned ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); 78 TII->movImm32(MBB, MBBI, DL, ScratchReg, Val, Flag); 79 BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg) 80 .addReg(SrcReg) 81 .addReg(ScratchReg, RegState::Kill) 82 .setMIFlag(Flag); 83 } else { 84 report_fatal_error("adjustReg cannot yet handle adjustments >32 bits"); 85 } 86 } 87 88 // Returns the register used to hold the frame pointer. 89 static unsigned getFPReg(const RISCVSubtarget &STI) { return RISCV::X8; } 90 91 // Returns the register used to hold the stack pointer. 92 static unsigned getSPReg(const RISCVSubtarget &STI) { return RISCV::X2; } 93 94 void RISCVFrameLowering::emitPrologue(MachineFunction &MF, 95 MachineBasicBlock &MBB) const { 96 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported"); 97 98 MachineFrameInfo &MFI = MF.getFrameInfo(); 99 auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>(); 100 MachineBasicBlock::iterator MBBI = MBB.begin(); 101 102 unsigned FPReg = getFPReg(STI); 103 unsigned SPReg = getSPReg(STI); 104 105 // Debug location must be unknown since the first debug location is used 106 // to determine the end of the prologue. 107 DebugLoc DL; 108 109 // Determine the correct frame layout 110 determineFrameLayout(MF); 111 112 // FIXME (note copied from Lanai): This appears to be overallocating. Needs 113 // investigation. Get the number of bytes to allocate from the FrameInfo. 114 uint64_t StackSize = MFI.getStackSize(); 115 116 // Early exit if there is no need to allocate on the stack 117 if (StackSize == 0 && !MFI.adjustsStack()) 118 return; 119 120 // Allocate space on the stack if necessary. 121 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup); 122 123 // The frame pointer is callee-saved, and code has been generated for us to 124 // save it to the stack. We need to skip over the storing of callee-saved 125 // registers as the frame pointer must be modified after it has been saved 126 // to the stack, not before. 127 // FIXME: assumes exactly one instruction is used to save each callee-saved 128 // register. 129 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo(); 130 std::advance(MBBI, CSI.size()); 131 132 // Generate new FP. 133 if (hasFP(MF)) 134 adjustReg(MBB, MBBI, DL, FPReg, SPReg, 135 StackSize - RVFI->getVarArgsSaveSize(), MachineInstr::FrameSetup); 136 } 137 138 void RISCVFrameLowering::emitEpilogue(MachineFunction &MF, 139 MachineBasicBlock &MBB) const { 140 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); 141 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); 142 MachineFrameInfo &MFI = MF.getFrameInfo(); 143 auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>(); 144 DebugLoc DL = MBBI->getDebugLoc(); 145 unsigned FPReg = getFPReg(STI); 146 unsigned SPReg = getSPReg(STI); 147 148 // Skip to before the restores of callee-saved registers 149 // FIXME: assumes exactly one instruction is used to restore each 150 // callee-saved register. 151 MachineBasicBlock::iterator LastFrameDestroy = MBBI; 152 std::advance(LastFrameDestroy, -MFI.getCalleeSavedInfo().size()); 153 154 uint64_t StackSize = MFI.getStackSize(); 155 156 // Restore the stack pointer using the value of the frame pointer. Only 157 // necessary if the stack pointer was modified, meaning the stack size is 158 // unknown. 159 if (RI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) { 160 assert(hasFP(MF) && "frame pointer should not have been eliminated"); 161 adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, 162 -StackSize + RVFI->getVarArgsSaveSize(), 163 MachineInstr::FrameDestroy); 164 } 165 166 // Deallocate stack 167 adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy); 168 } 169 170 int RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, 171 int FI, 172 unsigned &FrameReg) const { 173 const MachineFrameInfo &MFI = MF.getFrameInfo(); 174 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); 175 const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>(); 176 177 // Callee-saved registers should be referenced relative to the stack 178 // pointer (positive offset), otherwise use the frame pointer (negative 179 // offset). 180 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo(); 181 int MinCSFI = 0; 182 int MaxCSFI = -1; 183 184 int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea() + 185 MFI.getOffsetAdjustment(); 186 187 if (CSI.size()) { 188 MinCSFI = CSI[0].getFrameIdx(); 189 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx(); 190 } 191 192 if (FI >= MinCSFI && FI <= MaxCSFI) { 193 FrameReg = RISCV::X2; 194 Offset += MF.getFrameInfo().getStackSize(); 195 } else { 196 FrameReg = RI->getFrameRegister(MF); 197 if (hasFP(MF)) 198 Offset += RVFI->getVarArgsSaveSize(); 199 else 200 Offset += MF.getFrameInfo().getStackSize(); 201 } 202 return Offset; 203 } 204 205 void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF, 206 BitVector &SavedRegs, 207 RegScavenger *RS) const { 208 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS); 209 // Unconditionally spill RA and FP only if the function uses a frame 210 // pointer. 211 if (hasFP(MF)) { 212 SavedRegs.set(RISCV::X1); 213 SavedRegs.set(RISCV::X8); 214 } 215 } 216 217 void RISCVFrameLowering::processFunctionBeforeFrameFinalized( 218 MachineFunction &MF, RegScavenger *RS) const { 219 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); 220 MachineFrameInfo &MFI = MF.getFrameInfo(); 221 const TargetRegisterClass *RC = &RISCV::GPRRegClass; 222 // estimateStackSize has been observed to under-estimate the final stack 223 // size, so give ourselves wiggle-room by checking for stack size 224 // representable an 11-bit signed field rather than 12-bits. 225 // FIXME: It may be possible to craft a function with a small stack that 226 // still needs an emergency spill slot for branch relaxation. This case 227 // would currently be missed. 228 if (!isInt<11>(MFI.estimateStackSize(MF))) { 229 int RegScavFI = MFI.CreateStackObject( 230 RegInfo->getSpillSize(*RC), RegInfo->getSpillAlignment(*RC), false); 231 RS->addScavengingFrameIndex(RegScavFI); 232 } 233 } 234 235 // Not preserve stack space within prologue for outgoing variables when the 236 // function contains variable size objects and let eliminateCallFramePseudoInstr 237 // preserve stack space for it. 238 bool RISCVFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { 239 return !MF.getFrameInfo().hasVarSizedObjects(); 240 } 241 242 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions. 243 MachineBasicBlock::iterator RISCVFrameLowering::eliminateCallFramePseudoInstr( 244 MachineFunction &MF, MachineBasicBlock &MBB, 245 MachineBasicBlock::iterator MI) const { 246 unsigned SPReg = RISCV::X2; 247 DebugLoc DL = MI->getDebugLoc(); 248 249 if (!hasReservedCallFrame(MF)) { 250 // If space has not been reserved for a call frame, ADJCALLSTACKDOWN and 251 // ADJCALLSTACKUP must be converted to instructions manipulating the stack 252 // pointer. This is necessary when there is a variable length stack 253 // allocation (e.g. alloca), which means it's not possible to allocate 254 // space for outgoing arguments from within the function prologue. 255 int64_t Amount = MI->getOperand(0).getImm(); 256 257 if (Amount != 0) { 258 // Ensure the stack remains aligned after adjustment. 259 Amount = alignSPAdjust(Amount); 260 261 if (MI->getOpcode() == RISCV::ADJCALLSTACKDOWN) 262 Amount = -Amount; 263 264 adjustReg(MBB, MI, DL, SPReg, SPReg, Amount, MachineInstr::NoFlags); 265 } 266 } 267 268 return MBB.erase(MI); 269 } 270