1 //===-- RISCVTargetStreamer.cpp - RISCV Target Streamer Methods -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides RISCV specific target streamer methods.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "RISCVTargetStreamer.h"
14 #include "RISCVSubtarget.h"
15 #include "llvm/Support/FormattedStream.h"
16 #include "llvm/Support/RISCVAttributes.h"
17 
18 using namespace llvm;
19 
20 RISCVTargetStreamer::RISCVTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
21 
22 void RISCVTargetStreamer::finish() { finishAttributeSection(); }
23 
24 void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) {
25   if (STI.hasFeature(RISCV::FeatureRV32E))
26     emitAttribute(RISCVAttrs::STACK_ALIGN, RISCVAttrs::ALIGN_4);
27   else
28     emitAttribute(RISCVAttrs::STACK_ALIGN, RISCVAttrs::ALIGN_16);
29 
30   std::string Arch = "rv32";
31   if (STI.hasFeature(RISCV::Feature64Bit))
32     Arch = "rv64";
33   if (STI.hasFeature(RISCV::FeatureRV32E))
34     Arch += "e1p9";
35   else
36     Arch += "i2p0";
37   if (STI.hasFeature(RISCV::FeatureStdExtM))
38     Arch += "_m2p0";
39   if (STI.hasFeature(RISCV::FeatureStdExtA))
40     Arch += "_a2p0";
41   if (STI.hasFeature(RISCV::FeatureStdExtF))
42     Arch += "_f2p0";
43   if (STI.hasFeature(RISCV::FeatureStdExtD))
44     Arch += "_d2p0";
45   if (STI.hasFeature(RISCV::FeatureStdExtC))
46     Arch += "_c2p0";
47 
48   emitTextAttribute(RISCVAttrs::ARCH, Arch);
49 }
50 
51 // This part is for ascii assembly output
52 RISCVTargetAsmStreamer::RISCVTargetAsmStreamer(MCStreamer &S,
53                                                formatted_raw_ostream &OS)
54     : RISCVTargetStreamer(S), OS(OS) {}
55 
56 void RISCVTargetAsmStreamer::emitDirectiveOptionPush() {
57   OS << "\t.option\tpush\n";
58 }
59 
60 void RISCVTargetAsmStreamer::emitDirectiveOptionPop() {
61   OS << "\t.option\tpop\n";
62 }
63 
64 void RISCVTargetAsmStreamer::emitDirectiveOptionRVC() {
65   OS << "\t.option\trvc\n";
66 }
67 
68 void RISCVTargetAsmStreamer::emitDirectiveOptionNoRVC() {
69   OS << "\t.option\tnorvc\n";
70 }
71 
72 void RISCVTargetAsmStreamer::emitDirectiveOptionRelax() {
73   OS << "\t.option\trelax\n";
74 }
75 
76 void RISCVTargetAsmStreamer::emitDirectiveOptionNoRelax() {
77   OS << "\t.option\tnorelax\n";
78 }
79 
80 void RISCVTargetAsmStreamer::emitAttribute(unsigned Attribute, unsigned Value) {
81   OS << "\t.attribute\t" << Attribute << ", " << Twine(Value) << "\n";
82 }
83 
84 void RISCVTargetAsmStreamer::emitTextAttribute(unsigned Attribute,
85                                                StringRef String) {
86   OS << "\t.attribute\t" << Attribute << ", \"" << String << "\"\n";
87 }
88 
89 void RISCVTargetAsmStreamer::emitIntTextAttribute(unsigned Attribute,
90                                                   unsigned IntValue,
91                                                   StringRef StringValue) {}
92 
93 void RISCVTargetAsmStreamer::finishAttributeSection() {}
94