1 //===-- RISCVMCTargetDesc.h - RISCV Target Descriptions ---------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides RISCV specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H 15 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H 16 17 #include "llvm/MC/MCTargetOptions.h" 18 #include "llvm/Support/DataTypes.h" 19 #include "llvm/Config/config.h" 20 21 namespace llvm { 22 class MCAsmBackend; 23 class MCCodeEmitter; 24 class MCContext; 25 class MCInstrInfo; 26 class MCObjectWriter; 27 class MCRegisterInfo; 28 class MCSubtargetInfo; 29 class StringRef; 30 class Target; 31 class Triple; 32 class raw_ostream; 33 class raw_pwrite_stream; 34 35 Target &getTheRISCV32Target(); 36 Target &getTheRISCV64Target(); 37 38 MCCodeEmitter *createRISCVMCCodeEmitter(const MCInstrInfo &MCII, 39 const MCRegisterInfo &MRI, 40 MCContext &Ctx); 41 42 MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCRegisterInfo &MRI, 43 const Triple &TT, StringRef CPU, 44 const MCTargetOptions &Options); 45 46 MCObjectWriter *createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, 47 bool Is64Bit); 48 } 49 50 // Defines symbolic names for RISC-V registers. 51 #define GET_REGINFO_ENUM 52 #include "RISCVGenRegisterInfo.inc" 53 54 // Defines symbolic names for RISC-V instructions. 55 #define GET_INSTRINFO_ENUM 56 #include "RISCVGenInstrInfo.inc" 57 58 #endif 59