1089b8ecfSHal Finkel //===--------------- PPCVSXFMAMutate.cpp - VSX FMA Mutation ---------------===//
2089b8ecfSHal Finkel //
3089b8ecfSHal Finkel //                     The LLVM Compiler Infrastructure
4089b8ecfSHal Finkel //
5089b8ecfSHal Finkel // This file is distributed under the University of Illinois Open Source
6089b8ecfSHal Finkel // License. See LICENSE.TXT for details.
7089b8ecfSHal Finkel //
8089b8ecfSHal Finkel //===----------------------------------------------------------------------===//
9089b8ecfSHal Finkel //
10089b8ecfSHal Finkel // This pass mutates the form of VSX FMA instructions to avoid unnecessary
11089b8ecfSHal Finkel // copies.
12089b8ecfSHal Finkel //
13089b8ecfSHal Finkel //===----------------------------------------------------------------------===//
14089b8ecfSHal Finkel 
15089b8ecfSHal Finkel #include "PPCInstrInfo.h"
16089b8ecfSHal Finkel #include "MCTargetDesc/PPCPredicates.h"
17089b8ecfSHal Finkel #include "PPC.h"
18089b8ecfSHal Finkel #include "PPCInstrBuilder.h"
19089b8ecfSHal Finkel #include "PPCMachineFunctionInfo.h"
20089b8ecfSHal Finkel #include "PPCTargetMachine.h"
21089b8ecfSHal Finkel #include "llvm/ADT/STLExtras.h"
22089b8ecfSHal Finkel #include "llvm/ADT/Statistic.h"
23089b8ecfSHal Finkel #include "llvm/CodeGen/LiveIntervalAnalysis.h"
24089b8ecfSHal Finkel #include "llvm/CodeGen/MachineFrameInfo.h"
25089b8ecfSHal Finkel #include "llvm/CodeGen/MachineFunctionPass.h"
26089b8ecfSHal Finkel #include "llvm/CodeGen/MachineInstrBuilder.h"
27089b8ecfSHal Finkel #include "llvm/CodeGen/MachineMemOperand.h"
28089b8ecfSHal Finkel #include "llvm/CodeGen/MachineRegisterInfo.h"
29089b8ecfSHal Finkel #include "llvm/CodeGen/PseudoSourceValue.h"
30089b8ecfSHal Finkel #include "llvm/CodeGen/ScheduleDAG.h"
31089b8ecfSHal Finkel #include "llvm/CodeGen/SlotIndexes.h"
32089b8ecfSHal Finkel #include "llvm/MC/MCAsmInfo.h"
33089b8ecfSHal Finkel #include "llvm/Support/CommandLine.h"
34089b8ecfSHal Finkel #include "llvm/Support/Debug.h"
35089b8ecfSHal Finkel #include "llvm/Support/ErrorHandling.h"
36089b8ecfSHal Finkel #include "llvm/Support/TargetRegistry.h"
37089b8ecfSHal Finkel #include "llvm/Support/raw_ostream.h"
38089b8ecfSHal Finkel 
39089b8ecfSHal Finkel using namespace llvm;
40089b8ecfSHal Finkel 
41089b8ecfSHal Finkel static cl::opt<bool> DisableVSXFMAMutate("disable-ppc-vsx-fma-mutation",
42089b8ecfSHal Finkel cl::desc("Disable VSX FMA instruction mutation"), cl::Hidden);
43089b8ecfSHal Finkel 
44089b8ecfSHal Finkel #define DEBUG_TYPE "ppc-vsx-fma-mutate"
45089b8ecfSHal Finkel 
46089b8ecfSHal Finkel namespace llvm { namespace PPC {
47089b8ecfSHal Finkel   int getAltVSXFMAOpcode(uint16_t Opcode);
48089b8ecfSHal Finkel } }
49089b8ecfSHal Finkel 
50089b8ecfSHal Finkel namespace {
51089b8ecfSHal Finkel   // PPCVSXFMAMutate pass - For copies between VSX registers and non-VSX registers
52089b8ecfSHal Finkel   // (Altivec and scalar floating-point registers), we need to transform the
53089b8ecfSHal Finkel   // copies into subregister copies with other restrictions.
54089b8ecfSHal Finkel   struct PPCVSXFMAMutate : public MachineFunctionPass {
55089b8ecfSHal Finkel     static char ID;
56089b8ecfSHal Finkel     PPCVSXFMAMutate() : MachineFunctionPass(ID) {
57089b8ecfSHal Finkel       initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
58089b8ecfSHal Finkel     }
59089b8ecfSHal Finkel 
60089b8ecfSHal Finkel     LiveIntervals *LIS;
61089b8ecfSHal Finkel     const PPCInstrInfo *TII;
62089b8ecfSHal Finkel 
63089b8ecfSHal Finkel protected:
64089b8ecfSHal Finkel     bool processBlock(MachineBasicBlock &MBB) {
65089b8ecfSHal Finkel       bool Changed = false;
66089b8ecfSHal Finkel 
67089b8ecfSHal Finkel       MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
68089b8ecfSHal Finkel       const TargetRegisterInfo *TRI = &TII->getRegisterInfo();
69089b8ecfSHal Finkel       for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
70089b8ecfSHal Finkel            I != IE; ++I) {
71089b8ecfSHal Finkel         MachineInstr *MI = I;
72089b8ecfSHal Finkel 
73089b8ecfSHal Finkel         // The default (A-type) VSX FMA form kills the addend (it is taken from
74089b8ecfSHal Finkel         // the target register, which is then updated to reflect the result of
75089b8ecfSHal Finkel         // the FMA). If the instruction, however, kills one of the registers
76089b8ecfSHal Finkel         // used for the product, then we can use the M-form instruction (which
77089b8ecfSHal Finkel         // will take that value from the to-be-defined register).
78089b8ecfSHal Finkel 
79089b8ecfSHal Finkel         int AltOpc = PPC::getAltVSXFMAOpcode(MI->getOpcode());
80089b8ecfSHal Finkel         if (AltOpc == -1)
81089b8ecfSHal Finkel           continue;
82089b8ecfSHal Finkel 
83089b8ecfSHal Finkel         // This pass is run after register coalescing, and so we're looking for
84089b8ecfSHal Finkel         // a situation like this:
85089b8ecfSHal Finkel         //   ...
86089b8ecfSHal Finkel         //   %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9
87089b8ecfSHal Finkel         //   %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16,
88089b8ecfSHal Finkel         //                         %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16
89089b8ecfSHal Finkel         //   ...
90089b8ecfSHal Finkel         //   %vreg9<def,tied1> = XSMADDADP %vreg9<tied0>, %vreg17, %vreg19,
91089b8ecfSHal Finkel         //                         %RM<imp-use>; VSLRC:%vreg9,%vreg17,%vreg19
92089b8ecfSHal Finkel         //   ...
93089b8ecfSHal Finkel         // Where we can eliminate the copy by changing from the A-type to the
94089b8ecfSHal Finkel         // M-type instruction. Specifically, for this example, this means:
95089b8ecfSHal Finkel         //   %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16,
96089b8ecfSHal Finkel         //                         %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16
97089b8ecfSHal Finkel         // is replaced by:
98089b8ecfSHal Finkel         //   %vreg16<def,tied1> = XSMADDMDP %vreg16<tied0>, %vreg18, %vreg9,
99089b8ecfSHal Finkel         //                         %RM<imp-use>; VSLRC:%vreg16,%vreg18,%vreg9
100089b8ecfSHal Finkel         // and we remove: %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9
101089b8ecfSHal Finkel 
102089b8ecfSHal Finkel         SlotIndex FMAIdx = LIS->getInstructionIndex(MI);
103089b8ecfSHal Finkel 
104089b8ecfSHal Finkel         VNInfo *AddendValNo =
105089b8ecfSHal Finkel           LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn();
106089b8ecfSHal Finkel         MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def);
107089b8ecfSHal Finkel 
108089b8ecfSHal Finkel         // The addend and this instruction must be in the same block.
109089b8ecfSHal Finkel 
110089b8ecfSHal Finkel         if (!AddendMI || AddendMI->getParent() != MI->getParent())
111089b8ecfSHal Finkel           continue;
112089b8ecfSHal Finkel 
113089b8ecfSHal Finkel         // The addend must be a full copy within the same register class.
114089b8ecfSHal Finkel 
115089b8ecfSHal Finkel         if (!AddendMI->isFullCopy())
116089b8ecfSHal Finkel           continue;
117089b8ecfSHal Finkel 
118089b8ecfSHal Finkel         unsigned AddendSrcReg = AddendMI->getOperand(1).getReg();
119089b8ecfSHal Finkel         if (TargetRegisterInfo::isVirtualRegister(AddendSrcReg)) {
120089b8ecfSHal Finkel           if (MRI.getRegClass(AddendMI->getOperand(0).getReg()) !=
121089b8ecfSHal Finkel               MRI.getRegClass(AddendSrcReg))
122089b8ecfSHal Finkel             continue;
123089b8ecfSHal Finkel         } else {
124089b8ecfSHal Finkel           // If AddendSrcReg is a physical register, make sure the destination
125089b8ecfSHal Finkel           // register class contains it.
126089b8ecfSHal Finkel           if (!MRI.getRegClass(AddendMI->getOperand(0).getReg())
127089b8ecfSHal Finkel                 ->contains(AddendSrcReg))
128089b8ecfSHal Finkel             continue;
129089b8ecfSHal Finkel         }
130089b8ecfSHal Finkel 
131089b8ecfSHal Finkel         // In theory, there could be other uses of the addend copy before this
132089b8ecfSHal Finkel         // fma.  We could deal with this, but that would require additional
133089b8ecfSHal Finkel         // logic below and I suspect it will not occur in any relevant
134089b8ecfSHal Finkel         // situations.  Additionally, check whether the copy source is killed
135089b8ecfSHal Finkel         // prior to the fma.  In order to replace the addend here with the
136089b8ecfSHal Finkel         // source of the copy, it must still be live here.  We can't use
137089b8ecfSHal Finkel         // interval testing for a physical register, so as long as we're
138089b8ecfSHal Finkel         // walking the MIs we may as well test liveness here.
139089b8ecfSHal Finkel         bool OtherUsers = false, KillsAddendSrc = false;
140089b8ecfSHal Finkel         for (auto J = std::prev(I), JE = MachineBasicBlock::iterator(AddendMI);
141089b8ecfSHal Finkel              J != JE; --J) {
142089b8ecfSHal Finkel           if (J->readsVirtualRegister(AddendMI->getOperand(0).getReg())) {
143089b8ecfSHal Finkel             OtherUsers = true;
144089b8ecfSHal Finkel             break;
145089b8ecfSHal Finkel           }
146089b8ecfSHal Finkel           if (J->modifiesRegister(AddendSrcReg, TRI) ||
147089b8ecfSHal Finkel               J->killsRegister(AddendSrcReg, TRI)) {
148089b8ecfSHal Finkel             KillsAddendSrc = true;
149089b8ecfSHal Finkel             break;
150089b8ecfSHal Finkel           }
151089b8ecfSHal Finkel         }
152089b8ecfSHal Finkel 
153089b8ecfSHal Finkel         if (OtherUsers || KillsAddendSrc)
154089b8ecfSHal Finkel           continue;
155089b8ecfSHal Finkel 
156089b8ecfSHal Finkel         // Find one of the product operands that is killed by this instruction.
157089b8ecfSHal Finkel 
158089b8ecfSHal Finkel         unsigned KilledProdOp = 0, OtherProdOp = 0;
159089b8ecfSHal Finkel         if (LIS->getInterval(MI->getOperand(2).getReg())
160089b8ecfSHal Finkel                      .Query(FMAIdx).isKill()) {
161089b8ecfSHal Finkel           KilledProdOp = 2;
162089b8ecfSHal Finkel           OtherProdOp  = 3;
163089b8ecfSHal Finkel         } else if (LIS->getInterval(MI->getOperand(3).getReg())
164089b8ecfSHal Finkel                      .Query(FMAIdx).isKill()) {
165089b8ecfSHal Finkel           KilledProdOp = 3;
166089b8ecfSHal Finkel           OtherProdOp  = 2;
167089b8ecfSHal Finkel         }
168089b8ecfSHal Finkel 
169089b8ecfSHal Finkel         // If there are no killed product operands, then this transformation is
170089b8ecfSHal Finkel         // likely not profitable.
171089b8ecfSHal Finkel         if (!KilledProdOp)
172089b8ecfSHal Finkel           continue;
173089b8ecfSHal Finkel 
174089b8ecfSHal Finkel         // For virtual registers, verify that the addend source register
175089b8ecfSHal Finkel         // is live here (as should have been assured above).
176089b8ecfSHal Finkel         assert((!TargetRegisterInfo::isVirtualRegister(AddendSrcReg) ||
177089b8ecfSHal Finkel                 LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) &&
178089b8ecfSHal Finkel                "Addend source register is not live!");
179089b8ecfSHal Finkel 
180089b8ecfSHal Finkel         // Transform: (O2 * O3) + O1 -> (O2 * O1) + O3.
181089b8ecfSHal Finkel 
182089b8ecfSHal Finkel         unsigned AddReg = AddendMI->getOperand(1).getReg();
183089b8ecfSHal Finkel         unsigned KilledProdReg = MI->getOperand(KilledProdOp).getReg();
184089b8ecfSHal Finkel         unsigned OtherProdReg  = MI->getOperand(OtherProdOp).getReg();
185089b8ecfSHal Finkel 
186089b8ecfSHal Finkel         unsigned AddSubReg = AddendMI->getOperand(1).getSubReg();
187089b8ecfSHal Finkel         unsigned KilledProdSubReg = MI->getOperand(KilledProdOp).getSubReg();
188089b8ecfSHal Finkel         unsigned OtherProdSubReg  = MI->getOperand(OtherProdOp).getSubReg();
189089b8ecfSHal Finkel 
190089b8ecfSHal Finkel         bool AddRegKill = AddendMI->getOperand(1).isKill();
191089b8ecfSHal Finkel         bool KilledProdRegKill = MI->getOperand(KilledProdOp).isKill();
192089b8ecfSHal Finkel         bool OtherProdRegKill  = MI->getOperand(OtherProdOp).isKill();
193089b8ecfSHal Finkel 
194089b8ecfSHal Finkel         bool AddRegUndef = AddendMI->getOperand(1).isUndef();
195089b8ecfSHal Finkel         bool KilledProdRegUndef = MI->getOperand(KilledProdOp).isUndef();
196089b8ecfSHal Finkel         bool OtherProdRegUndef  = MI->getOperand(OtherProdOp).isUndef();
197089b8ecfSHal Finkel 
198089b8ecfSHal Finkel         unsigned OldFMAReg = MI->getOperand(0).getReg();
199089b8ecfSHal Finkel 
200089b8ecfSHal Finkel         // The transformation doesn't work well with things like:
201089b8ecfSHal Finkel         //    %vreg5 = A-form-op %vreg5, %vreg11, %vreg5;
202089b8ecfSHal Finkel         // so leave such things alone.
203089b8ecfSHal Finkel         if (OldFMAReg == KilledProdReg)
204089b8ecfSHal Finkel           continue;
205089b8ecfSHal Finkel 
206089b8ecfSHal Finkel         assert(OldFMAReg == AddendMI->getOperand(0).getReg() &&
207089b8ecfSHal Finkel                "Addend copy not tied to old FMA output!");
208089b8ecfSHal Finkel 
209089b8ecfSHal Finkel         DEBUG(dbgs() << "VSX FMA Mutation:\n    " << *MI;);
210089b8ecfSHal Finkel 
211089b8ecfSHal Finkel         MI->getOperand(0).setReg(KilledProdReg);
212089b8ecfSHal Finkel         MI->getOperand(1).setReg(KilledProdReg);
213089b8ecfSHal Finkel         MI->getOperand(3).setReg(AddReg);
214089b8ecfSHal Finkel         MI->getOperand(2).setReg(OtherProdReg);
215089b8ecfSHal Finkel 
216089b8ecfSHal Finkel         MI->getOperand(0).setSubReg(KilledProdSubReg);
217089b8ecfSHal Finkel         MI->getOperand(1).setSubReg(KilledProdSubReg);
218089b8ecfSHal Finkel         MI->getOperand(3).setSubReg(AddSubReg);
219089b8ecfSHal Finkel         MI->getOperand(2).setSubReg(OtherProdSubReg);
220089b8ecfSHal Finkel 
221089b8ecfSHal Finkel         MI->getOperand(1).setIsKill(KilledProdRegKill);
222089b8ecfSHal Finkel         MI->getOperand(3).setIsKill(AddRegKill);
223089b8ecfSHal Finkel         MI->getOperand(2).setIsKill(OtherProdRegKill);
224089b8ecfSHal Finkel 
225089b8ecfSHal Finkel         MI->getOperand(1).setIsUndef(KilledProdRegUndef);
226089b8ecfSHal Finkel         MI->getOperand(3).setIsUndef(AddRegUndef);
227089b8ecfSHal Finkel         MI->getOperand(2).setIsUndef(OtherProdRegUndef);
228089b8ecfSHal Finkel 
229089b8ecfSHal Finkel         MI->setDesc(TII->get(AltOpc));
230089b8ecfSHal Finkel 
231089b8ecfSHal Finkel         DEBUG(dbgs() << " -> " << *MI);
232089b8ecfSHal Finkel 
233089b8ecfSHal Finkel         // The killed product operand was killed here, so we can reuse it now
234089b8ecfSHal Finkel         // for the result of the fma.
235089b8ecfSHal Finkel 
236089b8ecfSHal Finkel         LiveInterval &FMAInt = LIS->getInterval(OldFMAReg);
237089b8ecfSHal Finkel         VNInfo *FMAValNo = FMAInt.getVNInfoAt(FMAIdx.getRegSlot());
238089b8ecfSHal Finkel         for (auto UI = MRI.reg_nodbg_begin(OldFMAReg), UE = MRI.reg_nodbg_end();
239089b8ecfSHal Finkel              UI != UE;) {
240089b8ecfSHal Finkel           MachineOperand &UseMO = *UI;
241089b8ecfSHal Finkel           MachineInstr *UseMI = UseMO.getParent();
242089b8ecfSHal Finkel           ++UI;
243089b8ecfSHal Finkel 
244089b8ecfSHal Finkel           // Don't replace the result register of the copy we're about to erase.
245089b8ecfSHal Finkel           if (UseMI == AddendMI)
246089b8ecfSHal Finkel             continue;
247089b8ecfSHal Finkel 
248089b8ecfSHal Finkel           UseMO.setReg(KilledProdReg);
249089b8ecfSHal Finkel           UseMO.setSubReg(KilledProdSubReg);
250089b8ecfSHal Finkel         }
251089b8ecfSHal Finkel 
252089b8ecfSHal Finkel         // Extend the live intervals of the killed product operand to hold the
253089b8ecfSHal Finkel         // fma result.
254089b8ecfSHal Finkel 
255089b8ecfSHal Finkel         LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg);
256089b8ecfSHal Finkel         for (LiveInterval::iterator AI = FMAInt.begin(), AE = FMAInt.end();
257089b8ecfSHal Finkel              AI != AE; ++AI) {
258089b8ecfSHal Finkel           // Don't add the segment that corresponds to the original copy.
259089b8ecfSHal Finkel           if (AI->valno == AddendValNo)
260089b8ecfSHal Finkel             continue;
261089b8ecfSHal Finkel 
262089b8ecfSHal Finkel           VNInfo *NewFMAValNo =
263089b8ecfSHal Finkel             NewFMAInt.getNextValue(AI->start,
264089b8ecfSHal Finkel                                    LIS->getVNInfoAllocator());
265089b8ecfSHal Finkel 
266089b8ecfSHal Finkel           NewFMAInt.addSegment(LiveInterval::Segment(AI->start, AI->end,
267089b8ecfSHal Finkel                                                      NewFMAValNo));
268089b8ecfSHal Finkel         }
269089b8ecfSHal Finkel         DEBUG(dbgs() << "  extended: " << NewFMAInt << '\n');
270089b8ecfSHal Finkel 
271089b8ecfSHal Finkel         FMAInt.removeValNo(FMAValNo);
272089b8ecfSHal Finkel         DEBUG(dbgs() << "  trimmed:  " << FMAInt << '\n');
273089b8ecfSHal Finkel 
274089b8ecfSHal Finkel         // Remove the (now unused) copy.
275089b8ecfSHal Finkel 
276089b8ecfSHal Finkel         DEBUG(dbgs() << "  removing: " << *AddendMI << '\n');
277089b8ecfSHal Finkel         LIS->RemoveMachineInstrFromMaps(AddendMI);
278089b8ecfSHal Finkel         AddendMI->eraseFromParent();
279089b8ecfSHal Finkel 
280089b8ecfSHal Finkel         Changed = true;
281089b8ecfSHal Finkel       }
282089b8ecfSHal Finkel 
283089b8ecfSHal Finkel       return Changed;
284089b8ecfSHal Finkel     }
285089b8ecfSHal Finkel 
286089b8ecfSHal Finkel public:
287089b8ecfSHal Finkel     bool runOnMachineFunction(MachineFunction &MF) override {
288089b8ecfSHal Finkel       // If we don't have VSX then go ahead and return without doing
289089b8ecfSHal Finkel       // anything.
290089b8ecfSHal Finkel       const PPCSubtarget &STI = MF.getSubtarget<PPCSubtarget>();
291089b8ecfSHal Finkel       if (!STI.hasVSX())
292089b8ecfSHal Finkel         return false;
293089b8ecfSHal Finkel 
294089b8ecfSHal Finkel       LIS = &getAnalysis<LiveIntervals>();
295089b8ecfSHal Finkel 
296089b8ecfSHal Finkel       TII = STI.getInstrInfo();
297089b8ecfSHal Finkel 
298089b8ecfSHal Finkel       bool Changed = false;
299089b8ecfSHal Finkel 
300089b8ecfSHal Finkel       if (DisableVSXFMAMutate)
301089b8ecfSHal Finkel         return Changed;
302089b8ecfSHal Finkel 
303089b8ecfSHal Finkel       for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
304089b8ecfSHal Finkel         MachineBasicBlock &B = *I++;
305089b8ecfSHal Finkel         if (processBlock(B))
306089b8ecfSHal Finkel           Changed = true;
307089b8ecfSHal Finkel       }
308089b8ecfSHal Finkel 
309089b8ecfSHal Finkel       return Changed;
310089b8ecfSHal Finkel     }
311089b8ecfSHal Finkel 
312089b8ecfSHal Finkel     void getAnalysisUsage(AnalysisUsage &AU) const override {
313089b8ecfSHal Finkel       AU.addRequired<LiveIntervals>();
314089b8ecfSHal Finkel       AU.addPreserved<LiveIntervals>();
315089b8ecfSHal Finkel       AU.addRequired<SlotIndexes>();
316089b8ecfSHal Finkel       AU.addPreserved<SlotIndexes>();
317089b8ecfSHal Finkel       MachineFunctionPass::getAnalysisUsage(AU);
318089b8ecfSHal Finkel     }
319089b8ecfSHal Finkel   };
320*f00654e3SAlexander Kornienko }
321089b8ecfSHal Finkel 
322089b8ecfSHal Finkel INITIALIZE_PASS_BEGIN(PPCVSXFMAMutate, DEBUG_TYPE,
323089b8ecfSHal Finkel                       "PowerPC VSX FMA Mutation", false, false)
324089b8ecfSHal Finkel INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
325089b8ecfSHal Finkel INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
326089b8ecfSHal Finkel INITIALIZE_PASS_END(PPCVSXFMAMutate, DEBUG_TYPE,
327089b8ecfSHal Finkel                     "PowerPC VSX FMA Mutation", false, false)
328089b8ecfSHal Finkel 
329089b8ecfSHal Finkel char &llvm::PPCVSXFMAMutateID = PPCVSXFMAMutate::ID;
330089b8ecfSHal Finkel 
331089b8ecfSHal Finkel char PPCVSXFMAMutate::ID = 0;
332089b8ecfSHal Finkel FunctionPass*
333089b8ecfSHal Finkel llvm::createPPCVSXFMAMutatePass() { return new PPCVSXFMAMutate(); }
334089b8ecfSHal Finkel 
335089b8ecfSHal Finkel 
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