1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the PowerPC specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef PPC_TARGETMACHINE_H 15 #define PPC_TARGETMACHINE_H 16 17 #include "PPCInstrInfo.h" 18 #include "PPCSubtarget.h" 19 #include "llvm/IR/DataLayout.h" 20 #include "llvm/Target/TargetMachine.h" 21 22 namespace llvm { 23 24 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets. 25 /// 26 class PPCTargetMachine : public LLVMTargetMachine { 27 PPCSubtarget Subtarget; 28 29 public: 30 PPCTargetMachine(const Target &T, StringRef TT, 31 StringRef CPU, StringRef FS, const TargetOptions &Options, 32 Reloc::Model RM, CodeModel::Model CM, 33 CodeGenOpt::Level OL); 34 35 const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; } 36 37 // Pass Pipeline Configuration 38 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 39 bool addCodeEmitter(PassManagerBase &PM, 40 JITCodeEmitter &JCE) override; 41 42 /// \brief Register PPC analysis passes with a pass manager. 43 void addAnalysisPasses(PassManagerBase &PM) override; 44 }; 45 46 /// PPC32TargetMachine - PowerPC 32-bit target machine. 47 /// 48 class PPC32TargetMachine : public PPCTargetMachine { 49 virtual void anchor(); 50 public: 51 PPC32TargetMachine(const Target &T, StringRef TT, 52 StringRef CPU, StringRef FS, const TargetOptions &Options, 53 Reloc::Model RM, CodeModel::Model CM, 54 CodeGenOpt::Level OL); 55 }; 56 57 /// PPC64TargetMachine - PowerPC 64-bit target machine. 58 /// 59 class PPC64TargetMachine : public PPCTargetMachine { 60 virtual void anchor(); 61 public: 62 PPC64TargetMachine(const Target &T, StringRef TT, 63 StringRef CPU, StringRef FS, const TargetOptions &Options, 64 Reloc::Model RM, CodeModel::Model CM, 65 CodeGenOpt::Level OL); 66 }; 67 68 } // end namespace llvm 69 70 #endif 71