1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
15 #define LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
16 
17 #include "PPCFrameLowering.h"
18 #include "PPCInstrInfo.h"
19 #include "PPCISelLowering.h"
20 #include "PPCSelectionDAGInfo.h"
21 #include "llvm/ADT/Triple.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/MC/MCInstrItineraries.h"
24 #include "llvm/Target/TargetSubtargetInfo.h"
25 #include <string>
26 
27 #define GET_SUBTARGETINFO_HEADER
28 #include "PPCGenSubtargetInfo.inc"
29 
30 // GCC #defines PPC on Linux but we use it as our namespace name
31 #undef PPC
32 
33 namespace llvm {
34 class StringRef;
35 
36 namespace PPC {
37   // -m directive values.
38   enum {
39     DIR_NONE,
40     DIR_32,
41     DIR_440,
42     DIR_601,
43     DIR_602,
44     DIR_603,
45     DIR_7400,
46     DIR_750,
47     DIR_970,
48     DIR_A2,
49     DIR_E500mc,
50     DIR_E5500,
51     DIR_PWR3,
52     DIR_PWR4,
53     DIR_PWR5,
54     DIR_PWR5X,
55     DIR_PWR6,
56     DIR_PWR6X,
57     DIR_PWR7,
58     DIR_PWR8,
59     DIR_64
60   };
61 }
62 
63 class GlobalValue;
64 class TargetMachine;
65 
66 class PPCSubtarget : public PPCGenSubtargetInfo {
67 protected:
68   /// TargetTriple - What processor and OS we're targeting.
69   Triple TargetTriple;
70 
71   // Calculates type size & alignment
72   const DataLayout DL;
73 
74   /// stackAlignment - The minimum alignment known to hold of the stack frame on
75   /// entry to the function and which must be maintained by every function.
76   unsigned StackAlignment;
77 
78   /// Selected instruction itineraries (one entry per itinerary class.)
79   InstrItineraryData InstrItins;
80 
81   /// Which cpu directive was used.
82   unsigned DarwinDirective;
83 
84   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
85   bool HasMFOCRF;
86   bool Has64BitSupport;
87   bool Use64BitRegs;
88   bool UseCRBits;
89   bool IsPPC64;
90   bool HasAltivec;
91   bool HasSPE;
92   bool HasQPX;
93   bool HasVSX;
94   bool HasFCPSGN;
95   bool HasFSQRT;
96   bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
97   bool HasRecipPrec;
98   bool HasSTFIWX;
99   bool HasLFIWAX;
100   bool HasFPRND;
101   bool HasFPCVT;
102   bool HasISEL;
103   bool HasPOPCNTD;
104   bool HasLDBRX;
105   bool IsBookE;
106   bool IsE500;
107   bool IsPPC4xx;
108   bool IsPPC6xx;
109   bool DeprecatedMFTB;
110   bool DeprecatedDST;
111   bool HasLazyResolverStubs;
112   bool IsLittleEndian;
113 
114   enum {
115     PPC_ABI_UNKNOWN,
116     PPC_ABI_ELFv1,
117     PPC_ABI_ELFv2
118   } TargetABI;
119 
120   PPCFrameLowering FrameLowering;
121   PPCInstrInfo InstrInfo;
122   PPCTargetLowering TLInfo;
123   PPCSelectionDAGInfo TSInfo;
124 
125 public:
126   /// This constructor initializes the data members to match that
127   /// of the specified triple.
128   ///
129   PPCSubtarget(const std::string &TT, const std::string &CPU,
130                const std::string &FS, const PPCTargetMachine &TM);
131 
132   /// ParseSubtargetFeatures - Parses features string setting specified
133   /// subtarget options.  Definition of function is auto generated by tblgen.
134   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
135 
136   /// getStackAlignment - Returns the minimum alignment known to hold of the
137   /// stack frame on entry to the function and which must be maintained by every
138   /// function for this subtarget.
139   unsigned getStackAlignment() const { return StackAlignment; }
140 
141   /// getDarwinDirective - Returns the -m directive specified for the cpu.
142   ///
143   unsigned getDarwinDirective() const { return DarwinDirective; }
144 
145   /// getInstrItins - Return the instruction itineraries based on subtarget
146   /// selection.
147   const InstrItineraryData *getInstrItineraryData() const override {
148     return &InstrItins;
149   }
150 
151   const PPCFrameLowering *getFrameLowering() const override {
152     return &FrameLowering;
153   }
154   const DataLayout *getDataLayout() const override { return &DL; }
155   const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
156   const PPCTargetLowering *getTargetLowering() const override {
157     return &TLInfo;
158   }
159   const PPCSelectionDAGInfo *getSelectionDAGInfo() const override {
160     return &TSInfo;
161   }
162   const PPCRegisterInfo *getRegisterInfo() const override {
163     return &getInstrInfo()->getRegisterInfo();
164   }
165 
166   /// initializeSubtargetDependencies - Initializes using a CPU and feature string
167   /// so that we can use initializer lists for subtarget initialization.
168   PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
169 
170 private:
171   void initializeEnvironment();
172   void initSubtargetFeatures(StringRef CPU, StringRef FS);
173 
174 public:
175   /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
176   ///
177   bool isPPC64() const { return IsPPC64; }
178 
179   /// has64BitSupport - Return true if the selected CPU supports 64-bit
180   /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
181   bool has64BitSupport() const { return Has64BitSupport; }
182 
183   /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
184   /// registers in 32-bit mode when possible.  This can only true if
185   /// has64BitSupport() returns true.
186   bool use64BitRegs() const { return Use64BitRegs; }
187 
188   /// useCRBits - Return true if we should store and manipulate i1 values in
189   /// the individual condition register bits.
190   bool useCRBits() const { return UseCRBits; }
191 
192   /// hasLazyResolverStub - Return true if accesses to the specified global have
193   /// to go through a dyld lazy resolution stub.  This means that an extra load
194   /// is required to get the address of the global.
195   bool hasLazyResolverStub(const GlobalValue *GV,
196                            const TargetMachine &TM) const;
197 
198   // isLittleEndian - True if generating little-endian code
199   bool isLittleEndian() const { return IsLittleEndian; }
200 
201   // Specific obvious features.
202   bool hasFCPSGN() const { return HasFCPSGN; }
203   bool hasFSQRT() const { return HasFSQRT; }
204   bool hasFRE() const { return HasFRE; }
205   bool hasFRES() const { return HasFRES; }
206   bool hasFRSQRTE() const { return HasFRSQRTE; }
207   bool hasFRSQRTES() const { return HasFRSQRTES; }
208   bool hasRecipPrec() const { return HasRecipPrec; }
209   bool hasSTFIWX() const { return HasSTFIWX; }
210   bool hasLFIWAX() const { return HasLFIWAX; }
211   bool hasFPRND() const { return HasFPRND; }
212   bool hasFPCVT() const { return HasFPCVT; }
213   bool hasAltivec() const { return HasAltivec; }
214   bool hasSPE() const { return HasSPE; }
215   bool hasQPX() const { return HasQPX; }
216   bool hasVSX() const { return HasVSX; }
217   bool hasMFOCRF() const { return HasMFOCRF; }
218   bool hasISEL() const { return HasISEL; }
219   bool hasPOPCNTD() const { return HasPOPCNTD; }
220   bool hasLDBRX() const { return HasLDBRX; }
221   bool isBookE() const { return IsBookE; }
222   bool isPPC4xx() const { return IsPPC4xx; }
223   bool isPPC6xx() const { return IsPPC6xx; }
224   bool isE500() const { return IsE500; }
225   bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
226   bool isDeprecatedDST() const { return DeprecatedDST; }
227 
228   const Triple &getTargetTriple() const { return TargetTriple; }
229 
230   /// isDarwin - True if this is any darwin platform.
231   bool isDarwin() const { return TargetTriple.isMacOSX(); }
232   /// isBGQ - True if this is a BG/Q platform.
233   bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
234 
235   bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
236   bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
237 
238   bool isDarwinABI() const { return isDarwin(); }
239   bool isSVR4ABI() const { return !isDarwin(); }
240   bool isELFv2ABI() const { return TargetABI == PPC_ABI_ELFv2; }
241 
242   bool enableEarlyIfConversion() const override { return hasISEL(); }
243 
244   // Scheduling customization.
245   bool enableMachineScheduler() const override;
246   // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
247   bool enablePostMachineScheduler() const override;
248   AntiDepBreakMode getAntiDepBreakMode() const override;
249   void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
250 
251   void overrideSchedPolicy(MachineSchedPolicy &Policy,
252                            MachineInstr *begin,
253                            MachineInstr *end,
254                            unsigned NumRegionInstrs) const override;
255   bool useAA() const override;
256 };
257 } // End llvm namespace
258 
259 #endif
260