1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
15 #define LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
16 
17 #include "PPCFrameLowering.h"
18 #include "PPCISelLowering.h"
19 #include "PPCInstrInfo.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/IR/DataLayout.h"
22 #include "llvm/MC/MCInstrItineraries.h"
23 #include "llvm/Target/TargetSelectionDAGInfo.h"
24 #include "llvm/Target/TargetSubtargetInfo.h"
25 #include <string>
26 
27 #define GET_SUBTARGETINFO_HEADER
28 #include "PPCGenSubtargetInfo.inc"
29 
30 // GCC #defines PPC on Linux but we use it as our namespace name
31 #undef PPC
32 
33 namespace llvm {
34 class StringRef;
35 
36 namespace PPC {
37   // -m directive values.
38   enum {
39     DIR_NONE,
40     DIR_32,
41     DIR_440,
42     DIR_601,
43     DIR_602,
44     DIR_603,
45     DIR_7400,
46     DIR_750,
47     DIR_970,
48     DIR_A2,
49     DIR_E500mc,
50     DIR_E5500,
51     DIR_PWR3,
52     DIR_PWR4,
53     DIR_PWR5,
54     DIR_PWR5X,
55     DIR_PWR6,
56     DIR_PWR6X,
57     DIR_PWR7,
58     DIR_PWR8,
59     DIR_64
60   };
61 }
62 
63 class GlobalValue;
64 class TargetMachine;
65 
66 class PPCSubtarget : public PPCGenSubtargetInfo {
67 protected:
68   /// TargetTriple - What processor and OS we're targeting.
69   Triple TargetTriple;
70 
71   /// stackAlignment - The minimum alignment known to hold of the stack frame on
72   /// entry to the function and which must be maintained by every function.
73   unsigned StackAlignment;
74 
75   /// Selected instruction itineraries (one entry per itinerary class.)
76   InstrItineraryData InstrItins;
77 
78   /// Which cpu directive was used.
79   unsigned DarwinDirective;
80 
81   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
82   bool HasMFOCRF;
83   bool Has64BitSupport;
84   bool Use64BitRegs;
85   bool UseCRBits;
86   bool IsPPC64;
87   bool HasAltivec;
88   bool HasSPE;
89   bool HasQPX;
90   bool HasVSX;
91   bool HasP8Vector;
92   bool HasP8Altivec;
93   bool HasP8Crypto;
94   bool HasFCPSGN;
95   bool HasFSQRT;
96   bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
97   bool HasRecipPrec;
98   bool HasSTFIWX;
99   bool HasLFIWAX;
100   bool HasFPRND;
101   bool HasFPCVT;
102   bool HasISEL;
103   bool HasPOPCNTD;
104   bool HasBPERMD;
105   bool HasExtDiv;
106   bool HasCMPB;
107   bool HasLDBRX;
108   bool IsBookE;
109   bool HasOnlyMSYNC;
110   bool IsE500;
111   bool IsPPC4xx;
112   bool IsPPC6xx;
113   bool FeatureMFTB;
114   bool DeprecatedDST;
115   bool HasLazyResolverStubs;
116   bool IsLittleEndian;
117   bool HasICBT;
118   bool HasInvariantFunctionDescriptors;
119   bool HasPartwordAtomics;
120   bool HasDirectMove;
121   bool HasHTM;
122   bool HasFusion;
123 
124   /// When targeting QPX running a stock PPC64 Linux kernel where the stack
125   /// alignment has not been changed, we need to keep the 16-byte alignment
126   /// of the stack.
127   bool IsQPXStackUnaligned;
128 
129   const PPCTargetMachine &TM;
130   PPCFrameLowering FrameLowering;
131   PPCInstrInfo InstrInfo;
132   PPCTargetLowering TLInfo;
133   TargetSelectionDAGInfo TSInfo;
134 
135 public:
136   /// This constructor initializes the data members to match that
137   /// of the specified triple.
138   ///
139   PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
140                const PPCTargetMachine &TM);
141 
142   /// ParseSubtargetFeatures - Parses features string setting specified
143   /// subtarget options.  Definition of function is auto generated by tblgen.
144   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
145 
146   /// getStackAlignment - Returns the minimum alignment known to hold of the
147   /// stack frame on entry to the function and which must be maintained by every
148   /// function for this subtarget.
149   unsigned getStackAlignment() const { return StackAlignment; }
150 
151   /// getDarwinDirective - Returns the -m directive specified for the cpu.
152   ///
153   unsigned getDarwinDirective() const { return DarwinDirective; }
154 
155   /// getInstrItins - Return the instruction itineraries based on subtarget
156   /// selection.
157   const InstrItineraryData *getInstrItineraryData() const override {
158     return &InstrItins;
159   }
160 
161   const PPCFrameLowering *getFrameLowering() const override {
162     return &FrameLowering;
163   }
164   const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
165   const PPCTargetLowering *getTargetLowering() const override {
166     return &TLInfo;
167   }
168   const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
169     return &TSInfo;
170   }
171   const PPCRegisterInfo *getRegisterInfo() const override {
172     return &getInstrInfo()->getRegisterInfo();
173   }
174   const PPCTargetMachine &getTargetMachine() const { return TM; }
175 
176   /// initializeSubtargetDependencies - Initializes using a CPU and feature string
177   /// so that we can use initializer lists for subtarget initialization.
178   PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
179 
180 private:
181   void initializeEnvironment();
182   void initSubtargetFeatures(StringRef CPU, StringRef FS);
183 
184 public:
185   /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
186   ///
187   bool isPPC64() const;
188 
189   /// has64BitSupport - Return true if the selected CPU supports 64-bit
190   /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
191   bool has64BitSupport() const { return Has64BitSupport; }
192 
193   /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
194   /// registers in 32-bit mode when possible.  This can only true if
195   /// has64BitSupport() returns true.
196   bool use64BitRegs() const { return Use64BitRegs; }
197 
198   /// useCRBits - Return true if we should store and manipulate i1 values in
199   /// the individual condition register bits.
200   bool useCRBits() const { return UseCRBits; }
201 
202   /// hasLazyResolverStub - Return true if accesses to the specified global have
203   /// to go through a dyld lazy resolution stub.  This means that an extra load
204   /// is required to get the address of the global.
205   bool hasLazyResolverStub(const GlobalValue *GV) const;
206 
207   // isLittleEndian - True if generating little-endian code
208   bool isLittleEndian() const { return IsLittleEndian; }
209 
210   // Specific obvious features.
211   bool hasFCPSGN() const { return HasFCPSGN; }
212   bool hasFSQRT() const { return HasFSQRT; }
213   bool hasFRE() const { return HasFRE; }
214   bool hasFRES() const { return HasFRES; }
215   bool hasFRSQRTE() const { return HasFRSQRTE; }
216   bool hasFRSQRTES() const { return HasFRSQRTES; }
217   bool hasRecipPrec() const { return HasRecipPrec; }
218   bool hasSTFIWX() const { return HasSTFIWX; }
219   bool hasLFIWAX() const { return HasLFIWAX; }
220   bool hasFPRND() const { return HasFPRND; }
221   bool hasFPCVT() const { return HasFPCVT; }
222   bool hasAltivec() const { return HasAltivec; }
223   bool hasSPE() const { return HasSPE; }
224   bool hasQPX() const { return HasQPX; }
225   bool hasVSX() const { return HasVSX; }
226   bool hasP8Vector() const { return HasP8Vector; }
227   bool hasP8Altivec() const { return HasP8Altivec; }
228   bool hasP8Crypto() const { return HasP8Crypto; }
229   bool hasMFOCRF() const { return HasMFOCRF; }
230   bool hasISEL() const { return HasISEL; }
231   bool hasPOPCNTD() const { return HasPOPCNTD; }
232   bool hasBPERMD() const { return HasBPERMD; }
233   bool hasExtDiv() const { return HasExtDiv; }
234   bool hasCMPB() const { return HasCMPB; }
235   bool hasLDBRX() const { return HasLDBRX; }
236   bool isBookE() const { return IsBookE; }
237   bool hasOnlyMSYNC() const { return HasOnlyMSYNC; }
238   bool isPPC4xx() const { return IsPPC4xx; }
239   bool isPPC6xx() const { return IsPPC6xx; }
240   bool isE500() const { return IsE500; }
241   bool isFeatureMFTB() const { return FeatureMFTB; }
242   bool isDeprecatedDST() const { return DeprecatedDST; }
243   bool hasICBT() const { return HasICBT; }
244   bool hasInvariantFunctionDescriptors() const {
245     return HasInvariantFunctionDescriptors;
246   }
247   bool hasPartwordAtomics() const { return HasPartwordAtomics; }
248   bool hasDirectMove() const { return HasDirectMove; }
249 
250   bool isQPXStackUnaligned() const { return IsQPXStackUnaligned; }
251   unsigned getPlatformStackAlignment() const {
252     if ((hasQPX() || isBGQ()) && !isQPXStackUnaligned())
253       return 32;
254 
255     return 16;
256   }
257   bool hasHTM() const { return HasHTM; }
258   bool hasFusion() const { return HasFusion; }
259 
260   const Triple &getTargetTriple() const { return TargetTriple; }
261 
262   /// isDarwin - True if this is any darwin platform.
263   bool isDarwin() const { return TargetTriple.isMacOSX(); }
264   /// isBGQ - True if this is a BG/Q platform.
265   bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
266 
267   bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
268   bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
269 
270   bool isDarwinABI() const { return isTargetMachO() || isDarwin(); }
271   bool isSVR4ABI() const { return !isDarwinABI(); }
272   bool isELFv2ABI() const;
273 
274   bool enableEarlyIfConversion() const override { return hasISEL(); }
275 
276   // Scheduling customization.
277   bool enableMachineScheduler() const override;
278   // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
279   bool enablePostRAScheduler() const override;
280   AntiDepBreakMode getAntiDepBreakMode() const override;
281   void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
282 
283   void overrideSchedPolicy(MachineSchedPolicy &Policy,
284                            MachineInstr *begin,
285                            MachineInstr *end,
286                            unsigned NumRegionInstrs) const override;
287   bool useAA() const override;
288 
289   bool enableSubRegLiveness() const override;
290 
291   /// classifyGlobalReference - Classify a global variable reference for the
292   /// current subtarget accourding to how we should reference it.
293   unsigned char classifyGlobalReference(const GlobalValue *GV) const;
294 };
295 } // End llvm namespace
296 
297 #endif
298