1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
15 #define LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
16 
17 #include "PPCFrameLowering.h"
18 #include "PPCInstrInfo.h"
19 #include "PPCISelLowering.h"
20 #include "PPCSelectionDAGInfo.h"
21 #include "llvm/ADT/Triple.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/MC/MCInstrItineraries.h"
24 #include "llvm/Target/TargetSubtargetInfo.h"
25 #include <string>
26 
27 #define GET_SUBTARGETINFO_HEADER
28 #include "PPCGenSubtargetInfo.inc"
29 
30 // GCC #defines PPC on Linux but we use it as our namespace name
31 #undef PPC
32 
33 namespace llvm {
34 class StringRef;
35 
36 namespace PPC {
37   // -m directive values.
38   enum {
39     DIR_NONE,
40     DIR_32,
41     DIR_440,
42     DIR_601,
43     DIR_602,
44     DIR_603,
45     DIR_7400,
46     DIR_750,
47     DIR_970,
48     DIR_A2,
49     DIR_E500mc,
50     DIR_E5500,
51     DIR_PWR3,
52     DIR_PWR4,
53     DIR_PWR5,
54     DIR_PWR5X,
55     DIR_PWR6,
56     DIR_PWR6X,
57     DIR_PWR7,
58     DIR_PWR8,
59     DIR_64
60   };
61 }
62 
63 class GlobalValue;
64 class TargetMachine;
65 
66 class PPCSubtarget : public PPCGenSubtargetInfo {
67 protected:
68   /// TargetTriple - What processor and OS we're targeting.
69   Triple TargetTriple;
70 
71   // Calculates type size & alignment
72   const DataLayout DL;
73 
74   /// stackAlignment - The minimum alignment known to hold of the stack frame on
75   /// entry to the function and which must be maintained by every function.
76   unsigned StackAlignment;
77 
78   /// Selected instruction itineraries (one entry per itinerary class.)
79   InstrItineraryData InstrItins;
80 
81   /// Which cpu directive was used.
82   unsigned DarwinDirective;
83 
84   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
85   bool HasMFOCRF;
86   bool Has64BitSupport;
87   bool Use64BitRegs;
88   bool UseCRBits;
89   bool IsPPC64;
90   bool HasAltivec;
91   bool HasSPE;
92   bool HasQPX;
93   bool HasVSX;
94   bool HasP8Vector;
95   bool HasFCPSGN;
96   bool HasFSQRT;
97   bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
98   bool HasRecipPrec;
99   bool HasSTFIWX;
100   bool HasLFIWAX;
101   bool HasFPRND;
102   bool HasFPCVT;
103   bool HasISEL;
104   bool HasPOPCNTD;
105   bool HasLDBRX;
106   bool IsBookE;
107   bool HasOnlyMSYNC;
108   bool IsE500;
109   bool IsPPC4xx;
110   bool IsPPC6xx;
111   bool DeprecatedMFTB;
112   bool DeprecatedDST;
113   bool HasLazyResolverStubs;
114   bool IsLittleEndian;
115 
116   enum {
117     PPC_ABI_UNKNOWN,
118     PPC_ABI_ELFv1,
119     PPC_ABI_ELFv2
120   } TargetABI;
121 
122   PPCFrameLowering FrameLowering;
123   PPCInstrInfo InstrInfo;
124   PPCTargetLowering TLInfo;
125   PPCSelectionDAGInfo TSInfo;
126 
127 public:
128   /// This constructor initializes the data members to match that
129   /// of the specified triple.
130   ///
131   PPCSubtarget(const std::string &TT, const std::string &CPU,
132                const std::string &FS, const PPCTargetMachine &TM);
133 
134   /// ParseSubtargetFeatures - Parses features string setting specified
135   /// subtarget options.  Definition of function is auto generated by tblgen.
136   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
137 
138   /// getStackAlignment - Returns the minimum alignment known to hold of the
139   /// stack frame on entry to the function and which must be maintained by every
140   /// function for this subtarget.
141   unsigned getStackAlignment() const { return StackAlignment; }
142 
143   /// getDarwinDirective - Returns the -m directive specified for the cpu.
144   ///
145   unsigned getDarwinDirective() const { return DarwinDirective; }
146 
147   /// getInstrItins - Return the instruction itineraries based on subtarget
148   /// selection.
149   const InstrItineraryData *getInstrItineraryData() const override {
150     return &InstrItins;
151   }
152 
153   const PPCFrameLowering *getFrameLowering() const override {
154     return &FrameLowering;
155   }
156   const DataLayout *getDataLayout() const override { return &DL; }
157   const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
158   const PPCTargetLowering *getTargetLowering() const override {
159     return &TLInfo;
160   }
161   const PPCSelectionDAGInfo *getSelectionDAGInfo() const override {
162     return &TSInfo;
163   }
164   const PPCRegisterInfo *getRegisterInfo() const override {
165     return &getInstrInfo()->getRegisterInfo();
166   }
167 
168   /// initializeSubtargetDependencies - Initializes using a CPU and feature string
169   /// so that we can use initializer lists for subtarget initialization.
170   PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
171 
172 private:
173   void initializeEnvironment();
174   void initSubtargetFeatures(StringRef CPU, StringRef FS);
175 
176 public:
177   /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
178   ///
179   bool isPPC64() const { return IsPPC64; }
180 
181   /// has64BitSupport - Return true if the selected CPU supports 64-bit
182   /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
183   bool has64BitSupport() const { return Has64BitSupport; }
184 
185   /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
186   /// registers in 32-bit mode when possible.  This can only true if
187   /// has64BitSupport() returns true.
188   bool use64BitRegs() const { return Use64BitRegs; }
189 
190   /// useCRBits - Return true if we should store and manipulate i1 values in
191   /// the individual condition register bits.
192   bool useCRBits() const { return UseCRBits; }
193 
194   /// hasLazyResolverStub - Return true if accesses to the specified global have
195   /// to go through a dyld lazy resolution stub.  This means that an extra load
196   /// is required to get the address of the global.
197   bool hasLazyResolverStub(const GlobalValue *GV,
198                            const TargetMachine &TM) const;
199 
200   // isLittleEndian - True if generating little-endian code
201   bool isLittleEndian() const { return IsLittleEndian; }
202 
203   // Specific obvious features.
204   bool hasFCPSGN() const { return HasFCPSGN; }
205   bool hasFSQRT() const { return HasFSQRT; }
206   bool hasFRE() const { return HasFRE; }
207   bool hasFRES() const { return HasFRES; }
208   bool hasFRSQRTE() const { return HasFRSQRTE; }
209   bool hasFRSQRTES() const { return HasFRSQRTES; }
210   bool hasRecipPrec() const { return HasRecipPrec; }
211   bool hasSTFIWX() const { return HasSTFIWX; }
212   bool hasLFIWAX() const { return HasLFIWAX; }
213   bool hasFPRND() const { return HasFPRND; }
214   bool hasFPCVT() const { return HasFPCVT; }
215   bool hasAltivec() const { return HasAltivec; }
216   bool hasSPE() const { return HasSPE; }
217   bool hasQPX() const { return HasQPX; }
218   bool hasVSX() const { return HasVSX; }
219   bool hasP8Vector() const { return HasP8Vector; }
220   bool hasMFOCRF() const { return HasMFOCRF; }
221   bool hasISEL() const { return HasISEL; }
222   bool hasPOPCNTD() const { return HasPOPCNTD; }
223   bool hasLDBRX() const { return HasLDBRX; }
224   bool isBookE() const { return IsBookE; }
225   bool hasOnlyMSYNC() const { return HasOnlyMSYNC; }
226   bool isPPC4xx() const { return IsPPC4xx; }
227   bool isPPC6xx() const { return IsPPC6xx; }
228   bool isE500() const { return IsE500; }
229   bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
230   bool isDeprecatedDST() const { return DeprecatedDST; }
231 
232   const Triple &getTargetTriple() const { return TargetTriple; }
233 
234   /// isDarwin - True if this is any darwin platform.
235   bool isDarwin() const { return TargetTriple.isMacOSX(); }
236   /// isBGQ - True if this is a BG/Q platform.
237   bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
238 
239   bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
240   bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
241 
242   bool isDarwinABI() const { return isDarwin(); }
243   bool isSVR4ABI() const { return !isDarwin(); }
244   bool isELFv2ABI() const { return TargetABI == PPC_ABI_ELFv2; }
245 
246   bool enableEarlyIfConversion() const override { return hasISEL(); }
247 
248   // Scheduling customization.
249   bool enableMachineScheduler() const override;
250   // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
251   bool enablePostMachineScheduler() const override;
252   AntiDepBreakMode getAntiDepBreakMode() const override;
253   void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
254 
255   void overrideSchedPolicy(MachineSchedPolicy &Policy,
256                            MachineInstr *begin,
257                            MachineInstr *end,
258                            unsigned NumRegionInstrs) const override;
259   bool useAA() const override;
260 };
261 } // End llvm namespace
262 
263 #endif
264