1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
15 #define LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
16 
17 #include "PPCFrameLowering.h"
18 #include "PPCISelLowering.h"
19 #include "PPCInstrInfo.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/MC/MCInstrItineraries.h"
24 #include "llvm/Target/TargetSubtargetInfo.h"
25 #include <string>
26 
27 #define GET_SUBTARGETINFO_HEADER
28 #include "PPCGenSubtargetInfo.inc"
29 
30 // GCC #defines PPC on Linux but we use it as our namespace name
31 #undef PPC
32 
33 namespace llvm {
34 class StringRef;
35 
36 namespace PPC {
37   // -m directive values.
38   enum {
39     DIR_NONE,
40     DIR_32,
41     DIR_440,
42     DIR_601,
43     DIR_602,
44     DIR_603,
45     DIR_7400,
46     DIR_750,
47     DIR_970,
48     DIR_A2,
49     DIR_E500mc,
50     DIR_E5500,
51     DIR_PWR3,
52     DIR_PWR4,
53     DIR_PWR5,
54     DIR_PWR5X,
55     DIR_PWR6,
56     DIR_PWR6X,
57     DIR_PWR7,
58     DIR_PWR8,
59     DIR_PWR9,
60     DIR_64
61   };
62 }
63 
64 class GlobalValue;
65 class TargetMachine;
66 
67 class PPCSubtarget : public PPCGenSubtargetInfo {
68 public:
69   enum POPCNTDKind {
70     POPCNTD_Unavailable,
71     POPCNTD_Slow,
72     POPCNTD_Fast
73   };
74 
75 protected:
76   /// TargetTriple - What processor and OS we're targeting.
77   Triple TargetTriple;
78 
79   /// stackAlignment - The minimum alignment known to hold of the stack frame on
80   /// entry to the function and which must be maintained by every function.
81   unsigned StackAlignment;
82 
83   /// Selected instruction itineraries (one entry per itinerary class.)
84   InstrItineraryData InstrItins;
85 
86   /// Which cpu directive was used.
87   unsigned DarwinDirective;
88 
89   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
90   bool HasMFOCRF;
91   bool Has64BitSupport;
92   bool Use64BitRegs;
93   bool UseCRBits;
94   bool HasHardFloat;
95   bool IsPPC64;
96   bool HasAltivec;
97   bool HasSPE;
98   bool HasQPX;
99   bool HasVSX;
100   bool HasP8Vector;
101   bool HasP8Altivec;
102   bool HasP8Crypto;
103   bool HasP9Vector;
104   bool HasP9Altivec;
105   bool HasFCPSGN;
106   bool HasFSQRT;
107   bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
108   bool HasRecipPrec;
109   bool HasSTFIWX;
110   bool HasLFIWAX;
111   bool HasFPRND;
112   bool HasFPCVT;
113   bool HasISEL;
114   bool HasBPERMD;
115   bool HasExtDiv;
116   bool HasCMPB;
117   bool HasLDBRX;
118   bool IsBookE;
119   bool HasOnlyMSYNC;
120   bool IsE500;
121   bool IsPPC4xx;
122   bool IsPPC6xx;
123   bool FeatureMFTB;
124   bool DeprecatedDST;
125   bool HasLazyResolverStubs;
126   bool IsLittleEndian;
127   bool HasICBT;
128   bool HasInvariantFunctionDescriptors;
129   bool HasPartwordAtomics;
130   bool HasDirectMove;
131   bool HasHTM;
132   bool HasFusion;
133   bool HasFloat128;
134   bool IsISA3_0;
135   bool UseLongCalls;
136 
137   POPCNTDKind HasPOPCNTD;
138 
139   /// When targeting QPX running a stock PPC64 Linux kernel where the stack
140   /// alignment has not been changed, we need to keep the 16-byte alignment
141   /// of the stack.
142   bool IsQPXStackUnaligned;
143 
144   const PPCTargetMachine &TM;
145   PPCFrameLowering FrameLowering;
146   PPCInstrInfo InstrInfo;
147   PPCTargetLowering TLInfo;
148   SelectionDAGTargetInfo TSInfo;
149 
150 public:
151   /// This constructor initializes the data members to match that
152   /// of the specified triple.
153   ///
154   PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
155                const PPCTargetMachine &TM);
156 
157   /// ParseSubtargetFeatures - Parses features string setting specified
158   /// subtarget options.  Definition of function is auto generated by tblgen.
159   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
160 
161   /// getStackAlignment - Returns the minimum alignment known to hold of the
162   /// stack frame on entry to the function and which must be maintained by every
163   /// function for this subtarget.
164   unsigned getStackAlignment() const { return StackAlignment; }
165 
166   /// getDarwinDirective - Returns the -m directive specified for the cpu.
167   ///
168   unsigned getDarwinDirective() const { return DarwinDirective; }
169 
170   /// getInstrItins - Return the instruction itineraries based on subtarget
171   /// selection.
172   const InstrItineraryData *getInstrItineraryData() const override {
173     return &InstrItins;
174   }
175 
176   const PPCFrameLowering *getFrameLowering() const override {
177     return &FrameLowering;
178   }
179   const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
180   const PPCTargetLowering *getTargetLowering() const override {
181     return &TLInfo;
182   }
183   const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
184     return &TSInfo;
185   }
186   const PPCRegisterInfo *getRegisterInfo() const override {
187     return &getInstrInfo()->getRegisterInfo();
188   }
189   const PPCTargetMachine &getTargetMachine() const { return TM; }
190 
191   /// initializeSubtargetDependencies - Initializes using a CPU and feature string
192   /// so that we can use initializer lists for subtarget initialization.
193   PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
194 
195 private:
196   void initializeEnvironment();
197   void initSubtargetFeatures(StringRef CPU, StringRef FS);
198 
199 public:
200   /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
201   ///
202   bool isPPC64() const;
203 
204   /// has64BitSupport - Return true if the selected CPU supports 64-bit
205   /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
206   bool has64BitSupport() const { return Has64BitSupport; }
207   // useSoftFloat - Return true if soft-float option is turned on.
208   bool useSoftFloat() const { return !HasHardFloat; }
209 
210   /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
211   /// registers in 32-bit mode when possible.  This can only true if
212   /// has64BitSupport() returns true.
213   bool use64BitRegs() const { return Use64BitRegs; }
214 
215   /// useCRBits - Return true if we should store and manipulate i1 values in
216   /// the individual condition register bits.
217   bool useCRBits() const { return UseCRBits; }
218 
219   /// hasLazyResolverStub - Return true if accesses to the specified global have
220   /// to go through a dyld lazy resolution stub.  This means that an extra load
221   /// is required to get the address of the global.
222   bool hasLazyResolverStub(const GlobalValue *GV) const;
223 
224   // isLittleEndian - True if generating little-endian code
225   bool isLittleEndian() const { return IsLittleEndian; }
226 
227   // Specific obvious features.
228   bool hasFCPSGN() const { return HasFCPSGN; }
229   bool hasFSQRT() const { return HasFSQRT; }
230   bool hasFRE() const { return HasFRE; }
231   bool hasFRES() const { return HasFRES; }
232   bool hasFRSQRTE() const { return HasFRSQRTE; }
233   bool hasFRSQRTES() const { return HasFRSQRTES; }
234   bool hasRecipPrec() const { return HasRecipPrec; }
235   bool hasSTFIWX() const { return HasSTFIWX; }
236   bool hasLFIWAX() const { return HasLFIWAX; }
237   bool hasFPRND() const { return HasFPRND; }
238   bool hasFPCVT() const { return HasFPCVT; }
239   bool hasAltivec() const { return HasAltivec; }
240   bool hasSPE() const { return HasSPE; }
241   bool hasQPX() const { return HasQPX; }
242   bool hasVSX() const { return HasVSX; }
243   bool hasP8Vector() const { return HasP8Vector; }
244   bool hasP8Altivec() const { return HasP8Altivec; }
245   bool hasP8Crypto() const { return HasP8Crypto; }
246   bool hasP9Vector() const { return HasP9Vector; }
247   bool hasP9Altivec() const { return HasP9Altivec; }
248   bool hasMFOCRF() const { return HasMFOCRF; }
249   bool hasISEL() const { return HasISEL; }
250   bool hasBPERMD() const { return HasBPERMD; }
251   bool hasExtDiv() const { return HasExtDiv; }
252   bool hasCMPB() const { return HasCMPB; }
253   bool hasLDBRX() const { return HasLDBRX; }
254   bool isBookE() const { return IsBookE; }
255   bool hasOnlyMSYNC() const { return HasOnlyMSYNC; }
256   bool isPPC4xx() const { return IsPPC4xx; }
257   bool isPPC6xx() const { return IsPPC6xx; }
258   bool isE500() const { return IsE500; }
259   bool isFeatureMFTB() const { return FeatureMFTB; }
260   bool isDeprecatedDST() const { return DeprecatedDST; }
261   bool hasICBT() const { return HasICBT; }
262   bool hasInvariantFunctionDescriptors() const {
263     return HasInvariantFunctionDescriptors;
264   }
265   bool hasPartwordAtomics() const { return HasPartwordAtomics; }
266   bool hasDirectMove() const { return HasDirectMove; }
267 
268   bool isQPXStackUnaligned() const { return IsQPXStackUnaligned; }
269   unsigned getPlatformStackAlignment() const {
270     if ((hasQPX() || isBGQ()) && !isQPXStackUnaligned())
271       return 32;
272 
273     return 16;
274   }
275   bool hasHTM() const { return HasHTM; }
276   bool hasFusion() const { return HasFusion; }
277   bool hasFloat128() const { return HasFloat128; }
278   bool isISA3_0() const { return IsISA3_0; }
279   bool useLongCalls() const { return UseLongCalls; }
280   bool needsSwapsForVSXMemOps() const {
281     return hasVSX() && isLittleEndian() && !hasP9Vector();
282   }
283 
284   POPCNTDKind hasPOPCNTD() const { return HasPOPCNTD; }
285 
286   const Triple &getTargetTriple() const { return TargetTriple; }
287 
288   /// isDarwin - True if this is any darwin platform.
289   bool isDarwin() const { return TargetTriple.isMacOSX(); }
290   /// isBGQ - True if this is a BG/Q platform.
291   bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
292 
293   bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
294   bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
295   bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
296 
297   bool isDarwinABI() const { return isTargetMachO() || isDarwin(); }
298   bool isSVR4ABI() const { return !isDarwinABI(); }
299   bool isELFv2ABI() const;
300 
301   bool enableEarlyIfConversion() const override { return hasISEL(); }
302 
303   // Scheduling customization.
304   bool enableMachineScheduler() const override;
305   // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
306   bool enablePostRAScheduler() const override;
307   AntiDepBreakMode getAntiDepBreakMode() const override;
308   void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
309 
310   void overrideSchedPolicy(MachineSchedPolicy &Policy,
311                            unsigned NumRegionInstrs) const override;
312   bool useAA() const override;
313 
314   bool enableSubRegLiveness() const override;
315 
316   /// classifyGlobalReference - Classify a global variable reference for the
317   /// current subtarget accourding to how we should reference it.
318   unsigned char classifyGlobalReference(const GlobalValue *GV) const;
319 };
320 } // End llvm namespace
321 
322 #endif
323