1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the PPC specific subclass of TargetSubtargetInfo. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "PPCSubtarget.h" 15 #include "PPC.h" 16 #include "PPCRegisterInfo.h" 17 #include "llvm/CodeGen/MachineFunction.h" 18 #include "llvm/IR/Attributes.h" 19 #include "llvm/IR/GlobalValue.h" 20 #include "llvm/IR/Function.h" 21 #include "llvm/Support/Host.h" 22 #include "llvm/Support/TargetRegistry.h" 23 #include "llvm/Target/TargetMachine.h" 24 #include <cstdlib> 25 26 #define GET_SUBTARGETINFO_TARGET_DESC 27 #define GET_SUBTARGETINFO_CTOR 28 #include "PPCGenSubtargetInfo.inc" 29 30 using namespace llvm; 31 32 PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU, 33 const std::string &FS, bool is64Bit) 34 : PPCGenSubtargetInfo(TT, CPU, FS) 35 , IsPPC64(is64Bit) 36 , TargetTriple(TT) { 37 initializeEnvironment(); 38 resetSubtargetFeatures(CPU, FS); 39 } 40 41 /// SetJITMode - This is called to inform the subtarget info that we are 42 /// producing code for the JIT. 43 void PPCSubtarget::SetJITMode() { 44 // JIT mode doesn't want lazy resolver stubs, it knows exactly where 45 // everything is. This matters for PPC64, which codegens in PIC mode without 46 // stubs. 47 HasLazyResolverStubs = false; 48 49 // Calls to external functions need to use indirect calls 50 IsJITCodeModel = true; 51 } 52 53 void PPCSubtarget::resetSubtargetFeatures(const MachineFunction *MF) { 54 AttributeSet FnAttrs = MF->getFunction()->getAttributes(); 55 Attribute CPUAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex, 56 "target-cpu"); 57 Attribute FSAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex, 58 "target-features"); 59 std::string CPU = 60 !CPUAttr.hasAttribute(Attribute::None) ? CPUAttr.getValueAsString() : ""; 61 std::string FS = 62 !FSAttr.hasAttribute(Attribute::None) ? FSAttr.getValueAsString() : ""; 63 if (!FS.empty()) { 64 initializeEnvironment(); 65 resetSubtargetFeatures(CPU, FS); 66 } 67 } 68 69 void PPCSubtarget::initializeEnvironment() { 70 StackAlignment = 16; 71 DarwinDirective = PPC::DIR_NONE; 72 HasMFOCRF = false; 73 Has64BitSupport = false; 74 Use64BitRegs = false; 75 HasAltivec = false; 76 HasQPX = false; 77 HasFCPSGN = false; 78 HasFSQRT = false; 79 HasFRE = false; 80 HasFRES = false; 81 HasFRSQRTE = false; 82 HasFRSQRTES = false; 83 HasRecipPrec = false; 84 HasSTFIWX = false; 85 HasLFIWAX = false; 86 HasFPRND = false; 87 HasFPCVT = false; 88 HasISEL = false; 89 HasPOPCNTD = false; 90 HasLDBRX = false; 91 IsBookE = false; 92 HasLazyResolverStubs = false; 93 IsJITCodeModel = false; 94 } 95 96 void PPCSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) { 97 // Determine default and user specified characteristics 98 std::string CPUName = CPU; 99 if (CPUName.empty()) 100 CPUName = "generic"; 101 #if (defined(__APPLE__) || defined(__linux__)) && \ 102 (defined(__ppc__) || defined(__powerpc__)) 103 if (CPUName == "generic") 104 CPUName = sys::getHostCPUName(); 105 #endif 106 107 // Initialize scheduling itinerary for the specified CPU. 108 InstrItins = getInstrItineraryForCPU(CPUName); 109 110 // Make sure 64-bit features are available when CPUname is generic 111 std::string FullFS = FS; 112 113 // If we are generating code for ppc64, verify that options make sense. 114 if (IsPPC64) { 115 Has64BitSupport = true; 116 // Silently force 64-bit register use on ppc64. 117 Use64BitRegs = true; 118 if (!FullFS.empty()) 119 FullFS = "+64bit," + FullFS; 120 else 121 FullFS = "+64bit"; 122 } 123 124 // Parse features string. 125 ParseSubtargetFeatures(CPUName, FullFS); 126 127 // If the user requested use of 64-bit regs, but the cpu selected doesn't 128 // support it, ignore. 129 if (use64BitRegs() && !has64BitSupport()) 130 Use64BitRegs = false; 131 132 // Set up darwin-specific properties. 133 if (isDarwin()) 134 HasLazyResolverStubs = true; 135 136 // QPX requires a 32-byte aligned stack. Note that we need to do this if 137 // we're compiling for a BG/Q system regardless of whether or not QPX 138 // is enabled because external functions will assume this alignment. 139 if (hasQPX() || isBGQ()) 140 StackAlignment = 32; 141 142 // Determine endianness. 143 IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le); 144 } 145 146 /// hasLazyResolverStub - Return true if accesses to the specified global have 147 /// to go through a dyld lazy resolution stub. This means that an extra load 148 /// is required to get the address of the global. 149 bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV, 150 const TargetMachine &TM) const { 151 // We never have stubs if HasLazyResolverStubs=false or if in static mode. 152 if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static) 153 return false; 154 // If symbol visibility is hidden, the extra load is not needed if 155 // the symbol is definitely defined in the current translation unit. 156 bool isDecl = GV->isDeclaration() && !GV->isMaterializable(); 157 if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage()) 158 return false; 159 return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() || 160 GV->hasCommonLinkage() || isDecl; 161 } 162 163 bool PPCSubtarget::enablePostRAScheduler( 164 CodeGenOpt::Level OptLevel, 165 TargetSubtargetInfo::AntiDepBreakMode& Mode, 166 RegClassVector& CriticalPathRCs) const { 167 // FIXME: It would be best to use TargetSubtargetInfo::ANTIDEP_ALL here, 168 // but we can't because we can't reassign the cr registers. There is a 169 // dependence between the cr register and the RLWINM instruction used 170 // to extract its value which the anti-dependency breaker can't currently 171 // see. Maybe we should make a late-expanded pseudo to encode this dependency. 172 // (the relevant code is in PPCDAGToDAGISel::SelectSETCC) 173 174 Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL; 175 176 CriticalPathRCs.clear(); 177 178 if (isPPC64()) 179 CriticalPathRCs.push_back(&PPC::G8RCRegClass); 180 else 181 CriticalPathRCs.push_back(&PPC::GPRCRegClass); 182 183 CriticalPathRCs.push_back(&PPC::F8RCRegClass); 184 CriticalPathRCs.push_back(&PPC::VRRCRegClass); 185 186 return OptLevel >= CodeGenOpt::Default; 187 } 188 189