1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the PPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "PPCSubtarget.h"
15 #include "PPC.h"
16 #include "PPCRegisterInfo.h"
17 #include "PPCTargetMachine.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineScheduler.h"
20 #include "llvm/IR/Attributes.h"
21 #include "llvm/IR/Function.h"
22 #include "llvm/IR/GlobalValue.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/TargetRegistry.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include <cstdlib>
27 
28 using namespace llvm;
29 
30 #define DEBUG_TYPE "ppc-subtarget"
31 
32 #define GET_SUBTARGETINFO_TARGET_DESC
33 #define GET_SUBTARGETINFO_CTOR
34 #include "PPCGenSubtargetInfo.inc"
35 
36 static cl::opt<bool> UseSubRegLiveness("ppc-track-subreg-liveness",
37 cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden);
38 
39 static cl::opt<bool> QPXStackUnaligned("qpx-stack-unaligned",
40   cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"),
41   cl::Hidden);
42 
43 PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
44                                                             StringRef FS) {
45   initializeEnvironment();
46   initSubtargetFeatures(CPU, FS);
47   return *this;
48 }
49 
50 PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
51                            const std::string &FS, const PPCTargetMachine &TM)
52     : PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT),
53       IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
54               TargetTriple.getArch() == Triple::ppc64le),
55       TM(TM), FrameLowering(initializeSubtargetDependencies(CPU, FS)),
56       InstrInfo(*this), TLInfo(TM, *this) {}
57 
58 void PPCSubtarget::initializeEnvironment() {
59   StackAlignment = 16;
60   DarwinDirective = PPC::DIR_NONE;
61   HasMFOCRF = false;
62   Has64BitSupport = false;
63   Use64BitRegs = false;
64   UseCRBits = false;
65   HasAltivec = false;
66   HasSPE = false;
67   HasQPX = false;
68   HasVSX = false;
69   HasP8Vector = false;
70   HasP8Altivec = false;
71   HasP8Crypto = false;
72   HasFCPSGN = false;
73   HasFSQRT = false;
74   HasFRE = false;
75   HasFRES = false;
76   HasFRSQRTE = false;
77   HasFRSQRTES = false;
78   HasRecipPrec = false;
79   HasSTFIWX = false;
80   HasLFIWAX = false;
81   HasFPRND = false;
82   HasFPCVT = false;
83   HasISEL = false;
84   HasPOPCNTD = false;
85   HasBPERMD = false;
86   HasExtDiv = false;
87   HasCMPB = false;
88   HasLDBRX = false;
89   IsBookE = false;
90   HasOnlyMSYNC = false;
91   IsPPC4xx = false;
92   IsPPC6xx = false;
93   IsE500 = false;
94   FeatureMFTB = false;
95   DeprecatedDST = false;
96   HasLazyResolverStubs = false;
97   HasICBT = false;
98   HasInvariantFunctionDescriptors = false;
99   HasPartwordAtomics = false;
100   HasDirectMove = false;
101   IsQPXStackUnaligned = false;
102   HasHTM = false;
103   HasFusion = false;
104 }
105 
106 void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
107   // Determine default and user specified characteristics
108   std::string CPUName = CPU;
109   if (CPUName.empty()) {
110     // If cross-compiling with -march=ppc64le without -mcpu
111     if (TargetTriple.getArch() == Triple::ppc64le)
112       CPUName = "ppc64le";
113     else
114       CPUName = "generic";
115   }
116 
117   // Initialize scheduling itinerary for the specified CPU.
118   InstrItins = getInstrItineraryForCPU(CPUName);
119 
120   // Parse features string.
121   ParseSubtargetFeatures(CPUName, FS);
122 
123   // If the user requested use of 64-bit regs, but the cpu selected doesn't
124   // support it, ignore.
125   if (IsPPC64 && has64BitSupport())
126     Use64BitRegs = true;
127 
128   // Set up darwin-specific properties.
129   if (isDarwin())
130     HasLazyResolverStubs = true;
131 
132   // QPX requires a 32-byte aligned stack. Note that we need to do this if
133   // we're compiling for a BG/Q system regardless of whether or not QPX
134   // is enabled because external functions will assume this alignment.
135   IsQPXStackUnaligned = QPXStackUnaligned;
136   StackAlignment = getPlatformStackAlignment();
137 
138   // Determine endianness.
139   // FIXME: Part of the TargetMachine.
140   IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
141 }
142 
143 /// hasLazyResolverStub - Return true if accesses to the specified global have
144 /// to go through a dyld lazy resolution stub.  This means that an extra load
145 /// is required to get the address of the global.
146 bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV) const {
147   // We never have stubs if HasLazyResolverStubs=false or if in static mode.
148   if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
149     return false;
150   bool isDecl = GV->isDeclaration();
151   if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
152     return false;
153   return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
154          GV->hasCommonLinkage() || isDecl;
155 }
156 
157 // Embedded cores need aggressive scheduling (and some others also benefit).
158 static bool needsAggressiveScheduling(unsigned Directive) {
159   switch (Directive) {
160   default: return false;
161   case PPC::DIR_440:
162   case PPC::DIR_A2:
163   case PPC::DIR_E500mc:
164   case PPC::DIR_E5500:
165   case PPC::DIR_PWR7:
166   case PPC::DIR_PWR8:
167     return true;
168   }
169 }
170 
171 bool PPCSubtarget::enableMachineScheduler() const {
172   // Enable MI scheduling for the embedded cores.
173   // FIXME: Enable this for all cores (some additional modeling
174   // may be necessary).
175   return needsAggressiveScheduling(DarwinDirective);
176 }
177 
178 // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
179 bool PPCSubtarget::enablePostRAScheduler() const { return true; }
180 
181 PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const {
182   return TargetSubtargetInfo::ANTIDEP_ALL;
183 }
184 
185 void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
186   CriticalPathRCs.clear();
187   CriticalPathRCs.push_back(isPPC64() ?
188                             &PPC::G8RCRegClass : &PPC::GPRCRegClass);
189 }
190 
191 void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
192                                        MachineInstr *begin,
193                                        MachineInstr *end,
194                                        unsigned NumRegionInstrs) const {
195   if (needsAggressiveScheduling(DarwinDirective)) {
196     Policy.OnlyTopDown = false;
197     Policy.OnlyBottomUp = false;
198   }
199 
200   // Spilling is generally expensive on all PPC cores, so always enable
201   // register-pressure tracking.
202   Policy.ShouldTrackPressure = true;
203 }
204 
205 bool PPCSubtarget::useAA() const {
206   // Use AA during code generation for the embedded cores.
207   return needsAggressiveScheduling(DarwinDirective);
208 }
209 
210 bool PPCSubtarget::enableSubRegLiveness() const {
211   return UseSubRegLiveness;
212 }
213 
214 unsigned char PPCSubtarget::classifyGlobalReference(
215     const GlobalValue *GV) const {
216   // Note that currently we don't generate non-pic references.
217   // If a caller wants that, this will have to be updated.
218 
219   // Large code model always uses the TOC even for local symbols.
220   if (TM.getCodeModel() == CodeModel::Large)
221     return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
222 
223   unsigned char flags = PPCII::MO_PIC_FLAG;
224 
225   // Only if the relocation mode is PIC do we have to worry about
226   // interposition. In all other cases we can use a slightly looser standard to
227   // decide how to access the symbol.
228   if (TM.getRelocationModel() == Reloc::PIC_) {
229     // If it's local, or it's non-default, it can't be interposed.
230     if (!GV->hasLocalLinkage() &&
231         GV->hasDefaultVisibility()) {
232       flags |= PPCII::MO_NLP_FLAG;
233     }
234     return flags;
235   }
236 
237   if (GV->isStrongDefinitionForLinker())
238     return flags;
239   return flags | PPCII::MO_NLP_FLAG;
240 }
241 
242 bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
243 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
244