1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the PPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "PPCSubtarget.h"
15 #include "PPC.h"
16 #include "PPCRegisterInfo.h"
17 #include "PPCTargetMachine.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineScheduler.h"
20 #include "llvm/IR/Attributes.h"
21 #include "llvm/IR/Function.h"
22 #include "llvm/IR/GlobalValue.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/TargetRegistry.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include <cstdlib>
27 
28 using namespace llvm;
29 
30 #define DEBUG_TYPE "ppc-subtarget"
31 
32 #define GET_SUBTARGETINFO_TARGET_DESC
33 #define GET_SUBTARGETINFO_CTOR
34 #include "PPCGenSubtargetInfo.inc"
35 
36 static cl::opt<bool> UseSubRegLiveness("ppc-track-subreg-liveness",
37 cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden);
38 
39 static cl::opt<bool> QPXStackUnaligned("qpx-stack-unaligned",
40   cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"),
41   cl::Hidden);
42 
43 PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
44                                                             StringRef FS) {
45   initializeEnvironment();
46   initSubtargetFeatures(CPU, FS);
47   return *this;
48 }
49 
50 PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
51                            const std::string &FS, const PPCTargetMachine &TM)
52     : PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT),
53       IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
54               TargetTriple.getArch() == Triple::ppc64le),
55       TM(TM), FrameLowering(initializeSubtargetDependencies(CPU, FS)),
56       InstrInfo(*this), TLInfo(TM, *this) {}
57 
58 void PPCSubtarget::initializeEnvironment() {
59   StackAlignment = 16;
60   DarwinDirective = PPC::DIR_NONE;
61   HasMFOCRF = false;
62   Has64BitSupport = false;
63   Use64BitRegs = false;
64   UseCRBits = false;
65   HasHardFloat = false;
66   HasAltivec = false;
67   HasSPE = false;
68   HasQPX = false;
69   HasVSX = false;
70   HasP8Vector = false;
71   HasP8Altivec = false;
72   HasP8Crypto = false;
73   HasP9Vector = false;
74   HasP9Altivec = false;
75   HasFCPSGN = false;
76   HasFSQRT = false;
77   HasFRE = false;
78   HasFRES = false;
79   HasFRSQRTE = false;
80   HasFRSQRTES = false;
81   HasRecipPrec = false;
82   HasSTFIWX = false;
83   HasLFIWAX = false;
84   HasFPRND = false;
85   HasFPCVT = false;
86   HasISEL = false;
87   HasBPERMD = false;
88   HasExtDiv = false;
89   HasCMPB = false;
90   HasLDBRX = false;
91   IsBookE = false;
92   HasOnlyMSYNC = false;
93   IsPPC4xx = false;
94   IsPPC6xx = false;
95   IsE500 = false;
96   FeatureMFTB = false;
97   DeprecatedDST = false;
98   HasLazyResolverStubs = false;
99   HasICBT = false;
100   HasInvariantFunctionDescriptors = false;
101   HasPartwordAtomics = false;
102   HasDirectMove = false;
103   IsQPXStackUnaligned = false;
104   HasHTM = false;
105   HasFusion = false;
106   HasFloat128 = false;
107   IsISA3_0 = false;
108   UseLongCalls = false;
109   SecurePlt = false;
110 
111   HasPOPCNTD = POPCNTD_Unavailable;
112 }
113 
114 void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
115   // Determine default and user specified characteristics
116   std::string CPUName = CPU;
117   if (CPUName.empty() || CPU == "generic") {
118     // If cross-compiling with -march=ppc64le without -mcpu
119     if (TargetTriple.getArch() == Triple::ppc64le)
120       CPUName = "ppc64le";
121     else
122       CPUName = "generic";
123   }
124 
125   // Initialize scheduling itinerary for the specified CPU.
126   InstrItins = getInstrItineraryForCPU(CPUName);
127 
128   // Parse features string.
129   ParseSubtargetFeatures(CPUName, FS);
130 
131   // If the user requested use of 64-bit regs, but the cpu selected doesn't
132   // support it, ignore.
133   if (IsPPC64 && has64BitSupport())
134     Use64BitRegs = true;
135 
136   // Set up darwin-specific properties.
137   if (isDarwin())
138     HasLazyResolverStubs = true;
139 
140   // QPX requires a 32-byte aligned stack. Note that we need to do this if
141   // we're compiling for a BG/Q system regardless of whether or not QPX
142   // is enabled because external functions will assume this alignment.
143   IsQPXStackUnaligned = QPXStackUnaligned;
144   StackAlignment = getPlatformStackAlignment();
145 
146   // Determine endianness.
147   // FIXME: Part of the TargetMachine.
148   IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
149 }
150 
151 /// Return true if accesses to the specified global have to go through a dyld
152 /// lazy resolution stub.  This means that an extra load is required to get the
153 /// address of the global.
154 bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV) const {
155   if (!HasLazyResolverStubs)
156     return false;
157   if (!TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
158     return true;
159   // 32 bit macho has no relocation for a-b if a is undefined, even if b is in
160   // the section that is being relocated. This means we have to use o load even
161   // for GVs that are known to be local to the dso.
162   if (GV->isDeclarationForLinker() || GV->hasCommonLinkage())
163     return true;
164   return false;
165 }
166 
167 // Embedded cores need aggressive scheduling (and some others also benefit).
168 static bool needsAggressiveScheduling(unsigned Directive) {
169   switch (Directive) {
170   default: return false;
171   case PPC::DIR_440:
172   case PPC::DIR_A2:
173   case PPC::DIR_E500mc:
174   case PPC::DIR_E5500:
175   case PPC::DIR_PWR7:
176   case PPC::DIR_PWR8:
177   // FIXME: Same as P8 until POWER9 scheduling info is available
178   case PPC::DIR_PWR9:
179     return true;
180   }
181 }
182 
183 bool PPCSubtarget::enableMachineScheduler() const {
184   // Enable MI scheduling for the embedded cores.
185   // FIXME: Enable this for all cores (some additional modeling
186   // may be necessary).
187   return needsAggressiveScheduling(DarwinDirective);
188 }
189 
190 // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
191 bool PPCSubtarget::enablePostRAScheduler() const { return true; }
192 
193 PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const {
194   return TargetSubtargetInfo::ANTIDEP_ALL;
195 }
196 
197 void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
198   CriticalPathRCs.clear();
199   CriticalPathRCs.push_back(isPPC64() ?
200                             &PPC::G8RCRegClass : &PPC::GPRCRegClass);
201 }
202 
203 void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
204                                        unsigned NumRegionInstrs) const {
205   if (needsAggressiveScheduling(DarwinDirective)) {
206     Policy.OnlyTopDown = false;
207     Policy.OnlyBottomUp = false;
208   }
209 
210   // Spilling is generally expensive on all PPC cores, so always enable
211   // register-pressure tracking.
212   Policy.ShouldTrackPressure = true;
213 }
214 
215 bool PPCSubtarget::useAA() const {
216   // Use AA during code generation for the embedded cores.
217   return needsAggressiveScheduling(DarwinDirective);
218 }
219 
220 bool PPCSubtarget::enableSubRegLiveness() const {
221   return UseSubRegLiveness;
222 }
223 
224 unsigned char
225 PPCSubtarget::classifyGlobalReference(const GlobalValue *GV) const {
226   // Note that currently we don't generate non-pic references.
227   // If a caller wants that, this will have to be updated.
228 
229   // Large code model always uses the TOC even for local symbols.
230   if (TM.getCodeModel() == CodeModel::Large)
231     return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
232 
233   if (TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
234     return PPCII::MO_PIC_FLAG;
235   return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
236 }
237 
238 bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
239 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
240