1//===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// 12// PowerPC instruction formats 13 14class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 15 : Instruction { 16 field bits<32> Inst; 17 18 bit PPC64 = 0; // Default value, override with isPPC64 19 20 let Namespace = "PPC"; 21 let Inst{0-5} = opcode; 22 let OutOperandList = OOL; 23 let InOperandList = IOL; 24 let AsmString = asmstr; 25 let Itinerary = itin; 26 27 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to 28 /// these must be reflected there! See comments there for what these are. 29 bits<1> PPC970_First = 0; 30 bits<1> PPC970_Single = 0; 31 bits<1> PPC970_Cracked = 0; 32 bits<3> PPC970_Unit = 0; 33} 34 35class PPC970_DGroup_First { bits<1> PPC970_First = 1; } 36class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; } 37class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; } 38class PPC970_MicroCode; 39 40class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; } 41class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; } 42class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; } 43class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; } 44class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; } 45class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; } 46class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; } 47class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; } 48 49 50// 1.7.1 I-Form 51class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 52 InstrItinClass itin, list<dag> pattern> 53 : I<opcode, OOL, IOL, asmstr, itin> { 54 let Pattern = pattern; 55 bits<24> LI; 56 57 let Inst{6-29} = LI; 58 let Inst{30} = aa; 59 let Inst{31} = lk; 60} 61 62// 1.7.2 B-Form 63class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr> 64 : I<opcode, OOL, IOL, asmstr, BrB> { 65 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 66 bits<3> CR; 67 bits<14> BD; 68 69 bits<5> BI; 70 let BI{0-1} = BIBO{5-6}; 71 let BI{2-4} = CR{0-2}; 72 73 let Inst{6-10} = BIBO{4-0}; 74 let Inst{11-15} = BI; 75 let Inst{16-29} = BD; 76 let Inst{30} = aa; 77 let Inst{31} = lk; 78} 79 80 81// 1.7.4 D-Form 82class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr, 83 InstrItinClass itin, list<dag> pattern> 84 : I<opcode, OOL, IOL, asmstr, itin> { 85 bits<5> A; 86 bits<5> B; 87 bits<16> C; 88 89 let Pattern = pattern; 90 91 let Inst{6-10} = A; 92 let Inst{11-15} = B; 93 let Inst{16-31} = C; 94} 95 96class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 97 InstrItinClass itin, list<dag> pattern> 98 : I<opcode, OOL, IOL, asmstr, itin> { 99 bits<5> A; 100 bits<16> C; 101 bits<5> B; 102 103 let Pattern = pattern; 104 105 let Inst{6-10} = A; 106 let Inst{11-15} = B; 107 let Inst{16-31} = C; 108} 109 110class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 111 InstrItinClass itin, list<dag> pattern> 112 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern>; 113 114class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr, 115 InstrItinClass itin, list<dag> pattern> 116 : I<opcode, OOL, IOL, asmstr, itin> { 117 bits<5> A; 118 bits<16> B; 119 120 let Pattern = pattern; 121 122 let Inst{6-10} = A; 123 let Inst{11-15} = 0; 124 let Inst{16-31} = B; 125} 126 127class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr, 128 InstrItinClass itin, list<dag> pattern> 129 : I<opcode, OOL, IOL, asmstr, itin> { 130 bits<5> B; 131 bits<5> A; 132 bits<16> C; 133 134 let Pattern = pattern; 135 136 let Inst{6-10} = A; 137 let Inst{11-15} = B; 138 let Inst{16-31} = C; 139} 140 141class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr, 142 InstrItinClass itin, list<dag> pattern> 143 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 144 let A = 0; 145 let B = 0; 146 let C = 0; 147} 148 149class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr, 150 InstrItinClass itin> 151 : I<opcode, OOL, IOL, asmstr, itin> { 152 bits<3> BF; 153 bits<1> L; 154 bits<5> RA; 155 bits<16> I; 156 157 let Inst{6-8} = BF; 158 let Inst{9} = 0; 159 let Inst{10} = L; 160 let Inst{11-15} = RA; 161 let Inst{16-31} = I; 162} 163 164class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 165 InstrItinClass itin> 166 : DForm_5<opcode, OOL, IOL, asmstr, itin> { 167 let L = PPC64; 168} 169 170class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr, 171 InstrItinClass itin> 172 : DForm_5<opcode, OOL, IOL, asmstr, itin>; 173 174class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 175 InstrItinClass itin> 176 : DForm_6<opcode, OOL, IOL, asmstr, itin> { 177 let L = PPC64; 178} 179 180 181// 1.7.5 DS-Form 182class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 183 InstrItinClass itin, list<dag> pattern> 184 : I<opcode, OOL, IOL, asmstr, itin> { 185 bits<5> RST; 186 bits<14> DS; 187 bits<5> RA; 188 189 let Pattern = pattern; 190 191 let Inst{6-10} = RST; 192 let Inst{11-15} = RA; 193 let Inst{16-29} = DS; 194 let Inst{30-31} = xo; 195} 196 197// 1.7.6 X-Form 198class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 199 InstrItinClass itin, list<dag> pattern> 200 : I<opcode, OOL, IOL, asmstr, itin> { 201 bits<5> RST; 202 bits<5> A; 203 bits<5> B; 204 205 let Pattern = pattern; 206 207 bit RC = 0; // set by isDOT 208 209 let Inst{6-10} = RST; 210 let Inst{11-15} = A; 211 let Inst{16-20} = B; 212 let Inst{21-30} = xo; 213 let Inst{31} = RC; 214} 215 216// This is the same as XForm_base_r3xo, but the first two operands are swapped 217// when code is emitted. 218class XForm_base_r3xo_swapped 219 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 220 InstrItinClass itin> 221 : I<opcode, OOL, IOL, asmstr, itin> { 222 bits<5> A; 223 bits<5> RST; 224 bits<5> B; 225 226 bit RC = 0; // set by isDOT 227 228 let Inst{6-10} = RST; 229 let Inst{11-15} = A; 230 let Inst{16-20} = B; 231 let Inst{21-30} = xo; 232 let Inst{31} = RC; 233} 234 235 236class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 237 InstrItinClass itin, list<dag> pattern> 238 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 239 240class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 241 InstrItinClass itin, list<dag> pattern> 242 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 243 let Pattern = pattern; 244} 245 246class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 247 InstrItinClass itin, list<dag> pattern> 248 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 249 250class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 251 InstrItinClass itin, list<dag> pattern> 252 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 253 let Pattern = pattern; 254} 255 256class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 257 InstrItinClass itin, list<dag> pattern> 258 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 259 let B = 0; 260 let Pattern = pattern; 261} 262 263class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 264 InstrItinClass itin> 265 : I<opcode, OOL, IOL, asmstr, itin> { 266 bits<3> BF; 267 bits<1> L; 268 bits<5> RA; 269 bits<5> RB; 270 271 let Inst{6-8} = BF; 272 let Inst{9} = 0; 273 let Inst{10} = L; 274 let Inst{11-15} = RA; 275 let Inst{16-20} = RB; 276 let Inst{21-30} = xo; 277 let Inst{31} = 0; 278} 279 280class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 281 InstrItinClass itin> 282 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> { 283 let L = PPC64; 284} 285 286class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 287 InstrItinClass itin> 288 : I<opcode, OOL, IOL, asmstr, itin> { 289 bits<3> BF; 290 bits<5> FRA; 291 bits<5> FRB; 292 293 let Inst{6-8} = BF; 294 let Inst{9-10} = 0; 295 let Inst{11-15} = FRA; 296 let Inst{16-20} = FRB; 297 let Inst{21-30} = xo; 298 let Inst{31} = 0; 299} 300 301class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 302 InstrItinClass itin, list<dag> pattern> 303 : I<opcode, OOL, IOL, asmstr, itin> { 304 let Pattern = pattern; 305 let Inst{6-10} = 31; 306 let Inst{11-15} = 0; 307 let Inst{16-20} = 0; 308 let Inst{21-30} = xo; 309 let Inst{31} = 0; 310} 311 312class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 313 string asmstr, InstrItinClass itin, list<dag> pattern> 314 : I<opcode, OOL, IOL, asmstr, itin> { 315 let Pattern = pattern; 316 let Inst{6-10} = 0; 317 let Inst{11-15} = 0; 318 let Inst{16-20} = 0; 319 let Inst{21-30} = xo; 320 let Inst{31} = 0; 321} 322 323class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 324 InstrItinClass itin, list<dag> pattern> 325 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 326} 327 328class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 329 InstrItinClass itin, list<dag> pattern> 330 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 331 let A = 0; 332} 333 334class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 335 InstrItinClass itin, list<dag> pattern> 336 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 337} 338 339// This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of 340// numbers presumably relates to some document, but I haven't found it. 341class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 342 InstrItinClass itin, list<dag> pattern> 343 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 344 let Pattern = pattern; 345 346 bit RC = 0; // set by isDOT 347 348 let Inst{6-10} = RST; 349 let Inst{11-20} = 0; 350 let Inst{21-30} = xo; 351 let Inst{31} = RC; 352} 353class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 354 InstrItinClass itin, list<dag> pattern> 355 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 356 let Pattern = pattern; 357 bits<5> FM; 358 359 bit RC = 0; // set by isDOT 360 361 let Inst{6-10} = FM; 362 let Inst{11-20} = 0; 363 let Inst{21-30} = xo; 364 let Inst{31} = RC; 365} 366 367// DCB_Form - Form X instruction, used for dcb* instructions. 368class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr, 369 InstrItinClass itin, list<dag> pattern> 370 : I<31, OOL, IOL, asmstr, itin> { 371 bits<5> A; 372 bits<5> B; 373 374 let Pattern = pattern; 375 376 let Inst{6-10} = immfield; 377 let Inst{11-15} = A; 378 let Inst{16-20} = B; 379 let Inst{21-30} = xo; 380 let Inst{31} = 0; 381} 382 383 384// DSS_Form - Form X instruction, used for altivec dss* instructions. 385class DSS_Form<bits<10> xo, dag OOL, dag IOL, string asmstr, 386 InstrItinClass itin, list<dag> pattern> 387 : I<31, OOL, IOL, asmstr, itin> { 388 bits<1> T; 389 bits<2> STRM; 390 bits<5> A; 391 bits<5> B; 392 393 let Pattern = pattern; 394 395 let Inst{6} = T; 396 let Inst{7-8} = 0; 397 let Inst{9-10} = STRM; 398 let Inst{11-15} = A; 399 let Inst{16-20} = B; 400 let Inst{21-30} = xo; 401 let Inst{31} = 0; 402} 403 404// 1.7.7 XL-Form 405class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 406 InstrItinClass itin, list<dag> pattern> 407 : I<opcode, OOL, IOL, asmstr, itin> { 408 bits<5> CRD; 409 bits<5> CRA; 410 bits<5> CRB; 411 412 let Pattern = pattern; 413 414 let Inst{6-10} = CRD; 415 let Inst{11-15} = CRA; 416 let Inst{16-20} = CRB; 417 let Inst{21-30} = xo; 418 let Inst{31} = 0; 419} 420 421class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 422 InstrItinClass itin, list<dag> pattern> 423 : I<opcode, OOL, IOL, asmstr, itin> { 424 bits<5> CRD; 425 426 let Pattern = pattern; 427 428 let Inst{6-10} = CRD; 429 let Inst{11-15} = CRD; 430 let Inst{16-20} = CRD; 431 let Inst{21-30} = xo; 432 let Inst{31} = 0; 433} 434 435class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr, 436 InstrItinClass itin, list<dag> pattern> 437 : I<opcode, OOL, IOL, asmstr, itin> { 438 bits<5> BO; 439 bits<5> BI; 440 bits<2> BH; 441 442 let Pattern = pattern; 443 444 let Inst{6-10} = BO; 445 let Inst{11-15} = BI; 446 let Inst{16-18} = 0; 447 let Inst{19-20} = BH; 448 let Inst{21-30} = xo; 449 let Inst{31} = lk; 450} 451 452class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk, 453 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 454 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 455 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 456 bits<3> CR; 457 458 let BO = BIBO{2-6}; 459 let BI{0-1} = BIBO{0-1}; 460 let BI{2-4} = CR; 461 let BH = 0; 462} 463 464 465class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk, 466 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 467 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 468 let BO = bo; 469 let BI = bi; 470 let BH = 0; 471} 472 473class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 474 InstrItinClass itin> 475 : I<opcode, OOL, IOL, asmstr, itin> { 476 bits<3> BF; 477 bits<3> BFA; 478 479 let Inst{6-8} = BF; 480 let Inst{9-10} = 0; 481 let Inst{11-13} = BFA; 482 let Inst{14-15} = 0; 483 let Inst{16-20} = 0; 484 let Inst{21-30} = xo; 485 let Inst{31} = 0; 486} 487 488// 1.7.8 XFX-Form 489class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 490 InstrItinClass itin> 491 : I<opcode, OOL, IOL, asmstr, itin> { 492 bits<5> RT; 493 bits<10> SPR; 494 495 let Inst{6-10} = RT; 496 let Inst{11} = SPR{4}; 497 let Inst{12} = SPR{3}; 498 let Inst{13} = SPR{2}; 499 let Inst{14} = SPR{1}; 500 let Inst{15} = SPR{0}; 501 let Inst{16} = SPR{9}; 502 let Inst{17} = SPR{8}; 503 let Inst{18} = SPR{7}; 504 let Inst{19} = SPR{6}; 505 let Inst{20} = SPR{5}; 506 let Inst{21-30} = xo; 507 let Inst{31} = 0; 508} 509 510class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 511 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 512 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> { 513 let SPR = spr; 514} 515 516class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 517 InstrItinClass itin> 518 : I<opcode, OOL, IOL, asmstr, itin> { 519 bits<5> RT; 520 521 let Inst{6-10} = RT; 522 let Inst{11-20} = 0; 523 let Inst{21-30} = xo; 524 let Inst{31} = 0; 525} 526 527class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 528 InstrItinClass itin> 529 : I<opcode, OOL, IOL, asmstr, itin> { 530 bits<8> FXM; 531 bits<5> ST; 532 533 let Inst{6-10} = ST; 534 let Inst{11} = 0; 535 let Inst{12-19} = FXM; 536 let Inst{20} = 0; 537 let Inst{21-30} = xo; 538 let Inst{31} = 0; 539} 540 541class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 542 InstrItinClass itin> 543 : I<opcode, OOL, IOL, asmstr, itin> { 544 bits<5> ST; 545 bits<8> FXM; 546 547 let Inst{6-10} = ST; 548 let Inst{11} = 1; 549 let Inst{12-19} = FXM; 550 let Inst{20} = 0; 551 let Inst{21-30} = xo; 552 let Inst{31} = 0; 553} 554 555class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 556 InstrItinClass itin> 557 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>; 558 559class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 560 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 561 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> { 562 let SPR = spr; 563} 564 565// XFL-Form - MTFSF 566// This is probably 1.7.9, but I don't have the reference that uses this 567// numbering scheme... 568class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 569 string cstr, InstrItinClass itin, list<dag>pattern> 570 : I<opcode, OOL, IOL, asmstr, itin> { 571 bits<8> FM; 572 bits<5> RT; 573 574 bit RC = 0; // set by isDOT 575 let Pattern = pattern; 576 let Constraints = cstr; 577 578 let Inst{6} = 0; 579 let Inst{7-14} = FM; 580 let Inst{15} = 0; 581 let Inst{16-20} = RT; 582 let Inst{21-30} = xo; 583 let Inst{31} = RC; 584} 585 586// 1.7.10 XS-Form - SRADI. 587class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 588 InstrItinClass itin, list<dag> pattern> 589 : I<opcode, OOL, IOL, asmstr, itin> { 590 bits<5> A; 591 bits<5> RS; 592 bits<6> SH; 593 594 bit RC = 0; // set by isDOT 595 let Pattern = pattern; 596 597 let Inst{6-10} = RS; 598 let Inst{11-15} = A; 599 let Inst{16-20} = SH{4,3,2,1,0}; 600 let Inst{21-29} = xo; 601 let Inst{30} = SH{5}; 602 let Inst{31} = RC; 603} 604 605// 1.7.11 XO-Form 606class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr, 607 InstrItinClass itin, list<dag> pattern> 608 : I<opcode, OOL, IOL, asmstr, itin> { 609 bits<5> RT; 610 bits<5> RA; 611 bits<5> RB; 612 613 let Pattern = pattern; 614 615 bit RC = 0; // set by isDOT 616 617 let Inst{6-10} = RT; 618 let Inst{11-15} = RA; 619 let Inst{16-20} = RB; 620 let Inst{21} = oe; 621 let Inst{22-30} = xo; 622 let Inst{31} = RC; 623} 624 625class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, 626 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 627 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> { 628 let RB = 0; 629} 630 631// 1.7.12 A-Form 632class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 633 InstrItinClass itin, list<dag> pattern> 634 : I<opcode, OOL, IOL, asmstr, itin> { 635 bits<5> FRT; 636 bits<5> FRA; 637 bits<5> FRC; 638 bits<5> FRB; 639 640 let Pattern = pattern; 641 642 bit RC = 0; // set by isDOT 643 644 let Inst{6-10} = FRT; 645 let Inst{11-15} = FRA; 646 let Inst{16-20} = FRB; 647 let Inst{21-25} = FRC; 648 let Inst{26-30} = xo; 649 let Inst{31} = RC; 650} 651 652class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 653 InstrItinClass itin, list<dag> pattern> 654 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 655 let FRC = 0; 656} 657 658class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 659 InstrItinClass itin, list<dag> pattern> 660 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 661 let FRB = 0; 662} 663 664// 1.7.13 M-Form 665class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 666 InstrItinClass itin, list<dag> pattern> 667 : I<opcode, OOL, IOL, asmstr, itin> { 668 bits<5> RA; 669 bits<5> RS; 670 bits<5> RB; 671 bits<5> MB; 672 bits<5> ME; 673 674 let Pattern = pattern; 675 676 bit RC = 0; // set by isDOT 677 678 let Inst{6-10} = RS; 679 let Inst{11-15} = RA; 680 let Inst{16-20} = RB; 681 let Inst{21-25} = MB; 682 let Inst{26-30} = ME; 683 let Inst{31} = RC; 684} 685 686class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 687 InstrItinClass itin, list<dag> pattern> 688 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 689} 690 691// 1.7.14 MD-Form 692class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr, 693 InstrItinClass itin, list<dag> pattern> 694 : I<opcode, OOL, IOL, asmstr, itin> { 695 bits<5> RA; 696 bits<5> RS; 697 bits<6> SH; 698 bits<6> MBE; 699 700 let Pattern = pattern; 701 702 bit RC = 0; // set by isDOT 703 704 let Inst{6-10} = RS; 705 let Inst{11-15} = RA; 706 let Inst{16-20} = SH{4,3,2,1,0}; 707 let Inst{21-26} = MBE{4,3,2,1,0,5}; 708 let Inst{27-29} = xo; 709 let Inst{30} = SH{5}; 710 let Inst{31} = RC; 711} 712 713 714 715// E-1 VA-Form 716 717// VAForm_1 - DACB ordering. 718class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr, 719 InstrItinClass itin, list<dag> pattern> 720 : I<4, OOL, IOL, asmstr, itin> { 721 bits<5> VD; 722 bits<5> VA; 723 bits<5> VC; 724 bits<5> VB; 725 726 let Pattern = pattern; 727 728 let Inst{6-10} = VD; 729 let Inst{11-15} = VA; 730 let Inst{16-20} = VB; 731 let Inst{21-25} = VC; 732 let Inst{26-31} = xo; 733} 734 735// VAForm_1a - DABC ordering. 736class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr, 737 InstrItinClass itin, list<dag> pattern> 738 : I<4, OOL, IOL, asmstr, itin> { 739 bits<5> VD; 740 bits<5> VA; 741 bits<5> VB; 742 bits<5> VC; 743 744 let Pattern = pattern; 745 746 let Inst{6-10} = VD; 747 let Inst{11-15} = VA; 748 let Inst{16-20} = VB; 749 let Inst{21-25} = VC; 750 let Inst{26-31} = xo; 751} 752 753class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr, 754 InstrItinClass itin, list<dag> pattern> 755 : I<4, OOL, IOL, asmstr, itin> { 756 bits<5> VD; 757 bits<5> VA; 758 bits<5> VB; 759 bits<4> SH; 760 761 let Pattern = pattern; 762 763 let Inst{6-10} = VD; 764 let Inst{11-15} = VA; 765 let Inst{16-20} = VB; 766 let Inst{21} = 0; 767 let Inst{22-25} = SH; 768 let Inst{26-31} = xo; 769} 770 771// E-2 VX-Form 772class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr, 773 InstrItinClass itin, list<dag> pattern> 774 : I<4, OOL, IOL, asmstr, itin> { 775 bits<5> VD; 776 bits<5> VA; 777 bits<5> VB; 778 779 let Pattern = pattern; 780 781 let Inst{6-10} = VD; 782 let Inst{11-15} = VA; 783 let Inst{16-20} = VB; 784 let Inst{21-31} = xo; 785} 786 787class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr, 788 InstrItinClass itin, list<dag> pattern> 789 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> { 790 let VA = VD; 791 let VB = VD; 792} 793 794 795class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr, 796 InstrItinClass itin, list<dag> pattern> 797 : I<4, OOL, IOL, asmstr, itin> { 798 bits<5> VD; 799 bits<5> VB; 800 801 let Pattern = pattern; 802 803 let Inst{6-10} = VD; 804 let Inst{11-15} = 0; 805 let Inst{16-20} = VB; 806 let Inst{21-31} = xo; 807} 808 809class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr, 810 InstrItinClass itin, list<dag> pattern> 811 : I<4, OOL, IOL, asmstr, itin> { 812 bits<5> VD; 813 bits<5> IMM; 814 815 let Pattern = pattern; 816 817 let Inst{6-10} = VD; 818 let Inst{11-15} = IMM; 819 let Inst{16-20} = 0; 820 let Inst{21-31} = xo; 821} 822 823/// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr. 824class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr, 825 InstrItinClass itin, list<dag> pattern> 826 : I<4, OOL, IOL, asmstr, itin> { 827 bits<5> VD; 828 829 let Pattern = pattern; 830 831 let Inst{6-10} = VD; 832 let Inst{11-15} = 0; 833 let Inst{16-20} = 0; 834 let Inst{21-31} = xo; 835} 836 837/// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr. 838class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr, 839 InstrItinClass itin, list<dag> pattern> 840 : I<4, OOL, IOL, asmstr, itin> { 841 bits<5> VB; 842 843 let Pattern = pattern; 844 845 let Inst{6-10} = 0; 846 let Inst{11-15} = 0; 847 let Inst{16-20} = VB; 848 let Inst{21-31} = xo; 849} 850 851// E-4 VXR-Form 852class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr, 853 InstrItinClass itin, list<dag> pattern> 854 : I<4, OOL, IOL, asmstr, itin> { 855 bits<5> VD; 856 bits<5> VA; 857 bits<5> VB; 858 bit RC = 0; 859 860 let Pattern = pattern; 861 862 let Inst{6-10} = VD; 863 let Inst{11-15} = VA; 864 let Inst{16-20} = VB; 865 let Inst{21} = RC; 866 let Inst{22-31} = xo; 867} 868 869//===----------------------------------------------------------------------===// 870class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern> 871 : I<0, OOL, IOL, asmstr, NoItinerary> { 872 let PPC64 = 0; 873 let Pattern = pattern; 874 let Inst{31-0} = 0; 875} 876