1//===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// 12// PowerPC instruction formats 13 14class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 15 : Instruction { 16 field bits<32> Inst; 17 field bits<32> SoftFail = 0; 18 let Size = 4; 19 20 bit PPC64 = 0; // Default value, override with isPPC64 21 22 let Namespace = "PPC"; 23 let Inst{0-5} = opcode; 24 let OutOperandList = OOL; 25 let InOperandList = IOL; 26 let AsmString = asmstr; 27 let Itinerary = itin; 28 29 bits<1> PPC970_First = 0; 30 bits<1> PPC970_Single = 0; 31 bits<1> PPC970_Cracked = 0; 32 bits<3> PPC970_Unit = 0; 33 34 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to 35 /// these must be reflected there! See comments there for what these are. 36 let TSFlags{0} = PPC970_First; 37 let TSFlags{1} = PPC970_Single; 38 let TSFlags{2} = PPC970_Cracked; 39 let TSFlags{5-3} = PPC970_Unit; 40 41 // Fields used for relation models. 42 string BaseName = ""; 43 44 // For cases where multiple instruction definitions really represent the 45 // same underlying instruction but with one definition for 64-bit arguments 46 // and one for 32-bit arguments, this bit breaks the degeneracy between 47 // the two forms and allows TableGen to generate mapping tables. 48 bit Interpretation64Bit = 0; 49} 50 51class PPC970_DGroup_First { bits<1> PPC970_First = 1; } 52class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; } 53class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; } 54class PPC970_MicroCode; 55 56class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; } 57class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; } 58class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; } 59class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; } 60class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; } 61class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; } 62class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; } 63class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; } 64 65// Two joined instructions; used to emit two adjacent instructions as one. 66// The itinerary from the first instruction is used for scheduling and 67// classification. 68class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr, 69 InstrItinClass itin> 70 : Instruction { 71 field bits<64> Inst; 72 field bits<64> SoftFail = 0; 73 let Size = 8; 74 75 bit PPC64 = 0; // Default value, override with isPPC64 76 77 let Namespace = "PPC"; 78 let Inst{0-5} = opcode1; 79 let Inst{32-37} = opcode2; 80 let OutOperandList = OOL; 81 let InOperandList = IOL; 82 let AsmString = asmstr; 83 let Itinerary = itin; 84 85 bits<1> PPC970_First = 0; 86 bits<1> PPC970_Single = 0; 87 bits<1> PPC970_Cracked = 0; 88 bits<3> PPC970_Unit = 0; 89 90 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to 91 /// these must be reflected there! See comments there for what these are. 92 let TSFlags{0} = PPC970_First; 93 let TSFlags{1} = PPC970_Single; 94 let TSFlags{2} = PPC970_Cracked; 95 let TSFlags{5-3} = PPC970_Unit; 96 97 // Fields used for relation models. 98 string BaseName = ""; 99 bit Interpretation64Bit = 0; 100} 101 102// 1.7.1 I-Form 103class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 104 InstrItinClass itin, list<dag> pattern> 105 : I<opcode, OOL, IOL, asmstr, itin> { 106 let Pattern = pattern; 107 bits<24> LI; 108 109 let Inst{6-29} = LI; 110 let Inst{30} = aa; 111 let Inst{31} = lk; 112} 113 114// 1.7.2 B-Form 115class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr> 116 : I<opcode, OOL, IOL, asmstr, IIC_BrB> { 117 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 118 bits<3> CR; 119 bits<14> BD; 120 121 bits<5> BI; 122 let BI{0-1} = BIBO{5-6}; 123 let BI{2-4} = CR{0-2}; 124 125 let Inst{6-10} = BIBO{4-0}; 126 let Inst{11-15} = BI; 127 let Inst{16-29} = BD; 128 let Inst{30} = aa; 129 let Inst{31} = lk; 130} 131 132class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL, 133 string asmstr> 134 : BForm<opcode, aa, lk, OOL, IOL, asmstr> { 135 let BIBO{4-0} = bo; 136 let BIBO{6-5} = 0; 137 let CR = 0; 138} 139 140class BForm_2<bits<6> opcode, bits<5> bo, bits<5> bi, bit aa, bit lk, 141 dag OOL, dag IOL, string asmstr> 142 : I<opcode, OOL, IOL, asmstr, IIC_BrB> { 143 bits<14> BD; 144 145 let Inst{6-10} = bo; 146 let Inst{11-15} = bi; 147 let Inst{16-29} = BD; 148 let Inst{30} = aa; 149 let Inst{31} = lk; 150} 151 152class BForm_3<bits<6> opcode, bit aa, bit lk, 153 dag OOL, dag IOL, string asmstr> 154 : I<opcode, OOL, IOL, asmstr, IIC_BrB> { 155 bits<5> BO; 156 bits<5> BI; 157 bits<14> BD; 158 159 let Inst{6-10} = BO; 160 let Inst{11-15} = BI; 161 let Inst{16-29} = BD; 162 let Inst{30} = aa; 163 let Inst{31} = lk; 164} 165 166class BForm_4<bits<6> opcode, bits<5> bo, bit aa, bit lk, 167 dag OOL, dag IOL, string asmstr> 168 : I<opcode, OOL, IOL, asmstr, IIC_BrB> { 169 bits<5> BI; 170 bits<14> BD; 171 172 let Inst{6-10} = bo; 173 let Inst{11-15} = BI; 174 let Inst{16-29} = BD; 175 let Inst{30} = aa; 176 let Inst{31} = lk; 177} 178 179// 1.7.3 SC-Form 180class SCForm<bits<6> opcode, bits<1> xo, 181 dag OOL, dag IOL, string asmstr, InstrItinClass itin, 182 list<dag> pattern> 183 : I<opcode, OOL, IOL, asmstr, itin> { 184 bits<7> LEV; 185 186 let Pattern = pattern; 187 188 let Inst{20-26} = LEV; 189 let Inst{30} = xo; 190} 191 192// 1.7.4 D-Form 193class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr, 194 InstrItinClass itin, list<dag> pattern> 195 : I<opcode, OOL, IOL, asmstr, itin> { 196 bits<5> A; 197 bits<5> B; 198 bits<16> C; 199 200 let Pattern = pattern; 201 202 let Inst{6-10} = A; 203 let Inst{11-15} = B; 204 let Inst{16-31} = C; 205} 206 207class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 208 InstrItinClass itin, list<dag> pattern> 209 : I<opcode, OOL, IOL, asmstr, itin> { 210 bits<5> A; 211 bits<21> Addr; 212 213 let Pattern = pattern; 214 215 let Inst{6-10} = A; 216 let Inst{11-15} = Addr{20-16}; // Base Reg 217 let Inst{16-31} = Addr{15-0}; // Displacement 218} 219 220class DForm_1a<bits<6> opcode, dag OOL, dag IOL, string asmstr, 221 InstrItinClass itin, list<dag> pattern> 222 : I<opcode, OOL, IOL, asmstr, itin> { 223 bits<5> A; 224 bits<16> C; 225 bits<5> B; 226 227 let Pattern = pattern; 228 229 let Inst{6-10} = A; 230 let Inst{11-15} = B; 231 let Inst{16-31} = C; 232} 233 234 235class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 236 InstrItinClass itin, list<dag> pattern> 237 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern> { 238 239 // Even though ADDICo does not really have an RC bit, provide 240 // the declaration of one here so that isDOT has something to set. 241 bit RC = 0; 242} 243 244class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr, 245 InstrItinClass itin, list<dag> pattern> 246 : I<opcode, OOL, IOL, asmstr, itin> { 247 bits<5> A; 248 bits<16> B; 249 250 let Pattern = pattern; 251 252 let Inst{6-10} = A; 253 let Inst{11-15} = 0; 254 let Inst{16-31} = B; 255} 256 257class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr, 258 InstrItinClass itin, list<dag> pattern> 259 : I<opcode, OOL, IOL, asmstr, itin> { 260 bits<5> B; 261 bits<5> A; 262 bits<16> C; 263 264 let Pattern = pattern; 265 266 let Inst{6-10} = A; 267 let Inst{11-15} = B; 268 let Inst{16-31} = C; 269} 270 271class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr, 272 InstrItinClass itin, list<dag> pattern> 273 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 274 let A = 0; 275 let Addr = 0; 276} 277 278class DForm_4_fixedreg_zero<bits<6> opcode, bits<5> R, dag OOL, dag IOL, 279 string asmstr, InstrItinClass itin, 280 list<dag> pattern> 281 : DForm_4<opcode, OOL, IOL, asmstr, itin, pattern> { 282 let A = R; 283 let B = R; 284 let C = 0; 285} 286 287class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2, 288 dag OOL, dag IOL, string asmstr, 289 InstrItinClass itin, list<dag> pattern> 290 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> { 291 bits<5> A; 292 bits<21> Addr; 293 294 let Pattern = pattern; 295 bits<24> LI; 296 297 let Inst{6-29} = LI; 298 let Inst{30} = aa; 299 let Inst{31} = lk; 300 301 let Inst{38-42} = A; 302 let Inst{43-47} = Addr{20-16}; // Base Reg 303 let Inst{48-63} = Addr{15-0}; // Displacement 304} 305 306// This is used to emit BL8+NOP. 307class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2, 308 dag OOL, dag IOL, string asmstr, 309 InstrItinClass itin, list<dag> pattern> 310 : IForm_and_DForm_1<opcode1, aa, lk, opcode2, 311 OOL, IOL, asmstr, itin, pattern> { 312 let A = 0; 313 let Addr = 0; 314} 315 316class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr, 317 InstrItinClass itin> 318 : I<opcode, OOL, IOL, asmstr, itin> { 319 bits<3> BF; 320 bits<1> L; 321 bits<5> RA; 322 bits<16> I; 323 324 let Inst{6-8} = BF; 325 let Inst{9} = 0; 326 let Inst{10} = L; 327 let Inst{11-15} = RA; 328 let Inst{16-31} = I; 329} 330 331class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 332 InstrItinClass itin> 333 : DForm_5<opcode, OOL, IOL, asmstr, itin> { 334 let L = PPC64; 335} 336 337class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr, 338 InstrItinClass itin> 339 : DForm_5<opcode, OOL, IOL, asmstr, itin>; 340 341class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 342 InstrItinClass itin> 343 : DForm_6<opcode, OOL, IOL, asmstr, itin> { 344 let L = PPC64; 345} 346 347 348// 1.7.5 DS-Form 349class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 350 InstrItinClass itin, list<dag> pattern> 351 : I<opcode, OOL, IOL, asmstr, itin> { 352 bits<5> RST; 353 bits<19> DS_RA; 354 355 let Pattern = pattern; 356 357 let Inst{6-10} = RST; 358 let Inst{11-15} = DS_RA{18-14}; // Register # 359 let Inst{16-29} = DS_RA{13-0}; // Displacement. 360 let Inst{30-31} = xo; 361} 362 363 364// 1.7.6 X-Form 365class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 366 InstrItinClass itin, list<dag> pattern> 367 : I<opcode, OOL, IOL, asmstr, itin> { 368 bits<5> RST; 369 bits<5> A; 370 bits<5> B; 371 372 let Pattern = pattern; 373 374 bit RC = 0; // set by isDOT 375 376 let Inst{6-10} = RST; 377 let Inst{11-15} = A; 378 let Inst{16-20} = B; 379 let Inst{21-30} = xo; 380 let Inst{31} = RC; 381} 382 383class XForm_tlb<bits<10> xo, dag OOL, dag IOL, string asmstr, 384 InstrItinClass itin> : XForm_base_r3xo<31, xo, OOL, IOL, asmstr, itin, []> { 385 let RST = 0; 386} 387 388class XForm_attn<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 389 InstrItinClass itin> 390 : I<opcode, OOL, IOL, asmstr, itin> { 391 let Inst{21-30} = xo; 392} 393 394// This is the same as XForm_base_r3xo, but the first two operands are swapped 395// when code is emitted. 396class XForm_base_r3xo_swapped 397 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 398 InstrItinClass itin> 399 : I<opcode, OOL, IOL, asmstr, itin> { 400 bits<5> A; 401 bits<5> RST; 402 bits<5> B; 403 404 bit RC = 0; // set by isDOT 405 406 let Inst{6-10} = RST; 407 let Inst{11-15} = A; 408 let Inst{16-20} = B; 409 let Inst{21-30} = xo; 410 let Inst{31} = RC; 411} 412 413 414class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 415 InstrItinClass itin, list<dag> pattern> 416 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 417 418class XForm_1a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 419 InstrItinClass itin, list<dag> pattern> 420 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 421 let RST = 0; 422} 423 424class XForm_rs<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 425 InstrItinClass itin, list<dag> pattern> 426 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 427 let A = 0; 428 let B = 0; 429} 430 431class XForm_tlbws<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 432 InstrItinClass itin, list<dag> pattern> 433 : I<opcode, OOL, IOL, asmstr, itin> { 434 bits<5> RST; 435 bits<5> A; 436 bits<1> WS; 437 438 let Pattern = pattern; 439 440 let Inst{6-10} = RST; 441 let Inst{11-15} = A; 442 let Inst{20} = WS; 443 let Inst{21-30} = xo; 444 let Inst{31} = 0; 445} 446 447class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 448 InstrItinClass itin, list<dag> pattern> 449 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 450 let Pattern = pattern; 451} 452 453class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 454 InstrItinClass itin, list<dag> pattern> 455 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 456 457class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 458 InstrItinClass itin, list<dag> pattern> 459 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 460 let Pattern = pattern; 461} 462 463class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 464 InstrItinClass itin, list<dag> pattern> 465 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 466 let B = 0; 467 let Pattern = pattern; 468} 469 470class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 471 InstrItinClass itin> 472 : I<opcode, OOL, IOL, asmstr, itin> { 473 bits<3> BF; 474 bits<1> L; 475 bits<5> RA; 476 bits<5> RB; 477 478 let Inst{6-8} = BF; 479 let Inst{9} = 0; 480 let Inst{10} = L; 481 let Inst{11-15} = RA; 482 let Inst{16-20} = RB; 483 let Inst{21-30} = xo; 484 let Inst{31} = 0; 485} 486 487class XForm_icbt<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 488 InstrItinClass itin> 489 : I<opcode, OOL, IOL, asmstr, itin> { 490 bits<4> CT; 491 bits<5> RA; 492 bits<5> RB; 493 494 let Inst{6} = 0; 495 let Inst{7-10} = CT; 496 let Inst{11-15} = RA; 497 let Inst{16-20} = RB; 498 let Inst{21-30} = xo; 499 let Inst{31} = 0; 500} 501 502class XForm_sr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 503 InstrItinClass itin> 504 : I<opcode, OOL, IOL, asmstr, itin> { 505 bits<5> RS; 506 bits<4> SR; 507 508 let Inst{6-10} = RS; 509 let Inst{12-15} = SR; 510 let Inst{21-30} = xo; 511} 512 513class XForm_mbar<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 514 InstrItinClass itin> 515 : I<opcode, OOL, IOL, asmstr, itin> { 516 bits<5> MO; 517 518 let Inst{6-10} = MO; 519 let Inst{21-30} = xo; 520} 521 522class XForm_srin<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 523 InstrItinClass itin> 524 : I<opcode, OOL, IOL, asmstr, itin> { 525 bits<5> RS; 526 bits<5> RB; 527 528 let Inst{6-10} = RS; 529 let Inst{16-20} = RB; 530 let Inst{21-30} = xo; 531} 532 533class XForm_mtmsr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 534 InstrItinClass itin> 535 : I<opcode, OOL, IOL, asmstr, itin> { 536 bits<5> RS; 537 bits<1> L; 538 539 let Inst{6-10} = RS; 540 let Inst{15} = L; 541 let Inst{21-30} = xo; 542} 543 544class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 545 InstrItinClass itin> 546 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> { 547 let L = PPC64; 548} 549 550class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 551 InstrItinClass itin> 552 : I<opcode, OOL, IOL, asmstr, itin> { 553 bits<3> BF; 554 bits<5> FRA; 555 bits<5> FRB; 556 557 let Inst{6-8} = BF; 558 let Inst{9-10} = 0; 559 let Inst{11-15} = FRA; 560 let Inst{16-20} = FRB; 561 let Inst{21-30} = xo; 562 let Inst{31} = 0; 563} 564 565// Used for QPX 566class XForm_18<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 567 InstrItinClass itin, list<dag> pattern> 568 : I<opcode, OOL, IOL, asmstr, itin> { 569 bits<5> FRT; 570 bits<5> FRA; 571 bits<5> FRB; 572 573 let Pattern = pattern; 574 575 let Inst{6-10} = FRT; 576 let Inst{11-15} = FRA; 577 let Inst{16-20} = FRB; 578 let Inst{21-30} = xo; 579 let Inst{31} = 0; 580} 581 582class XForm_19<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 583 InstrItinClass itin, list<dag> pattern> 584 : XForm_18<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 585 let FRA = 0; 586} 587 588class XForm_20<bits<6> opcode, bits<6> xo, dag OOL, dag IOL, string asmstr, 589 InstrItinClass itin, list<dag> pattern> 590 : I<opcode, OOL, IOL, asmstr, itin> { 591 bits<5> FRT; 592 bits<5> FRA; 593 bits<5> FRB; 594 bits<4> tttt; 595 596 let Pattern = pattern; 597 598 let Inst{6-10} = FRT; 599 let Inst{11-15} = FRA; 600 let Inst{16-20} = FRB; 601 let Inst{21-24} = tttt; 602 let Inst{25-30} = xo; 603 let Inst{31} = 0; 604} 605 606class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 607 InstrItinClass itin, list<dag> pattern> 608 : I<opcode, OOL, IOL, asmstr, itin> { 609 let Pattern = pattern; 610 let Inst{6-10} = 31; 611 let Inst{11-15} = 0; 612 let Inst{16-20} = 0; 613 let Inst{21-30} = xo; 614 let Inst{31} = 0; 615} 616 617class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 618 string asmstr, InstrItinClass itin, list<dag> pattern> 619 : I<opcode, OOL, IOL, asmstr, itin> { 620 bits<2> L; 621 622 let Pattern = pattern; 623 let Inst{6-8} = 0; 624 let Inst{9-10} = L; 625 let Inst{11-15} = 0; 626 let Inst{16-20} = 0; 627 let Inst{21-30} = xo; 628 let Inst{31} = 0; 629} 630 631class XForm_24_eieio<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 632 string asmstr, InstrItinClass itin, list<dag> pattern> 633 : XForm_24_sync<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 634 let L = 0; 635} 636 637class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 638 InstrItinClass itin, list<dag> pattern> 639 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 640} 641 642class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 643 InstrItinClass itin, list<dag> pattern> 644 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 645 let A = 0; 646} 647 648class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 649 InstrItinClass itin, list<dag> pattern> 650 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 651} 652 653// This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of 654// numbers presumably relates to some document, but I haven't found it. 655class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 656 InstrItinClass itin, list<dag> pattern> 657 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 658 let Pattern = pattern; 659 660 bit RC = 0; // set by isDOT 661 662 let Inst{6-10} = RST; 663 let Inst{11-20} = 0; 664 let Inst{21-30} = xo; 665 let Inst{31} = RC; 666} 667class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 668 InstrItinClass itin, list<dag> pattern> 669 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 670 let Pattern = pattern; 671 bits<5> FM; 672 673 bit RC = 0; // set by isDOT 674 675 let Inst{6-10} = FM; 676 let Inst{11-20} = 0; 677 let Inst{21-30} = xo; 678 let Inst{31} = RC; 679} 680 681class XForm_0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 682 InstrItinClass itin, list<dag> pattern> 683 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 684 let RST = 0; 685 let A = 0; 686 let B = 0; 687} 688 689class XForm_16b<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 690 InstrItinClass itin, list<dag> pattern> 691 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 692 let RST = 0; 693 let A = 0; 694} 695 696class XForm_htm0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 697 string asmstr, InstrItinClass itin, list<dag> pattern> 698 : I<opcode, OOL, IOL, asmstr, itin> { 699 bit R; 700 701 bit RC = 1; 702 703 let Inst{6-9} = 0; 704 let Inst{10} = R; 705 let Inst{11-20} = 0; 706 let Inst{21-30} = xo; 707 let Inst{31} = RC; 708} 709 710class XForm_htm1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 711 string asmstr, InstrItinClass itin, list<dag> pattern> 712 : I<opcode, OOL, IOL, asmstr, itin> { 713 bit A; 714 715 bit RC = 1; 716 717 let Inst{6} = A; 718 let Inst{7-20} = 0; 719 let Inst{21-30} = xo; 720 let Inst{31} = RC; 721} 722 723class XForm_htm2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 724 InstrItinClass itin, list<dag> pattern> 725 : I<opcode, OOL, IOL, asmstr, itin> { 726 bit L; 727 728 bit RC = 0; // set by isDOT 729 730 let Inst{7-9} = 0; 731 let Inst{10} = L; 732 let Inst{11-20} = 0; 733 let Inst{21-30} = xo; 734 let Inst{31} = RC; 735} 736 737class XForm_htm3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 738 InstrItinClass itin, list<dag> pattern> 739 : I<opcode, OOL, IOL, asmstr, itin> { 740 bits<3> BF; 741 742 bit RC = 0; 743 744 let Inst{6-8} = BF; 745 let Inst{9-20} = 0; 746 let Inst{21-30} = xo; 747 let Inst{31} = RC; 748} 749 750// e.g. [PO VRT XO VRB XO /] or [PO VRT XO VRB XO RO] 751class X_RD5_XO5_RS5<bits<6> opcode, bits<5> xo2, bits<10> xo, dag OOL, dag IOL, 752 string asmstr, InstrItinClass itin, list<dag> pattern> 753 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 754 let A = xo2; 755} 756 757// XX*-Form (VSX) 758class XX1Form<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 759 InstrItinClass itin, list<dag> pattern> 760 : I<opcode, OOL, IOL, asmstr, itin> { 761 bits<6> XT; 762 bits<5> A; 763 bits<5> B; 764 765 let Pattern = pattern; 766 767 let Inst{6-10} = XT{4-0}; 768 let Inst{11-15} = A; 769 let Inst{16-20} = B; 770 let Inst{21-30} = xo; 771 let Inst{31} = XT{5}; 772} 773 774class XX1_RS6_RD5_XO<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 775 string asmstr, InstrItinClass itin, list<dag> pattern> 776 : XX1Form<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 777 let B = 0; 778} 779 780class XX2Form<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 781 InstrItinClass itin, list<dag> pattern> 782 : I<opcode, OOL, IOL, asmstr, itin> { 783 bits<6> XT; 784 bits<6> XB; 785 786 let Pattern = pattern; 787 788 let Inst{6-10} = XT{4-0}; 789 let Inst{11-15} = 0; 790 let Inst{16-20} = XB{4-0}; 791 let Inst{21-29} = xo; 792 let Inst{30} = XB{5}; 793 let Inst{31} = XT{5}; 794} 795 796class XX2Form_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 797 InstrItinClass itin, list<dag> pattern> 798 : I<opcode, OOL, IOL, asmstr, itin> { 799 bits<3> CR; 800 bits<6> XB; 801 802 let Pattern = pattern; 803 804 let Inst{6-8} = CR; 805 let Inst{9-15} = 0; 806 let Inst{16-20} = XB{4-0}; 807 let Inst{21-29} = xo; 808 let Inst{30} = XB{5}; 809 let Inst{31} = 0; 810} 811 812class XX2Form_2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 813 InstrItinClass itin, list<dag> pattern> 814 : I<opcode, OOL, IOL, asmstr, itin> { 815 bits<6> XT; 816 bits<6> XB; 817 bits<2> D; 818 819 let Pattern = pattern; 820 821 let Inst{6-10} = XT{4-0}; 822 let Inst{11-13} = 0; 823 let Inst{14-15} = D; 824 let Inst{16-20} = XB{4-0}; 825 let Inst{21-29} = xo; 826 let Inst{30} = XB{5}; 827 let Inst{31} = XT{5}; 828} 829 830class XX2_RD6_XO5_RS6<bits<6> opcode, bits<5> xo2, bits<9> xo, dag OOL, dag IOL, 831 string asmstr, InstrItinClass itin, list<dag> pattern> 832 : I<opcode, OOL, IOL, asmstr, itin> { 833 bits<6> XT; 834 bits<6> XB; 835 836 let Pattern = pattern; 837 838 let Inst{6-10} = XT{4-0}; 839 let Inst{11-15} = xo2; 840 let Inst{16-20} = XB{4-0}; 841 let Inst{21-29} = xo; 842 let Inst{30} = XB{5}; 843 let Inst{31} = XT{5}; 844} 845 846class XX3Form<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 847 InstrItinClass itin, list<dag> pattern> 848 : I<opcode, OOL, IOL, asmstr, itin> { 849 bits<6> XT; 850 bits<6> XA; 851 bits<6> XB; 852 853 let Pattern = pattern; 854 855 let Inst{6-10} = XT{4-0}; 856 let Inst{11-15} = XA{4-0}; 857 let Inst{16-20} = XB{4-0}; 858 let Inst{21-28} = xo; 859 let Inst{29} = XA{5}; 860 let Inst{30} = XB{5}; 861 let Inst{31} = XT{5}; 862} 863 864class XX3Form_1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 865 InstrItinClass itin, list<dag> pattern> 866 : I<opcode, OOL, IOL, asmstr, itin> { 867 bits<3> CR; 868 bits<6> XA; 869 bits<6> XB; 870 871 let Pattern = pattern; 872 873 let Inst{6-8} = CR; 874 let Inst{9-10} = 0; 875 let Inst{11-15} = XA{4-0}; 876 let Inst{16-20} = XB{4-0}; 877 let Inst{21-28} = xo; 878 let Inst{29} = XA{5}; 879 let Inst{30} = XB{5}; 880 let Inst{31} = 0; 881} 882 883class XX3Form_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 884 InstrItinClass itin, list<dag> pattern> 885 : I<opcode, OOL, IOL, asmstr, itin> { 886 bits<6> XT; 887 bits<6> XA; 888 bits<6> XB; 889 bits<2> D; 890 891 let Pattern = pattern; 892 893 let Inst{6-10} = XT{4-0}; 894 let Inst{11-15} = XA{4-0}; 895 let Inst{16-20} = XB{4-0}; 896 let Inst{21} = 0; 897 let Inst{22-23} = D; 898 let Inst{24-28} = xo; 899 let Inst{29} = XA{5}; 900 let Inst{30} = XB{5}; 901 let Inst{31} = XT{5}; 902} 903 904class XX3Form_Rc<bits<6> opcode, bits<7> xo, dag OOL, dag IOL, string asmstr, 905 InstrItinClass itin, list<dag> pattern> 906 : I<opcode, OOL, IOL, asmstr, itin> { 907 bits<6> XT; 908 bits<6> XA; 909 bits<6> XB; 910 911 let Pattern = pattern; 912 913 bit RC = 0; // set by isDOT 914 915 let Inst{6-10} = XT{4-0}; 916 let Inst{11-15} = XA{4-0}; 917 let Inst{16-20} = XB{4-0}; 918 let Inst{21} = RC; 919 let Inst{22-28} = xo; 920 let Inst{29} = XA{5}; 921 let Inst{30} = XB{5}; 922 let Inst{31} = XT{5}; 923} 924 925class XX4Form<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 926 InstrItinClass itin, list<dag> pattern> 927 : I<opcode, OOL, IOL, asmstr, itin> { 928 bits<6> XT; 929 bits<6> XA; 930 bits<6> XB; 931 bits<6> XC; 932 933 let Pattern = pattern; 934 935 let Inst{6-10} = XT{4-0}; 936 let Inst{11-15} = XA{4-0}; 937 let Inst{16-20} = XB{4-0}; 938 let Inst{21-25} = XC{4-0}; 939 let Inst{26-27} = xo; 940 let Inst{28} = XC{5}; 941 let Inst{29} = XA{5}; 942 let Inst{30} = XB{5}; 943 let Inst{31} = XT{5}; 944} 945 946// DCB_Form - Form X instruction, used for dcb* instructions. 947class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr, 948 InstrItinClass itin, list<dag> pattern> 949 : I<31, OOL, IOL, asmstr, itin> { 950 bits<5> A; 951 bits<5> B; 952 953 let Pattern = pattern; 954 955 let Inst{6-10} = immfield; 956 let Inst{11-15} = A; 957 let Inst{16-20} = B; 958 let Inst{21-30} = xo; 959 let Inst{31} = 0; 960} 961 962class DCB_Form_hint<bits<10> xo, dag OOL, dag IOL, string asmstr, 963 InstrItinClass itin, list<dag> pattern> 964 : I<31, OOL, IOL, asmstr, itin> { 965 bits<5> TH; 966 bits<5> A; 967 bits<5> B; 968 969 let Pattern = pattern; 970 971 let Inst{6-10} = TH; 972 let Inst{11-15} = A; 973 let Inst{16-20} = B; 974 let Inst{21-30} = xo; 975 let Inst{31} = 0; 976} 977 978// DSS_Form - Form X instruction, used for altivec dss* instructions. 979class DSS_Form<bits<1> T, bits<10> xo, dag OOL, dag IOL, string asmstr, 980 InstrItinClass itin, list<dag> pattern> 981 : I<31, OOL, IOL, asmstr, itin> { 982 bits<2> STRM; 983 bits<5> A; 984 bits<5> B; 985 986 let Pattern = pattern; 987 988 let Inst{6} = T; 989 let Inst{7-8} = 0; 990 let Inst{9-10} = STRM; 991 let Inst{11-15} = A; 992 let Inst{16-20} = B; 993 let Inst{21-30} = xo; 994 let Inst{31} = 0; 995} 996 997// 1.7.7 XL-Form 998class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 999 InstrItinClass itin, list<dag> pattern> 1000 : I<opcode, OOL, IOL, asmstr, itin> { 1001 bits<5> CRD; 1002 bits<5> CRA; 1003 bits<5> CRB; 1004 1005 let Pattern = pattern; 1006 1007 let Inst{6-10} = CRD; 1008 let Inst{11-15} = CRA; 1009 let Inst{16-20} = CRB; 1010 let Inst{21-30} = xo; 1011 let Inst{31} = 0; 1012} 1013 1014class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1015 InstrItinClass itin, list<dag> pattern> 1016 : I<opcode, OOL, IOL, asmstr, itin> { 1017 bits<5> CRD; 1018 1019 let Pattern = pattern; 1020 1021 let Inst{6-10} = CRD; 1022 let Inst{11-15} = CRD; 1023 let Inst{16-20} = CRD; 1024 let Inst{21-30} = xo; 1025 let Inst{31} = 0; 1026} 1027 1028class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr, 1029 InstrItinClass itin, list<dag> pattern> 1030 : I<opcode, OOL, IOL, asmstr, itin> { 1031 bits<5> BO; 1032 bits<5> BI; 1033 bits<2> BH; 1034 1035 let Pattern = pattern; 1036 1037 let Inst{6-10} = BO; 1038 let Inst{11-15} = BI; 1039 let Inst{16-18} = 0; 1040 let Inst{19-20} = BH; 1041 let Inst{21-30} = xo; 1042 let Inst{31} = lk; 1043} 1044 1045class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk, 1046 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 1047 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 1048 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 1049 bits<3> CR; 1050 1051 let BO = BIBO{4-0}; 1052 let BI{0-1} = BIBO{5-6}; 1053 let BI{2-4} = CR{0-2}; 1054 let BH = 0; 1055} 1056 1057class XLForm_2_br2<bits<6> opcode, bits<10> xo, bits<5> bo, bit lk, 1058 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 1059 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 1060 let BO = bo; 1061 let BH = 0; 1062} 1063 1064class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk, 1065 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 1066 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 1067 let BO = bo; 1068 let BI = bi; 1069 let BH = 0; 1070} 1071 1072class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1073 InstrItinClass itin> 1074 : I<opcode, OOL, IOL, asmstr, itin> { 1075 bits<3> BF; 1076 bits<3> BFA; 1077 1078 let Inst{6-8} = BF; 1079 let Inst{9-10} = 0; 1080 let Inst{11-13} = BFA; 1081 let Inst{14-15} = 0; 1082 let Inst{16-20} = 0; 1083 let Inst{21-30} = xo; 1084 let Inst{31} = 0; 1085} 1086 1087class XLForm_4<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1088 InstrItinClass itin> 1089 : I<opcode, OOL, IOL, asmstr, itin> { 1090 bits<3> BF; 1091 bit W; 1092 bits<4> U; 1093 1094 bit RC = 0; 1095 1096 let Inst{6-8} = BF; 1097 let Inst{9-10} = 0; 1098 let Inst{11-14} = 0; 1099 let Inst{15} = W; 1100 let Inst{16-19} = U; 1101 let Inst{20} = 0; 1102 let Inst{21-30} = xo; 1103 let Inst{31} = RC; 1104} 1105 1106class XLForm_S<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1107 InstrItinClass itin, list<dag> pattern> 1108 : I<opcode, OOL, IOL, asmstr, itin> { 1109 bits<1> S; 1110 1111 let Pattern = pattern; 1112 1113 let Inst{6-19} = 0; 1114 let Inst{20} = S; 1115 let Inst{21-30} = xo; 1116 let Inst{31} = 0; 1117} 1118 1119class XLForm_2_and_DSForm_1<bits<6> opcode1, bits<10> xo1, bit lk, 1120 bits<6> opcode2, bits<2> xo2, 1121 dag OOL, dag IOL, string asmstr, 1122 InstrItinClass itin, list<dag> pattern> 1123 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> { 1124 bits<5> BO; 1125 bits<5> BI; 1126 bits<2> BH; 1127 1128 bits<5> RST; 1129 bits<19> DS_RA; 1130 1131 let Pattern = pattern; 1132 1133 let Inst{6-10} = BO; 1134 let Inst{11-15} = BI; 1135 let Inst{16-18} = 0; 1136 let Inst{19-20} = BH; 1137 let Inst{21-30} = xo1; 1138 let Inst{31} = lk; 1139 1140 let Inst{38-42} = RST; 1141 let Inst{43-47} = DS_RA{18-14}; // Register # 1142 let Inst{48-61} = DS_RA{13-0}; // Displacement. 1143 let Inst{62-63} = xo2; 1144} 1145 1146class XLForm_2_ext_and_DSForm_1<bits<6> opcode1, bits<10> xo1, 1147 bits<5> bo, bits<5> bi, bit lk, 1148 bits<6> opcode2, bits<2> xo2, 1149 dag OOL, dag IOL, string asmstr, 1150 InstrItinClass itin, list<dag> pattern> 1151 : XLForm_2_and_DSForm_1<opcode1, xo1, lk, opcode2, xo2, 1152 OOL, IOL, asmstr, itin, pattern> { 1153 let BO = bo; 1154 let BI = bi; 1155 let BH = 0; 1156} 1157 1158// 1.7.8 XFX-Form 1159class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1160 InstrItinClass itin> 1161 : I<opcode, OOL, IOL, asmstr, itin> { 1162 bits<5> RT; 1163 bits<10> SPR; 1164 1165 let Inst{6-10} = RT; 1166 let Inst{11} = SPR{4}; 1167 let Inst{12} = SPR{3}; 1168 let Inst{13} = SPR{2}; 1169 let Inst{14} = SPR{1}; 1170 let Inst{15} = SPR{0}; 1171 let Inst{16} = SPR{9}; 1172 let Inst{17} = SPR{8}; 1173 let Inst{18} = SPR{7}; 1174 let Inst{19} = SPR{6}; 1175 let Inst{20} = SPR{5}; 1176 let Inst{21-30} = xo; 1177 let Inst{31} = 0; 1178} 1179 1180class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 1181 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 1182 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> { 1183 let SPR = spr; 1184} 1185 1186class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1187 InstrItinClass itin> 1188 : I<opcode, OOL, IOL, asmstr, itin> { 1189 bits<5> RT; 1190 1191 let Inst{6-10} = RT; 1192 let Inst{11-20} = 0; 1193 let Inst{21-30} = xo; 1194 let Inst{31} = 0; 1195} 1196 1197class XFXForm_3p<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1198 InstrItinClass itin, list<dag> pattern> 1199 : I<opcode, OOL, IOL, asmstr, itin> { 1200 bits<5> RT; 1201 bits<10> Entry; 1202 let Pattern = pattern; 1203 1204 let Inst{6-10} = RT; 1205 let Inst{11-20} = Entry; 1206 let Inst{21-30} = xo; 1207 let Inst{31} = 0; 1208} 1209 1210class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1211 InstrItinClass itin> 1212 : I<opcode, OOL, IOL, asmstr, itin> { 1213 bits<8> FXM; 1214 bits<5> rS; 1215 1216 let Inst{6-10} = rS; 1217 let Inst{11} = 0; 1218 let Inst{12-19} = FXM; 1219 let Inst{20} = 0; 1220 let Inst{21-30} = xo; 1221 let Inst{31} = 0; 1222} 1223 1224class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1225 InstrItinClass itin> 1226 : I<opcode, OOL, IOL, asmstr, itin> { 1227 bits<5> ST; 1228 bits<8> FXM; 1229 1230 let Inst{6-10} = ST; 1231 let Inst{11} = 1; 1232 let Inst{12-19} = FXM; 1233 let Inst{20} = 0; 1234 let Inst{21-30} = xo; 1235 let Inst{31} = 0; 1236} 1237 1238class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1239 InstrItinClass itin> 1240 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>; 1241 1242class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 1243 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 1244 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> { 1245 let SPR = spr; 1246} 1247 1248// XFL-Form - MTFSF 1249// This is probably 1.7.9, but I don't have the reference that uses this 1250// numbering scheme... 1251class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1252 InstrItinClass itin, list<dag>pattern> 1253 : I<opcode, OOL, IOL, asmstr, itin> { 1254 bits<8> FM; 1255 bits<5> rT; 1256 1257 bit RC = 0; // set by isDOT 1258 let Pattern = pattern; 1259 1260 let Inst{6} = 0; 1261 let Inst{7-14} = FM; 1262 let Inst{15} = 0; 1263 let Inst{16-20} = rT; 1264 let Inst{21-30} = xo; 1265 let Inst{31} = RC; 1266} 1267 1268class XFLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1269 InstrItinClass itin, list<dag>pattern> 1270 : I<opcode, OOL, IOL, asmstr, itin> { 1271 bit L; 1272 bits<8> FLM; 1273 bit W; 1274 bits<5> FRB; 1275 1276 bit RC = 0; // set by isDOT 1277 let Pattern = pattern; 1278 1279 let Inst{6} = L; 1280 let Inst{7-14} = FLM; 1281 let Inst{15} = W; 1282 let Inst{16-20} = FRB; 1283 let Inst{21-30} = xo; 1284 let Inst{31} = RC; 1285} 1286 1287// 1.7.10 XS-Form - SRADI. 1288class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 1289 InstrItinClass itin, list<dag> pattern> 1290 : I<opcode, OOL, IOL, asmstr, itin> { 1291 bits<5> A; 1292 bits<5> RS; 1293 bits<6> SH; 1294 1295 bit RC = 0; // set by isDOT 1296 let Pattern = pattern; 1297 1298 let Inst{6-10} = RS; 1299 let Inst{11-15} = A; 1300 let Inst{16-20} = SH{4,3,2,1,0}; 1301 let Inst{21-29} = xo; 1302 let Inst{30} = SH{5}; 1303 let Inst{31} = RC; 1304} 1305 1306// 1.7.11 XO-Form 1307class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr, 1308 InstrItinClass itin, list<dag> pattern> 1309 : I<opcode, OOL, IOL, asmstr, itin> { 1310 bits<5> RT; 1311 bits<5> RA; 1312 bits<5> RB; 1313 1314 let Pattern = pattern; 1315 1316 bit RC = 0; // set by isDOT 1317 1318 let Inst{6-10} = RT; 1319 let Inst{11-15} = RA; 1320 let Inst{16-20} = RB; 1321 let Inst{21} = oe; 1322 let Inst{22-30} = xo; 1323 let Inst{31} = RC; 1324} 1325 1326class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, 1327 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 1328 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> { 1329 let RB = 0; 1330} 1331 1332// 1.7.12 A-Form 1333class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1334 InstrItinClass itin, list<dag> pattern> 1335 : I<opcode, OOL, IOL, asmstr, itin> { 1336 bits<5> FRT; 1337 bits<5> FRA; 1338 bits<5> FRC; 1339 bits<5> FRB; 1340 1341 let Pattern = pattern; 1342 1343 bit RC = 0; // set by isDOT 1344 1345 let Inst{6-10} = FRT; 1346 let Inst{11-15} = FRA; 1347 let Inst{16-20} = FRB; 1348 let Inst{21-25} = FRC; 1349 let Inst{26-30} = xo; 1350 let Inst{31} = RC; 1351} 1352 1353class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1354 InstrItinClass itin, list<dag> pattern> 1355 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 1356 let FRC = 0; 1357} 1358 1359class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1360 InstrItinClass itin, list<dag> pattern> 1361 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 1362 let FRB = 0; 1363} 1364 1365class AForm_4<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1366 InstrItinClass itin, list<dag> pattern> 1367 : I<opcode, OOL, IOL, asmstr, itin> { 1368 bits<5> RT; 1369 bits<5> RA; 1370 bits<5> RB; 1371 bits<5> COND; 1372 1373 let Pattern = pattern; 1374 1375 let Inst{6-10} = RT; 1376 let Inst{11-15} = RA; 1377 let Inst{16-20} = RB; 1378 let Inst{21-25} = COND; 1379 let Inst{26-30} = xo; 1380 let Inst{31} = 0; 1381} 1382 1383// Used for QPX 1384class AForm_4a<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1385 InstrItinClass itin, list<dag> pattern> 1386 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 1387 let FRA = 0; 1388 let FRC = 0; 1389} 1390 1391// 1.7.13 M-Form 1392class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 1393 InstrItinClass itin, list<dag> pattern> 1394 : I<opcode, OOL, IOL, asmstr, itin> { 1395 bits<5> RA; 1396 bits<5> RS; 1397 bits<5> RB; 1398 bits<5> MB; 1399 bits<5> ME; 1400 1401 let Pattern = pattern; 1402 1403 bit RC = 0; // set by isDOT 1404 1405 let Inst{6-10} = RS; 1406 let Inst{11-15} = RA; 1407 let Inst{16-20} = RB; 1408 let Inst{21-25} = MB; 1409 let Inst{26-30} = ME; 1410 let Inst{31} = RC; 1411} 1412 1413class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 1414 InstrItinClass itin, list<dag> pattern> 1415 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 1416} 1417 1418// 1.7.14 MD-Form 1419class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr, 1420 InstrItinClass itin, list<dag> pattern> 1421 : I<opcode, OOL, IOL, asmstr, itin> { 1422 bits<5> RA; 1423 bits<5> RS; 1424 bits<6> SH; 1425 bits<6> MBE; 1426 1427 let Pattern = pattern; 1428 1429 bit RC = 0; // set by isDOT 1430 1431 let Inst{6-10} = RS; 1432 let Inst{11-15} = RA; 1433 let Inst{16-20} = SH{4,3,2,1,0}; 1434 let Inst{21-26} = MBE{4,3,2,1,0,5}; 1435 let Inst{27-29} = xo; 1436 let Inst{30} = SH{5}; 1437 let Inst{31} = RC; 1438} 1439 1440class MDSForm_1<bits<6> opcode, bits<4> xo, dag OOL, dag IOL, string asmstr, 1441 InstrItinClass itin, list<dag> pattern> 1442 : I<opcode, OOL, IOL, asmstr, itin> { 1443 bits<5> RA; 1444 bits<5> RS; 1445 bits<5> RB; 1446 bits<6> MBE; 1447 1448 let Pattern = pattern; 1449 1450 bit RC = 0; // set by isDOT 1451 1452 let Inst{6-10} = RS; 1453 let Inst{11-15} = RA; 1454 let Inst{16-20} = RB; 1455 let Inst{21-26} = MBE{4,3,2,1,0,5}; 1456 let Inst{27-30} = xo; 1457 let Inst{31} = RC; 1458} 1459 1460 1461// E-1 VA-Form 1462 1463// VAForm_1 - DACB ordering. 1464class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr, 1465 InstrItinClass itin, list<dag> pattern> 1466 : I<4, OOL, IOL, asmstr, itin> { 1467 bits<5> VD; 1468 bits<5> VA; 1469 bits<5> VC; 1470 bits<5> VB; 1471 1472 let Pattern = pattern; 1473 1474 let Inst{6-10} = VD; 1475 let Inst{11-15} = VA; 1476 let Inst{16-20} = VB; 1477 let Inst{21-25} = VC; 1478 let Inst{26-31} = xo; 1479} 1480 1481// VAForm_1a - DABC ordering. 1482class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr, 1483 InstrItinClass itin, list<dag> pattern> 1484 : I<4, OOL, IOL, asmstr, itin> { 1485 bits<5> VD; 1486 bits<5> VA; 1487 bits<5> VB; 1488 bits<5> VC; 1489 1490 let Pattern = pattern; 1491 1492 let Inst{6-10} = VD; 1493 let Inst{11-15} = VA; 1494 let Inst{16-20} = VB; 1495 let Inst{21-25} = VC; 1496 let Inst{26-31} = xo; 1497} 1498 1499class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr, 1500 InstrItinClass itin, list<dag> pattern> 1501 : I<4, OOL, IOL, asmstr, itin> { 1502 bits<5> VD; 1503 bits<5> VA; 1504 bits<5> VB; 1505 bits<4> SH; 1506 1507 let Pattern = pattern; 1508 1509 let Inst{6-10} = VD; 1510 let Inst{11-15} = VA; 1511 let Inst{16-20} = VB; 1512 let Inst{21} = 0; 1513 let Inst{22-25} = SH; 1514 let Inst{26-31} = xo; 1515} 1516 1517// E-2 VX-Form 1518class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr, 1519 InstrItinClass itin, list<dag> pattern> 1520 : I<4, OOL, IOL, asmstr, itin> { 1521 bits<5> VD; 1522 bits<5> VA; 1523 bits<5> VB; 1524 1525 let Pattern = pattern; 1526 1527 let Inst{6-10} = VD; 1528 let Inst{11-15} = VA; 1529 let Inst{16-20} = VB; 1530 let Inst{21-31} = xo; 1531} 1532 1533class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr, 1534 InstrItinClass itin, list<dag> pattern> 1535 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> { 1536 let VA = VD; 1537 let VB = VD; 1538} 1539 1540 1541class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr, 1542 InstrItinClass itin, list<dag> pattern> 1543 : I<4, OOL, IOL, asmstr, itin> { 1544 bits<5> VD; 1545 bits<5> VB; 1546 1547 let Pattern = pattern; 1548 1549 let Inst{6-10} = VD; 1550 let Inst{11-15} = 0; 1551 let Inst{16-20} = VB; 1552 let Inst{21-31} = xo; 1553} 1554 1555class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr, 1556 InstrItinClass itin, list<dag> pattern> 1557 : I<4, OOL, IOL, asmstr, itin> { 1558 bits<5> VD; 1559 bits<5> IMM; 1560 1561 let Pattern = pattern; 1562 1563 let Inst{6-10} = VD; 1564 let Inst{11-15} = IMM; 1565 let Inst{16-20} = 0; 1566 let Inst{21-31} = xo; 1567} 1568 1569/// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr. 1570class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr, 1571 InstrItinClass itin, list<dag> pattern> 1572 : I<4, OOL, IOL, asmstr, itin> { 1573 bits<5> VD; 1574 1575 let Pattern = pattern; 1576 1577 let Inst{6-10} = VD; 1578 let Inst{11-15} = 0; 1579 let Inst{16-20} = 0; 1580 let Inst{21-31} = xo; 1581} 1582 1583/// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr. 1584class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr, 1585 InstrItinClass itin, list<dag> pattern> 1586 : I<4, OOL, IOL, asmstr, itin> { 1587 bits<5> VB; 1588 1589 let Pattern = pattern; 1590 1591 let Inst{6-10} = 0; 1592 let Inst{11-15} = 0; 1593 let Inst{16-20} = VB; 1594 let Inst{21-31} = xo; 1595} 1596 1597/// VXForm_CR - VX crypto instructions with "VRT, VRA, ST, SIX" 1598class VXForm_CR<bits<11> xo, dag OOL, dag IOL, string asmstr, 1599 InstrItinClass itin, list<dag> pattern> 1600 : I<4, OOL, IOL, asmstr, itin> { 1601 bits<5> VD; 1602 bits<5> VA; 1603 bits<1> ST; 1604 bits<4> SIX; 1605 1606 let Pattern = pattern; 1607 1608 let Inst{6-10} = VD; 1609 let Inst{11-15} = VA; 1610 let Inst{16} = ST; 1611 let Inst{17-20} = SIX; 1612 let Inst{21-31} = xo; 1613} 1614 1615/// VXForm_BX - VX crypto instructions with "VRT, VRA, 0 - like vsbox" 1616class VXForm_BX<bits<11> xo, dag OOL, dag IOL, string asmstr, 1617 InstrItinClass itin, list<dag> pattern> 1618 : I<4, OOL, IOL, asmstr, itin> { 1619 bits<5> VD; 1620 bits<5> VA; 1621 1622 let Pattern = pattern; 1623 1624 let Inst{6-10} = VD; 1625 let Inst{11-15} = VA; 1626 let Inst{16-20} = 0; 1627 let Inst{21-31} = xo; 1628} 1629 1630// E-4 VXR-Form 1631class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr, 1632 InstrItinClass itin, list<dag> pattern> 1633 : I<4, OOL, IOL, asmstr, itin> { 1634 bits<5> VD; 1635 bits<5> VA; 1636 bits<5> VB; 1637 bit RC = 0; 1638 1639 let Pattern = pattern; 1640 1641 let Inst{6-10} = VD; 1642 let Inst{11-15} = VA; 1643 let Inst{16-20} = VB; 1644 let Inst{21} = RC; 1645 let Inst{22-31} = xo; 1646} 1647 1648// Z23-Form (used by QPX) 1649class Z23Form_1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 1650 InstrItinClass itin, list<dag> pattern> 1651 : I<opcode, OOL, IOL, asmstr, itin> { 1652 bits<5> FRT; 1653 bits<5> FRA; 1654 bits<5> FRB; 1655 bits<2> idx; 1656 1657 let Pattern = pattern; 1658 1659 bit RC = 0; // set by isDOT 1660 1661 let Inst{6-10} = FRT; 1662 let Inst{11-15} = FRA; 1663 let Inst{16-20} = FRB; 1664 let Inst{21-22} = idx; 1665 let Inst{23-30} = xo; 1666 let Inst{31} = RC; 1667} 1668 1669class Z23Form_2<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 1670 InstrItinClass itin, list<dag> pattern> 1671 : Z23Form_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 1672 let FRB = 0; 1673} 1674 1675class Z23Form_3<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 1676 InstrItinClass itin, list<dag> pattern> 1677 : I<opcode, OOL, IOL, asmstr, itin> { 1678 bits<5> FRT; 1679 bits<12> idx; 1680 1681 let Pattern = pattern; 1682 1683 bit RC = 0; // set by isDOT 1684 1685 let Inst{6-10} = FRT; 1686 let Inst{11-22} = idx; 1687 let Inst{23-30} = xo; 1688 let Inst{31} = RC; 1689} 1690 1691//===----------------------------------------------------------------------===// 1692class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern> 1693 : I<0, OOL, IOL, asmstr, NoItinerary> { 1694 let isCodeGenOnly = 1; 1695 let PPC64 = 0; 1696 let Pattern = pattern; 1697 let Inst{31-0} = 0; 1698} 1699