1//===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// 12// PowerPC instruction formats 13 14class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 15 : Instruction { 16 field bits<32> Inst; 17 field bits<32> SoftFail = 0; 18 let Size = 4; 19 20 bit PPC64 = 0; // Default value, override with isPPC64 21 22 let Namespace = "PPC"; 23 let Inst{0-5} = opcode; 24 let OutOperandList = OOL; 25 let InOperandList = IOL; 26 let AsmString = asmstr; 27 let Itinerary = itin; 28 29 bits<1> PPC970_First = 0; 30 bits<1> PPC970_Single = 0; 31 bits<1> PPC970_Cracked = 0; 32 bits<3> PPC970_Unit = 0; 33 34 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to 35 /// these must be reflected there! See comments there for what these are. 36 let TSFlags{0} = PPC970_First; 37 let TSFlags{1} = PPC970_Single; 38 let TSFlags{2} = PPC970_Cracked; 39 let TSFlags{5-3} = PPC970_Unit; 40 41 // Fields used for relation models. 42 string BaseName = ""; 43 44 // For cases where multiple instruction definitions really represent the 45 // same underlying instruction but with one definition for 64-bit arguments 46 // and one for 32-bit arguments, this bit breaks the degeneracy between 47 // the two forms and allows TableGen to generate mapping tables. 48 bit Interpretation64Bit = 0; 49} 50 51class PPC970_DGroup_First { bits<1> PPC970_First = 1; } 52class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; } 53class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; } 54class PPC970_MicroCode; 55 56class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; } 57class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; } 58class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; } 59class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; } 60class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; } 61class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; } 62class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; } 63class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; } 64 65// Two joined instructions; used to emit two adjacent instructions as one. 66// The itinerary from the first instruction is used for scheduling and 67// classification. 68class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr, 69 InstrItinClass itin> 70 : Instruction { 71 field bits<64> Inst; 72 field bits<64> SoftFail = 0; 73 let Size = 8; 74 75 bit PPC64 = 0; // Default value, override with isPPC64 76 77 let Namespace = "PPC"; 78 let Inst{0-5} = opcode1; 79 let Inst{32-37} = opcode2; 80 let OutOperandList = OOL; 81 let InOperandList = IOL; 82 let AsmString = asmstr; 83 let Itinerary = itin; 84 85 bits<1> PPC970_First = 0; 86 bits<1> PPC970_Single = 0; 87 bits<1> PPC970_Cracked = 0; 88 bits<3> PPC970_Unit = 0; 89 90 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to 91 /// these must be reflected there! See comments there for what these are. 92 let TSFlags{0} = PPC970_First; 93 let TSFlags{1} = PPC970_Single; 94 let TSFlags{2} = PPC970_Cracked; 95 let TSFlags{5-3} = PPC970_Unit; 96 97 // Fields used for relation models. 98 string BaseName = ""; 99 bit Interpretation64Bit = 0; 100} 101 102// 1.7.1 I-Form 103class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 104 InstrItinClass itin, list<dag> pattern> 105 : I<opcode, OOL, IOL, asmstr, itin> { 106 let Pattern = pattern; 107 bits<24> LI; 108 109 let Inst{6-29} = LI; 110 let Inst{30} = aa; 111 let Inst{31} = lk; 112} 113 114// 1.7.2 B-Form 115class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr> 116 : I<opcode, OOL, IOL, asmstr, IIC_BrB> { 117 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 118 bits<3> CR; 119 bits<14> BD; 120 121 bits<5> BI; 122 let BI{0-1} = BIBO{5-6}; 123 let BI{2-4} = CR{0-2}; 124 125 let Inst{6-10} = BIBO{4-0}; 126 let Inst{11-15} = BI; 127 let Inst{16-29} = BD; 128 let Inst{30} = aa; 129 let Inst{31} = lk; 130} 131 132class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL, 133 string asmstr> 134 : BForm<opcode, aa, lk, OOL, IOL, asmstr> { 135 let BIBO{4-0} = bo; 136 let BIBO{6-5} = 0; 137 let CR = 0; 138} 139 140class BForm_2<bits<6> opcode, bits<5> bo, bits<5> bi, bit aa, bit lk, 141 dag OOL, dag IOL, string asmstr> 142 : I<opcode, OOL, IOL, asmstr, IIC_BrB> { 143 bits<14> BD; 144 145 let Inst{6-10} = bo; 146 let Inst{11-15} = bi; 147 let Inst{16-29} = BD; 148 let Inst{30} = aa; 149 let Inst{31} = lk; 150} 151 152class BForm_3<bits<6> opcode, bit aa, bit lk, 153 dag OOL, dag IOL, string asmstr> 154 : I<opcode, OOL, IOL, asmstr, IIC_BrB> { 155 bits<5> BO; 156 bits<5> BI; 157 bits<14> BD; 158 159 let Inst{6-10} = BO; 160 let Inst{11-15} = BI; 161 let Inst{16-29} = BD; 162 let Inst{30} = aa; 163 let Inst{31} = lk; 164} 165 166class BForm_4<bits<6> opcode, bits<5> bo, bit aa, bit lk, 167 dag OOL, dag IOL, string asmstr> 168 : I<opcode, OOL, IOL, asmstr, IIC_BrB> { 169 bits<5> BI; 170 bits<14> BD; 171 172 let Inst{6-10} = bo; 173 let Inst{11-15} = BI; 174 let Inst{16-29} = BD; 175 let Inst{30} = aa; 176 let Inst{31} = lk; 177} 178 179// 1.7.3 SC-Form 180class SCForm<bits<6> opcode, bits<1> xo, 181 dag OOL, dag IOL, string asmstr, InstrItinClass itin, 182 list<dag> pattern> 183 : I<opcode, OOL, IOL, asmstr, itin> { 184 bits<7> LEV; 185 186 let Pattern = pattern; 187 188 let Inst{20-26} = LEV; 189 let Inst{30} = xo; 190} 191 192// 1.7.4 D-Form 193class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr, 194 InstrItinClass itin, list<dag> pattern> 195 : I<opcode, OOL, IOL, asmstr, itin> { 196 bits<5> A; 197 bits<5> B; 198 bits<16> C; 199 200 let Pattern = pattern; 201 202 let Inst{6-10} = A; 203 let Inst{11-15} = B; 204 let Inst{16-31} = C; 205} 206 207class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 208 InstrItinClass itin, list<dag> pattern> 209 : I<opcode, OOL, IOL, asmstr, itin> { 210 bits<5> A; 211 bits<21> Addr; 212 213 let Pattern = pattern; 214 215 let Inst{6-10} = A; 216 let Inst{11-15} = Addr{20-16}; // Base Reg 217 let Inst{16-31} = Addr{15-0}; // Displacement 218} 219 220class DForm_1a<bits<6> opcode, dag OOL, dag IOL, string asmstr, 221 InstrItinClass itin, list<dag> pattern> 222 : I<opcode, OOL, IOL, asmstr, itin> { 223 bits<5> A; 224 bits<16> C; 225 bits<5> B; 226 227 let Pattern = pattern; 228 229 let Inst{6-10} = A; 230 let Inst{11-15} = B; 231 let Inst{16-31} = C; 232} 233 234 235class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 236 InstrItinClass itin, list<dag> pattern> 237 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern> { 238 239 // Even though ADDICo does not really have an RC bit, provide 240 // the declaration of one here so that isDOT has something to set. 241 bit RC = 0; 242} 243 244class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr, 245 InstrItinClass itin, list<dag> pattern> 246 : I<opcode, OOL, IOL, asmstr, itin> { 247 bits<5> A; 248 bits<16> B; 249 250 let Pattern = pattern; 251 252 let Inst{6-10} = A; 253 let Inst{11-15} = 0; 254 let Inst{16-31} = B; 255} 256 257class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr, 258 InstrItinClass itin, list<dag> pattern> 259 : I<opcode, OOL, IOL, asmstr, itin> { 260 bits<5> B; 261 bits<5> A; 262 bits<16> C; 263 264 let Pattern = pattern; 265 266 let Inst{6-10} = A; 267 let Inst{11-15} = B; 268 let Inst{16-31} = C; 269} 270 271class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr, 272 InstrItinClass itin, list<dag> pattern> 273 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 274 let A = 0; 275 let Addr = 0; 276} 277 278class DForm_4_fixedreg_zero<bits<6> opcode, bits<5> R, dag OOL, dag IOL, 279 string asmstr, InstrItinClass itin, 280 list<dag> pattern> 281 : DForm_4<opcode, OOL, IOL, asmstr, itin, pattern> { 282 let A = R; 283 let B = R; 284 let C = 0; 285} 286 287class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2, 288 dag OOL, dag IOL, string asmstr, 289 InstrItinClass itin, list<dag> pattern> 290 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> { 291 bits<5> A; 292 bits<21> Addr; 293 294 let Pattern = pattern; 295 bits<24> LI; 296 297 let Inst{6-29} = LI; 298 let Inst{30} = aa; 299 let Inst{31} = lk; 300 301 let Inst{38-42} = A; 302 let Inst{43-47} = Addr{20-16}; // Base Reg 303 let Inst{48-63} = Addr{15-0}; // Displacement 304} 305 306// This is used to emit BL8+NOP. 307class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2, 308 dag OOL, dag IOL, string asmstr, 309 InstrItinClass itin, list<dag> pattern> 310 : IForm_and_DForm_1<opcode1, aa, lk, opcode2, 311 OOL, IOL, asmstr, itin, pattern> { 312 let A = 0; 313 let Addr = 0; 314} 315 316class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr, 317 InstrItinClass itin> 318 : I<opcode, OOL, IOL, asmstr, itin> { 319 bits<3> BF; 320 bits<1> L; 321 bits<5> RA; 322 bits<16> I; 323 324 let Inst{6-8} = BF; 325 let Inst{9} = 0; 326 let Inst{10} = L; 327 let Inst{11-15} = RA; 328 let Inst{16-31} = I; 329} 330 331class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 332 InstrItinClass itin> 333 : DForm_5<opcode, OOL, IOL, asmstr, itin> { 334 let L = PPC64; 335} 336 337class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr, 338 InstrItinClass itin> 339 : DForm_5<opcode, OOL, IOL, asmstr, itin>; 340 341class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 342 InstrItinClass itin> 343 : DForm_6<opcode, OOL, IOL, asmstr, itin> { 344 let L = PPC64; 345} 346 347 348// 1.7.5 DS-Form 349class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 350 InstrItinClass itin, list<dag> pattern> 351 : I<opcode, OOL, IOL, asmstr, itin> { 352 bits<5> RST; 353 bits<19> DS_RA; 354 355 let Pattern = pattern; 356 357 let Inst{6-10} = RST; 358 let Inst{11-15} = DS_RA{18-14}; // Register # 359 let Inst{16-29} = DS_RA{13-0}; // Displacement. 360 let Inst{30-31} = xo; 361} 362 363 364// 1.7.6 X-Form 365class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 366 InstrItinClass itin, list<dag> pattern> 367 : I<opcode, OOL, IOL, asmstr, itin> { 368 bits<5> RST; 369 bits<5> A; 370 bits<5> B; 371 372 let Pattern = pattern; 373 374 bit RC = 0; // set by isDOT 375 376 let Inst{6-10} = RST; 377 let Inst{11-15} = A; 378 let Inst{16-20} = B; 379 let Inst{21-30} = xo; 380 let Inst{31} = RC; 381} 382 383class XForm_tlb<bits<10> xo, dag OOL, dag IOL, string asmstr, 384 InstrItinClass itin> : XForm_base_r3xo<31, xo, OOL, IOL, asmstr, itin, []> { 385 let RST = 0; 386} 387 388class XForm_attn<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 389 InstrItinClass itin> 390 : I<opcode, OOL, IOL, asmstr, itin> { 391 let Inst{21-30} = xo; 392} 393 394// This is the same as XForm_base_r3xo, but the first two operands are swapped 395// when code is emitted. 396class XForm_base_r3xo_swapped 397 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 398 InstrItinClass itin> 399 : I<opcode, OOL, IOL, asmstr, itin> { 400 bits<5> A; 401 bits<5> RST; 402 bits<5> B; 403 404 bit RC = 0; // set by isDOT 405 406 let Inst{6-10} = RST; 407 let Inst{11-15} = A; 408 let Inst{16-20} = B; 409 let Inst{21-30} = xo; 410 let Inst{31} = RC; 411} 412 413 414class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 415 InstrItinClass itin, list<dag> pattern> 416 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 417 418class XForm_1a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 419 InstrItinClass itin, list<dag> pattern> 420 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 421 let RST = 0; 422} 423 424class XForm_rs<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 425 InstrItinClass itin, list<dag> pattern> 426 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 427 let A = 0; 428 let B = 0; 429} 430 431class XForm_tlbws<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 432 InstrItinClass itin, list<dag> pattern> 433 : I<opcode, OOL, IOL, asmstr, itin> { 434 bits<5> RST; 435 bits<5> A; 436 bits<1> WS; 437 438 let Pattern = pattern; 439 440 let Inst{6-10} = RST; 441 let Inst{11-15} = A; 442 let Inst{20} = WS; 443 let Inst{21-30} = xo; 444 let Inst{31} = 0; 445} 446 447class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 448 InstrItinClass itin, list<dag> pattern> 449 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 450 let Pattern = pattern; 451} 452 453class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 454 InstrItinClass itin, list<dag> pattern> 455 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 456 457class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 458 InstrItinClass itin, list<dag> pattern> 459 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 460 let Pattern = pattern; 461} 462 463class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 464 InstrItinClass itin, list<dag> pattern> 465 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 466 let B = 0; 467 let Pattern = pattern; 468} 469 470class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 471 InstrItinClass itin> 472 : I<opcode, OOL, IOL, asmstr, itin> { 473 bits<3> BF; 474 bits<1> L; 475 bits<5> RA; 476 bits<5> RB; 477 478 let Inst{6-8} = BF; 479 let Inst{9} = 0; 480 let Inst{10} = L; 481 let Inst{11-15} = RA; 482 let Inst{16-20} = RB; 483 let Inst{21-30} = xo; 484 let Inst{31} = 0; 485} 486 487class XForm_icbt<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 488 InstrItinClass itin> 489 : I<opcode, OOL, IOL, asmstr, itin> { 490 bits<4> CT; 491 bits<5> RA; 492 bits<5> RB; 493 494 let Inst{6} = 0; 495 let Inst{7-10} = CT; 496 let Inst{11-15} = RA; 497 let Inst{16-20} = RB; 498 let Inst{21-30} = xo; 499 let Inst{31} = 0; 500} 501 502class XForm_sr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 503 InstrItinClass itin> 504 : I<opcode, OOL, IOL, asmstr, itin> { 505 bits<5> RS; 506 bits<4> SR; 507 508 let Inst{6-10} = RS; 509 let Inst{12-15} = SR; 510 let Inst{21-30} = xo; 511} 512 513class XForm_mbar<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 514 InstrItinClass itin> 515 : I<opcode, OOL, IOL, asmstr, itin> { 516 bits<5> MO; 517 518 let Inst{6-10} = MO; 519 let Inst{21-30} = xo; 520} 521 522class XForm_srin<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 523 InstrItinClass itin> 524 : I<opcode, OOL, IOL, asmstr, itin> { 525 bits<5> RS; 526 bits<5> RB; 527 528 let Inst{6-10} = RS; 529 let Inst{16-20} = RB; 530 let Inst{21-30} = xo; 531} 532 533class XForm_mtmsr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 534 InstrItinClass itin> 535 : I<opcode, OOL, IOL, asmstr, itin> { 536 bits<5> RS; 537 bits<1> L; 538 539 let Inst{6-10} = RS; 540 let Inst{15} = L; 541 let Inst{21-30} = xo; 542} 543 544class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 545 InstrItinClass itin> 546 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> { 547 let L = PPC64; 548} 549 550class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 551 InstrItinClass itin> 552 : I<opcode, OOL, IOL, asmstr, itin> { 553 bits<3> BF; 554 bits<5> FRA; 555 bits<5> FRB; 556 557 let Inst{6-8} = BF; 558 let Inst{9-10} = 0; 559 let Inst{11-15} = FRA; 560 let Inst{16-20} = FRB; 561 let Inst{21-30} = xo; 562 let Inst{31} = 0; 563} 564 565// Used for QPX 566class XForm_18<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 567 InstrItinClass itin, list<dag> pattern> 568 : I<opcode, OOL, IOL, asmstr, itin> { 569 bits<5> FRT; 570 bits<5> FRA; 571 bits<5> FRB; 572 573 let Pattern = pattern; 574 575 let Inst{6-10} = FRT; 576 let Inst{11-15} = FRA; 577 let Inst{16-20} = FRB; 578 let Inst{21-30} = xo; 579 let Inst{31} = 0; 580} 581 582class XForm_19<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 583 InstrItinClass itin, list<dag> pattern> 584 : XForm_18<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 585 let FRA = 0; 586} 587 588class XForm_20<bits<6> opcode, bits<6> xo, dag OOL, dag IOL, string asmstr, 589 InstrItinClass itin, list<dag> pattern> 590 : I<opcode, OOL, IOL, asmstr, itin> { 591 bits<5> FRT; 592 bits<5> FRA; 593 bits<5> FRB; 594 bits<4> tttt; 595 596 let Pattern = pattern; 597 598 let Inst{6-10} = FRT; 599 let Inst{11-15} = FRA; 600 let Inst{16-20} = FRB; 601 let Inst{21-24} = tttt; 602 let Inst{25-30} = xo; 603 let Inst{31} = 0; 604} 605 606class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 607 InstrItinClass itin, list<dag> pattern> 608 : I<opcode, OOL, IOL, asmstr, itin> { 609 let Pattern = pattern; 610 let Inst{6-10} = 31; 611 let Inst{11-15} = 0; 612 let Inst{16-20} = 0; 613 let Inst{21-30} = xo; 614 let Inst{31} = 0; 615} 616 617class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 618 string asmstr, InstrItinClass itin, list<dag> pattern> 619 : I<opcode, OOL, IOL, asmstr, itin> { 620 bits<2> L; 621 622 let Pattern = pattern; 623 let Inst{6-8} = 0; 624 let Inst{9-10} = L; 625 let Inst{11-15} = 0; 626 let Inst{16-20} = 0; 627 let Inst{21-30} = xo; 628 let Inst{31} = 0; 629} 630 631class XForm_24_eieio<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 632 string asmstr, InstrItinClass itin, list<dag> pattern> 633 : XForm_24_sync<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 634 let L = 0; 635} 636 637class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 638 InstrItinClass itin, list<dag> pattern> 639 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 640} 641 642class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 643 InstrItinClass itin, list<dag> pattern> 644 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 645 let A = 0; 646} 647 648class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 649 InstrItinClass itin, list<dag> pattern> 650 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 651} 652 653// This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of 654// numbers presumably relates to some document, but I haven't found it. 655class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 656 InstrItinClass itin, list<dag> pattern> 657 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 658 let Pattern = pattern; 659 660 bit RC = 0; // set by isDOT 661 662 let Inst{6-10} = RST; 663 let Inst{11-20} = 0; 664 let Inst{21-30} = xo; 665 let Inst{31} = RC; 666} 667class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 668 InstrItinClass itin, list<dag> pattern> 669 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 670 let Pattern = pattern; 671 bits<5> FM; 672 673 bit RC = 0; // set by isDOT 674 675 let Inst{6-10} = FM; 676 let Inst{11-20} = 0; 677 let Inst{21-30} = xo; 678 let Inst{31} = RC; 679} 680 681class XForm_0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 682 InstrItinClass itin, list<dag> pattern> 683 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 684 let RST = 0; 685 let A = 0; 686 let B = 0; 687} 688 689class XForm_16b<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 690 InstrItinClass itin, list<dag> pattern> 691 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 692 let RST = 0; 693 let A = 0; 694} 695 696class XForm_htm0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 697 string asmstr, InstrItinClass itin, list<dag> pattern> 698 : I<opcode, OOL, IOL, asmstr, itin> { 699 bit R; 700 701 bit RC = 1; 702 703 let Inst{6-9} = 0; 704 let Inst{10} = R; 705 let Inst{11-20} = 0; 706 let Inst{21-30} = xo; 707 let Inst{31} = RC; 708} 709 710class XForm_htm1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 711 string asmstr, InstrItinClass itin, list<dag> pattern> 712 : I<opcode, OOL, IOL, asmstr, itin> { 713 bit A; 714 715 bit RC = 1; 716 717 let Inst{6} = A; 718 let Inst{7-20} = 0; 719 let Inst{21-30} = xo; 720 let Inst{31} = RC; 721} 722 723class XForm_htm2<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 724 InstrItinClass itin, list<dag> pattern> 725 : I<opcode, OOL, IOL, asmstr, itin> { 726 bit L; 727 728 bit RC = 0; // set by isDOT 729 730 let Inst{7-9} = 0; 731 let Inst{10} = L; 732 let Inst{11-20} = 0; 733 let Inst{21-30} = xo; 734 let Inst{31} = RC; 735} 736 737class XForm_htm3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 738 InstrItinClass itin, list<dag> pattern> 739 : I<opcode, OOL, IOL, asmstr, itin> { 740 bits<3> BF; 741 742 bit RC = 0; 743 744 let Inst{6-8} = BF; 745 let Inst{9-20} = 0; 746 let Inst{21-30} = xo; 747 let Inst{31} = RC; 748} 749 750// XX*-Form (VSX) 751class XX1Form<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 752 InstrItinClass itin, list<dag> pattern> 753 : I<opcode, OOL, IOL, asmstr, itin> { 754 bits<6> XT; 755 bits<5> A; 756 bits<5> B; 757 758 let Pattern = pattern; 759 760 let Inst{6-10} = XT{4-0}; 761 let Inst{11-15} = A; 762 let Inst{16-20} = B; 763 let Inst{21-30} = xo; 764 let Inst{31} = XT{5}; 765} 766 767class XX1_RS6_RD5_XO<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 768 string asmstr, InstrItinClass itin, list<dag> pattern> 769 : XX1Form<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 770 let B = 0; 771} 772 773class XX2Form<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 774 InstrItinClass itin, list<dag> pattern> 775 : I<opcode, OOL, IOL, asmstr, itin> { 776 bits<6> XT; 777 bits<6> XB; 778 779 let Pattern = pattern; 780 781 let Inst{6-10} = XT{4-0}; 782 let Inst{11-15} = 0; 783 let Inst{16-20} = XB{4-0}; 784 let Inst{21-29} = xo; 785 let Inst{30} = XB{5}; 786 let Inst{31} = XT{5}; 787} 788 789class XX2Form_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 790 InstrItinClass itin, list<dag> pattern> 791 : I<opcode, OOL, IOL, asmstr, itin> { 792 bits<3> CR; 793 bits<6> XB; 794 795 let Pattern = pattern; 796 797 let Inst{6-8} = CR; 798 let Inst{9-15} = 0; 799 let Inst{16-20} = XB{4-0}; 800 let Inst{21-29} = xo; 801 let Inst{30} = XB{5}; 802 let Inst{31} = 0; 803} 804 805class XX2Form_2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 806 InstrItinClass itin, list<dag> pattern> 807 : I<opcode, OOL, IOL, asmstr, itin> { 808 bits<6> XT; 809 bits<6> XB; 810 bits<2> D; 811 812 let Pattern = pattern; 813 814 let Inst{6-10} = XT{4-0}; 815 let Inst{11-13} = 0; 816 let Inst{14-15} = D; 817 let Inst{16-20} = XB{4-0}; 818 let Inst{21-29} = xo; 819 let Inst{30} = XB{5}; 820 let Inst{31} = XT{5}; 821} 822 823class XX3Form<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 824 InstrItinClass itin, list<dag> pattern> 825 : I<opcode, OOL, IOL, asmstr, itin> { 826 bits<6> XT; 827 bits<6> XA; 828 bits<6> XB; 829 830 let Pattern = pattern; 831 832 let Inst{6-10} = XT{4-0}; 833 let Inst{11-15} = XA{4-0}; 834 let Inst{16-20} = XB{4-0}; 835 let Inst{21-28} = xo; 836 let Inst{29} = XA{5}; 837 let Inst{30} = XB{5}; 838 let Inst{31} = XT{5}; 839} 840 841class XX3Form_1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 842 InstrItinClass itin, list<dag> pattern> 843 : I<opcode, OOL, IOL, asmstr, itin> { 844 bits<3> CR; 845 bits<6> XA; 846 bits<6> XB; 847 848 let Pattern = pattern; 849 850 let Inst{6-8} = CR; 851 let Inst{9-10} = 0; 852 let Inst{11-15} = XA{4-0}; 853 let Inst{16-20} = XB{4-0}; 854 let Inst{21-28} = xo; 855 let Inst{29} = XA{5}; 856 let Inst{30} = XB{5}; 857 let Inst{31} = 0; 858} 859 860class XX3Form_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 861 InstrItinClass itin, list<dag> pattern> 862 : I<opcode, OOL, IOL, asmstr, itin> { 863 bits<6> XT; 864 bits<6> XA; 865 bits<6> XB; 866 bits<2> D; 867 868 let Pattern = pattern; 869 870 let Inst{6-10} = XT{4-0}; 871 let Inst{11-15} = XA{4-0}; 872 let Inst{16-20} = XB{4-0}; 873 let Inst{21} = 0; 874 let Inst{22-23} = D; 875 let Inst{24-28} = xo; 876 let Inst{29} = XA{5}; 877 let Inst{30} = XB{5}; 878 let Inst{31} = XT{5}; 879} 880 881class XX3Form_Rc<bits<6> opcode, bits<7> xo, dag OOL, dag IOL, string asmstr, 882 InstrItinClass itin, list<dag> pattern> 883 : I<opcode, OOL, IOL, asmstr, itin> { 884 bits<6> XT; 885 bits<6> XA; 886 bits<6> XB; 887 888 let Pattern = pattern; 889 890 bit RC = 0; // set by isDOT 891 892 let Inst{6-10} = XT{4-0}; 893 let Inst{11-15} = XA{4-0}; 894 let Inst{16-20} = XB{4-0}; 895 let Inst{21} = RC; 896 let Inst{22-28} = xo; 897 let Inst{29} = XA{5}; 898 let Inst{30} = XB{5}; 899 let Inst{31} = XT{5}; 900} 901 902class XX4Form<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 903 InstrItinClass itin, list<dag> pattern> 904 : I<opcode, OOL, IOL, asmstr, itin> { 905 bits<6> XT; 906 bits<6> XA; 907 bits<6> XB; 908 bits<6> XC; 909 910 let Pattern = pattern; 911 912 let Inst{6-10} = XT{4-0}; 913 let Inst{11-15} = XA{4-0}; 914 let Inst{16-20} = XB{4-0}; 915 let Inst{21-25} = XC{4-0}; 916 let Inst{26-27} = xo; 917 let Inst{28} = XC{5}; 918 let Inst{29} = XA{5}; 919 let Inst{30} = XB{5}; 920 let Inst{31} = XT{5}; 921} 922 923// DCB_Form - Form X instruction, used for dcb* instructions. 924class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr, 925 InstrItinClass itin, list<dag> pattern> 926 : I<31, OOL, IOL, asmstr, itin> { 927 bits<5> A; 928 bits<5> B; 929 930 let Pattern = pattern; 931 932 let Inst{6-10} = immfield; 933 let Inst{11-15} = A; 934 let Inst{16-20} = B; 935 let Inst{21-30} = xo; 936 let Inst{31} = 0; 937} 938 939class DCB_Form_hint<bits<10> xo, dag OOL, dag IOL, string asmstr, 940 InstrItinClass itin, list<dag> pattern> 941 : I<31, OOL, IOL, asmstr, itin> { 942 bits<5> TH; 943 bits<5> A; 944 bits<5> B; 945 946 let Pattern = pattern; 947 948 let Inst{6-10} = TH; 949 let Inst{11-15} = A; 950 let Inst{16-20} = B; 951 let Inst{21-30} = xo; 952 let Inst{31} = 0; 953} 954 955// DSS_Form - Form X instruction, used for altivec dss* instructions. 956class DSS_Form<bits<1> T, bits<10> xo, dag OOL, dag IOL, string asmstr, 957 InstrItinClass itin, list<dag> pattern> 958 : I<31, OOL, IOL, asmstr, itin> { 959 bits<2> STRM; 960 bits<5> A; 961 bits<5> B; 962 963 let Pattern = pattern; 964 965 let Inst{6} = T; 966 let Inst{7-8} = 0; 967 let Inst{9-10} = STRM; 968 let Inst{11-15} = A; 969 let Inst{16-20} = B; 970 let Inst{21-30} = xo; 971 let Inst{31} = 0; 972} 973 974// 1.7.7 XL-Form 975class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 976 InstrItinClass itin, list<dag> pattern> 977 : I<opcode, OOL, IOL, asmstr, itin> { 978 bits<5> CRD; 979 bits<5> CRA; 980 bits<5> CRB; 981 982 let Pattern = pattern; 983 984 let Inst{6-10} = CRD; 985 let Inst{11-15} = CRA; 986 let Inst{16-20} = CRB; 987 let Inst{21-30} = xo; 988 let Inst{31} = 0; 989} 990 991class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 992 InstrItinClass itin, list<dag> pattern> 993 : I<opcode, OOL, IOL, asmstr, itin> { 994 bits<5> CRD; 995 996 let Pattern = pattern; 997 998 let Inst{6-10} = CRD; 999 let Inst{11-15} = CRD; 1000 let Inst{16-20} = CRD; 1001 let Inst{21-30} = xo; 1002 let Inst{31} = 0; 1003} 1004 1005class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr, 1006 InstrItinClass itin, list<dag> pattern> 1007 : I<opcode, OOL, IOL, asmstr, itin> { 1008 bits<5> BO; 1009 bits<5> BI; 1010 bits<2> BH; 1011 1012 let Pattern = pattern; 1013 1014 let Inst{6-10} = BO; 1015 let Inst{11-15} = BI; 1016 let Inst{16-18} = 0; 1017 let Inst{19-20} = BH; 1018 let Inst{21-30} = xo; 1019 let Inst{31} = lk; 1020} 1021 1022class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk, 1023 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 1024 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 1025 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 1026 bits<3> CR; 1027 1028 let BO = BIBO{4-0}; 1029 let BI{0-1} = BIBO{5-6}; 1030 let BI{2-4} = CR{0-2}; 1031 let BH = 0; 1032} 1033 1034class XLForm_2_br2<bits<6> opcode, bits<10> xo, bits<5> bo, bit lk, 1035 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 1036 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 1037 let BO = bo; 1038 let BH = 0; 1039} 1040 1041class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk, 1042 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 1043 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 1044 let BO = bo; 1045 let BI = bi; 1046 let BH = 0; 1047} 1048 1049class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1050 InstrItinClass itin> 1051 : I<opcode, OOL, IOL, asmstr, itin> { 1052 bits<3> BF; 1053 bits<3> BFA; 1054 1055 let Inst{6-8} = BF; 1056 let Inst{9-10} = 0; 1057 let Inst{11-13} = BFA; 1058 let Inst{14-15} = 0; 1059 let Inst{16-20} = 0; 1060 let Inst{21-30} = xo; 1061 let Inst{31} = 0; 1062} 1063 1064class XLForm_4<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1065 InstrItinClass itin> 1066 : I<opcode, OOL, IOL, asmstr, itin> { 1067 bits<3> BF; 1068 bit W; 1069 bits<4> U; 1070 1071 bit RC = 0; 1072 1073 let Inst{6-8} = BF; 1074 let Inst{9-10} = 0; 1075 let Inst{11-14} = 0; 1076 let Inst{15} = W; 1077 let Inst{16-19} = U; 1078 let Inst{20} = 0; 1079 let Inst{21-30} = xo; 1080 let Inst{31} = RC; 1081} 1082 1083class XLForm_2_and_DSForm_1<bits<6> opcode1, bits<10> xo1, bit lk, 1084 bits<6> opcode2, bits<2> xo2, 1085 dag OOL, dag IOL, string asmstr, 1086 InstrItinClass itin, list<dag> pattern> 1087 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> { 1088 bits<5> BO; 1089 bits<5> BI; 1090 bits<2> BH; 1091 1092 bits<5> RST; 1093 bits<19> DS_RA; 1094 1095 let Pattern = pattern; 1096 1097 let Inst{6-10} = BO; 1098 let Inst{11-15} = BI; 1099 let Inst{16-18} = 0; 1100 let Inst{19-20} = BH; 1101 let Inst{21-30} = xo1; 1102 let Inst{31} = lk; 1103 1104 let Inst{38-42} = RST; 1105 let Inst{43-47} = DS_RA{18-14}; // Register # 1106 let Inst{48-61} = DS_RA{13-0}; // Displacement. 1107 let Inst{62-63} = xo2; 1108} 1109 1110class XLForm_2_ext_and_DSForm_1<bits<6> opcode1, bits<10> xo1, 1111 bits<5> bo, bits<5> bi, bit lk, 1112 bits<6> opcode2, bits<2> xo2, 1113 dag OOL, dag IOL, string asmstr, 1114 InstrItinClass itin, list<dag> pattern> 1115 : XLForm_2_and_DSForm_1<opcode1, xo1, lk, opcode2, xo2, 1116 OOL, IOL, asmstr, itin, pattern> { 1117 let BO = bo; 1118 let BI = bi; 1119 let BH = 0; 1120} 1121 1122// 1.7.8 XFX-Form 1123class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1124 InstrItinClass itin> 1125 : I<opcode, OOL, IOL, asmstr, itin> { 1126 bits<5> RT; 1127 bits<10> SPR; 1128 1129 let Inst{6-10} = RT; 1130 let Inst{11} = SPR{4}; 1131 let Inst{12} = SPR{3}; 1132 let Inst{13} = SPR{2}; 1133 let Inst{14} = SPR{1}; 1134 let Inst{15} = SPR{0}; 1135 let Inst{16} = SPR{9}; 1136 let Inst{17} = SPR{8}; 1137 let Inst{18} = SPR{7}; 1138 let Inst{19} = SPR{6}; 1139 let Inst{20} = SPR{5}; 1140 let Inst{21-30} = xo; 1141 let Inst{31} = 0; 1142} 1143 1144class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 1145 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 1146 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> { 1147 let SPR = spr; 1148} 1149 1150class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1151 InstrItinClass itin> 1152 : I<opcode, OOL, IOL, asmstr, itin> { 1153 bits<5> RT; 1154 1155 let Inst{6-10} = RT; 1156 let Inst{11-20} = 0; 1157 let Inst{21-30} = xo; 1158 let Inst{31} = 0; 1159} 1160 1161class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1162 InstrItinClass itin> 1163 : I<opcode, OOL, IOL, asmstr, itin> { 1164 bits<8> FXM; 1165 bits<5> rS; 1166 1167 let Inst{6-10} = rS; 1168 let Inst{11} = 0; 1169 let Inst{12-19} = FXM; 1170 let Inst{20} = 0; 1171 let Inst{21-30} = xo; 1172 let Inst{31} = 0; 1173} 1174 1175class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1176 InstrItinClass itin> 1177 : I<opcode, OOL, IOL, asmstr, itin> { 1178 bits<5> ST; 1179 bits<8> FXM; 1180 1181 let Inst{6-10} = ST; 1182 let Inst{11} = 1; 1183 let Inst{12-19} = FXM; 1184 let Inst{20} = 0; 1185 let Inst{21-30} = xo; 1186 let Inst{31} = 0; 1187} 1188 1189class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1190 InstrItinClass itin> 1191 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>; 1192 1193class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 1194 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 1195 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> { 1196 let SPR = spr; 1197} 1198 1199// XFL-Form - MTFSF 1200// This is probably 1.7.9, but I don't have the reference that uses this 1201// numbering scheme... 1202class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1203 InstrItinClass itin, list<dag>pattern> 1204 : I<opcode, OOL, IOL, asmstr, itin> { 1205 bits<8> FM; 1206 bits<5> rT; 1207 1208 bit RC = 0; // set by isDOT 1209 let Pattern = pattern; 1210 1211 let Inst{6} = 0; 1212 let Inst{7-14} = FM; 1213 let Inst{15} = 0; 1214 let Inst{16-20} = rT; 1215 let Inst{21-30} = xo; 1216 let Inst{31} = RC; 1217} 1218 1219class XFLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 1220 InstrItinClass itin, list<dag>pattern> 1221 : I<opcode, OOL, IOL, asmstr, itin> { 1222 bit L; 1223 bits<8> FLM; 1224 bit W; 1225 bits<5> FRB; 1226 1227 bit RC = 0; // set by isDOT 1228 let Pattern = pattern; 1229 1230 let Inst{6} = L; 1231 let Inst{7-14} = FLM; 1232 let Inst{15} = W; 1233 let Inst{16-20} = FRB; 1234 let Inst{21-30} = xo; 1235 let Inst{31} = RC; 1236} 1237 1238// 1.7.10 XS-Form - SRADI. 1239class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 1240 InstrItinClass itin, list<dag> pattern> 1241 : I<opcode, OOL, IOL, asmstr, itin> { 1242 bits<5> A; 1243 bits<5> RS; 1244 bits<6> SH; 1245 1246 bit RC = 0; // set by isDOT 1247 let Pattern = pattern; 1248 1249 let Inst{6-10} = RS; 1250 let Inst{11-15} = A; 1251 let Inst{16-20} = SH{4,3,2,1,0}; 1252 let Inst{21-29} = xo; 1253 let Inst{30} = SH{5}; 1254 let Inst{31} = RC; 1255} 1256 1257// 1.7.11 XO-Form 1258class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr, 1259 InstrItinClass itin, list<dag> pattern> 1260 : I<opcode, OOL, IOL, asmstr, itin> { 1261 bits<5> RT; 1262 bits<5> RA; 1263 bits<5> RB; 1264 1265 let Pattern = pattern; 1266 1267 bit RC = 0; // set by isDOT 1268 1269 let Inst{6-10} = RT; 1270 let Inst{11-15} = RA; 1271 let Inst{16-20} = RB; 1272 let Inst{21} = oe; 1273 let Inst{22-30} = xo; 1274 let Inst{31} = RC; 1275} 1276 1277class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, 1278 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 1279 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> { 1280 let RB = 0; 1281} 1282 1283// 1.7.12 A-Form 1284class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1285 InstrItinClass itin, list<dag> pattern> 1286 : I<opcode, OOL, IOL, asmstr, itin> { 1287 bits<5> FRT; 1288 bits<5> FRA; 1289 bits<5> FRC; 1290 bits<5> FRB; 1291 1292 let Pattern = pattern; 1293 1294 bit RC = 0; // set by isDOT 1295 1296 let Inst{6-10} = FRT; 1297 let Inst{11-15} = FRA; 1298 let Inst{16-20} = FRB; 1299 let Inst{21-25} = FRC; 1300 let Inst{26-30} = xo; 1301 let Inst{31} = RC; 1302} 1303 1304class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1305 InstrItinClass itin, list<dag> pattern> 1306 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 1307 let FRC = 0; 1308} 1309 1310class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1311 InstrItinClass itin, list<dag> pattern> 1312 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 1313 let FRB = 0; 1314} 1315 1316class AForm_4<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1317 InstrItinClass itin, list<dag> pattern> 1318 : I<opcode, OOL, IOL, asmstr, itin> { 1319 bits<5> RT; 1320 bits<5> RA; 1321 bits<5> RB; 1322 bits<5> COND; 1323 1324 let Pattern = pattern; 1325 1326 let Inst{6-10} = RT; 1327 let Inst{11-15} = RA; 1328 let Inst{16-20} = RB; 1329 let Inst{21-25} = COND; 1330 let Inst{26-30} = xo; 1331 let Inst{31} = 0; 1332} 1333 1334// Used for QPX 1335class AForm_4a<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 1336 InstrItinClass itin, list<dag> pattern> 1337 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 1338 let FRA = 0; 1339 let FRC = 0; 1340} 1341 1342// 1.7.13 M-Form 1343class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 1344 InstrItinClass itin, list<dag> pattern> 1345 : I<opcode, OOL, IOL, asmstr, itin> { 1346 bits<5> RA; 1347 bits<5> RS; 1348 bits<5> RB; 1349 bits<5> MB; 1350 bits<5> ME; 1351 1352 let Pattern = pattern; 1353 1354 bit RC = 0; // set by isDOT 1355 1356 let Inst{6-10} = RS; 1357 let Inst{11-15} = RA; 1358 let Inst{16-20} = RB; 1359 let Inst{21-25} = MB; 1360 let Inst{26-30} = ME; 1361 let Inst{31} = RC; 1362} 1363 1364class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 1365 InstrItinClass itin, list<dag> pattern> 1366 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 1367} 1368 1369// 1.7.14 MD-Form 1370class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr, 1371 InstrItinClass itin, list<dag> pattern> 1372 : I<opcode, OOL, IOL, asmstr, itin> { 1373 bits<5> RA; 1374 bits<5> RS; 1375 bits<6> SH; 1376 bits<6> MBE; 1377 1378 let Pattern = pattern; 1379 1380 bit RC = 0; // set by isDOT 1381 1382 let Inst{6-10} = RS; 1383 let Inst{11-15} = RA; 1384 let Inst{16-20} = SH{4,3,2,1,0}; 1385 let Inst{21-26} = MBE{4,3,2,1,0,5}; 1386 let Inst{27-29} = xo; 1387 let Inst{30} = SH{5}; 1388 let Inst{31} = RC; 1389} 1390 1391class MDSForm_1<bits<6> opcode, bits<4> xo, dag OOL, dag IOL, string asmstr, 1392 InstrItinClass itin, list<dag> pattern> 1393 : I<opcode, OOL, IOL, asmstr, itin> { 1394 bits<5> RA; 1395 bits<5> RS; 1396 bits<5> RB; 1397 bits<6> MBE; 1398 1399 let Pattern = pattern; 1400 1401 bit RC = 0; // set by isDOT 1402 1403 let Inst{6-10} = RS; 1404 let Inst{11-15} = RA; 1405 let Inst{16-20} = RB; 1406 let Inst{21-26} = MBE{4,3,2,1,0,5}; 1407 let Inst{27-30} = xo; 1408 let Inst{31} = RC; 1409} 1410 1411 1412// E-1 VA-Form 1413 1414// VAForm_1 - DACB ordering. 1415class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr, 1416 InstrItinClass itin, list<dag> pattern> 1417 : I<4, OOL, IOL, asmstr, itin> { 1418 bits<5> VD; 1419 bits<5> VA; 1420 bits<5> VC; 1421 bits<5> VB; 1422 1423 let Pattern = pattern; 1424 1425 let Inst{6-10} = VD; 1426 let Inst{11-15} = VA; 1427 let Inst{16-20} = VB; 1428 let Inst{21-25} = VC; 1429 let Inst{26-31} = xo; 1430} 1431 1432// VAForm_1a - DABC ordering. 1433class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr, 1434 InstrItinClass itin, list<dag> pattern> 1435 : I<4, OOL, IOL, asmstr, itin> { 1436 bits<5> VD; 1437 bits<5> VA; 1438 bits<5> VB; 1439 bits<5> VC; 1440 1441 let Pattern = pattern; 1442 1443 let Inst{6-10} = VD; 1444 let Inst{11-15} = VA; 1445 let Inst{16-20} = VB; 1446 let Inst{21-25} = VC; 1447 let Inst{26-31} = xo; 1448} 1449 1450class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr, 1451 InstrItinClass itin, list<dag> pattern> 1452 : I<4, OOL, IOL, asmstr, itin> { 1453 bits<5> VD; 1454 bits<5> VA; 1455 bits<5> VB; 1456 bits<4> SH; 1457 1458 let Pattern = pattern; 1459 1460 let Inst{6-10} = VD; 1461 let Inst{11-15} = VA; 1462 let Inst{16-20} = VB; 1463 let Inst{21} = 0; 1464 let Inst{22-25} = SH; 1465 let Inst{26-31} = xo; 1466} 1467 1468// E-2 VX-Form 1469class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr, 1470 InstrItinClass itin, list<dag> pattern> 1471 : I<4, OOL, IOL, asmstr, itin> { 1472 bits<5> VD; 1473 bits<5> VA; 1474 bits<5> VB; 1475 1476 let Pattern = pattern; 1477 1478 let Inst{6-10} = VD; 1479 let Inst{11-15} = VA; 1480 let Inst{16-20} = VB; 1481 let Inst{21-31} = xo; 1482} 1483 1484class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr, 1485 InstrItinClass itin, list<dag> pattern> 1486 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> { 1487 let VA = VD; 1488 let VB = VD; 1489} 1490 1491 1492class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr, 1493 InstrItinClass itin, list<dag> pattern> 1494 : I<4, OOL, IOL, asmstr, itin> { 1495 bits<5> VD; 1496 bits<5> VB; 1497 1498 let Pattern = pattern; 1499 1500 let Inst{6-10} = VD; 1501 let Inst{11-15} = 0; 1502 let Inst{16-20} = VB; 1503 let Inst{21-31} = xo; 1504} 1505 1506class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr, 1507 InstrItinClass itin, list<dag> pattern> 1508 : I<4, OOL, IOL, asmstr, itin> { 1509 bits<5> VD; 1510 bits<5> IMM; 1511 1512 let Pattern = pattern; 1513 1514 let Inst{6-10} = VD; 1515 let Inst{11-15} = IMM; 1516 let Inst{16-20} = 0; 1517 let Inst{21-31} = xo; 1518} 1519 1520/// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr. 1521class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr, 1522 InstrItinClass itin, list<dag> pattern> 1523 : I<4, OOL, IOL, asmstr, itin> { 1524 bits<5> VD; 1525 1526 let Pattern = pattern; 1527 1528 let Inst{6-10} = VD; 1529 let Inst{11-15} = 0; 1530 let Inst{16-20} = 0; 1531 let Inst{21-31} = xo; 1532} 1533 1534/// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr. 1535class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr, 1536 InstrItinClass itin, list<dag> pattern> 1537 : I<4, OOL, IOL, asmstr, itin> { 1538 bits<5> VB; 1539 1540 let Pattern = pattern; 1541 1542 let Inst{6-10} = 0; 1543 let Inst{11-15} = 0; 1544 let Inst{16-20} = VB; 1545 let Inst{21-31} = xo; 1546} 1547 1548/// VXForm_CR - VX crypto instructions with "VRT, VRA, ST, SIX" 1549class VXForm_CR<bits<11> xo, dag OOL, dag IOL, string asmstr, 1550 InstrItinClass itin, list<dag> pattern> 1551 : I<4, OOL, IOL, asmstr, itin> { 1552 bits<5> VD; 1553 bits<5> VA; 1554 bits<1> ST; 1555 bits<4> SIX; 1556 1557 let Pattern = pattern; 1558 1559 let Inst{6-10} = VD; 1560 let Inst{11-15} = VA; 1561 let Inst{16} = ST; 1562 let Inst{17-20} = SIX; 1563 let Inst{21-31} = xo; 1564} 1565 1566/// VXForm_BX - VX crypto instructions with "VRT, VRA, 0 - like vsbox" 1567class VXForm_BX<bits<11> xo, dag OOL, dag IOL, string asmstr, 1568 InstrItinClass itin, list<dag> pattern> 1569 : I<4, OOL, IOL, asmstr, itin> { 1570 bits<5> VD; 1571 bits<5> VA; 1572 1573 let Pattern = pattern; 1574 1575 let Inst{6-10} = VD; 1576 let Inst{11-15} = VA; 1577 let Inst{16-20} = 0; 1578 let Inst{21-31} = xo; 1579} 1580 1581// E-4 VXR-Form 1582class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr, 1583 InstrItinClass itin, list<dag> pattern> 1584 : I<4, OOL, IOL, asmstr, itin> { 1585 bits<5> VD; 1586 bits<5> VA; 1587 bits<5> VB; 1588 bit RC = 0; 1589 1590 let Pattern = pattern; 1591 1592 let Inst{6-10} = VD; 1593 let Inst{11-15} = VA; 1594 let Inst{16-20} = VB; 1595 let Inst{21} = RC; 1596 let Inst{22-31} = xo; 1597} 1598 1599// Z23-Form (used by QPX) 1600class Z23Form_1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 1601 InstrItinClass itin, list<dag> pattern> 1602 : I<opcode, OOL, IOL, asmstr, itin> { 1603 bits<5> FRT; 1604 bits<5> FRA; 1605 bits<5> FRB; 1606 bits<2> idx; 1607 1608 let Pattern = pattern; 1609 1610 bit RC = 0; // set by isDOT 1611 1612 let Inst{6-10} = FRT; 1613 let Inst{11-15} = FRA; 1614 let Inst{16-20} = FRB; 1615 let Inst{21-22} = idx; 1616 let Inst{23-30} = xo; 1617 let Inst{31} = RC; 1618} 1619 1620class Z23Form_2<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 1621 InstrItinClass itin, list<dag> pattern> 1622 : Z23Form_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 1623 let FRB = 0; 1624} 1625 1626class Z23Form_3<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, 1627 InstrItinClass itin, list<dag> pattern> 1628 : I<opcode, OOL, IOL, asmstr, itin> { 1629 bits<5> FRT; 1630 bits<12> idx; 1631 1632 let Pattern = pattern; 1633 1634 bit RC = 0; // set by isDOT 1635 1636 let Inst{6-10} = FRT; 1637 let Inst{11-22} = idx; 1638 let Inst{23-30} = xo; 1639 let Inst{31} = RC; 1640} 1641 1642//===----------------------------------------------------------------------===// 1643class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern> 1644 : I<0, OOL, IOL, asmstr, NoItinerary> { 1645 let isCodeGenOnly = 1; 1646 let PPC64 = 0; 1647 let Pattern = pattern; 1648 let Inst{31-0} = 0; 1649} 1650