1 //===-- PPCCTRLoops.cpp - Identify and generate CTR loops -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This pass identifies loops where we can generate the PPC branch instructions 11 // that decrement and test the count register (CTR) (bdnz and friends). 12 // 13 // The pattern that defines the induction variable can changed depending on 14 // prior optimizations. For example, the IndVarSimplify phase run by 'opt' 15 // normalizes induction variables, and the Loop Strength Reduction pass 16 // run by 'llc' may also make changes to the induction variable. 17 // 18 // Criteria for CTR loops: 19 // - Countable loops (w/ ind. var for a trip count) 20 // - Try inner-most loops first 21 // - No nested CTR loops. 22 // - No function calls in loops. 23 // 24 //===----------------------------------------------------------------------===// 25 26 #define DEBUG_TYPE "ctrloops" 27 28 #include "llvm/Transforms/Scalar.h" 29 #include "llvm/ADT/Statistic.h" 30 #include "llvm/ADT/STLExtras.h" 31 #include "llvm/Analysis/Dominators.h" 32 #include "llvm/Analysis/LoopInfo.h" 33 #include "llvm/Analysis/ScalarEvolutionExpander.h" 34 #include "llvm/IR/Constants.h" 35 #include "llvm/IR/DerivedTypes.h" 36 #include "llvm/IR/InlineAsm.h" 37 #include "llvm/IR/Instructions.h" 38 #include "llvm/IR/IntrinsicInst.h" 39 #include "llvm/IR/Module.h" 40 #include "llvm/PassSupport.h" 41 #include "llvm/Support/CommandLine.h" 42 #include "llvm/Support/Debug.h" 43 #include "llvm/Support/ValueHandle.h" 44 #include "llvm/Support/raw_ostream.h" 45 #include "llvm/Transforms/Utils/BasicBlockUtils.h" 46 #include "llvm/Transforms/Utils/Local.h" 47 #include "llvm/Transforms/Utils/LoopUtils.h" 48 #include "llvm/Target/TargetLibraryInfo.h" 49 #include "PPCTargetMachine.h" 50 #include "PPC.h" 51 52 #ifndef NDEBUG 53 #include "llvm/CodeGen/MachineDominators.h" 54 #include "llvm/CodeGen/MachineFunction.h" 55 #include "llvm/CodeGen/MachineFunctionPass.h" 56 #include "llvm/CodeGen/MachineRegisterInfo.h" 57 #endif 58 59 #include <algorithm> 60 #include <vector> 61 62 using namespace llvm; 63 64 #ifndef NDEBUG 65 static cl::opt<int> CTRLoopLimit("ppc-max-ctrloop", cl::Hidden, cl::init(-1)); 66 #endif 67 68 STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops"); 69 70 namespace llvm { 71 void initializePPCCTRLoopsPass(PassRegistry&); 72 #ifndef NDEBUG 73 void initializePPCCTRLoopsVerifyPass(PassRegistry&); 74 #endif 75 } 76 77 namespace { 78 struct PPCCTRLoops : public FunctionPass { 79 80 #ifndef NDEBUG 81 static int Counter; 82 #endif 83 84 public: 85 static char ID; 86 87 PPCCTRLoops() : FunctionPass(ID), TM(0) { 88 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry()); 89 } 90 PPCCTRLoops(PPCTargetMachine &TM) : FunctionPass(ID), TM(&TM) { 91 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry()); 92 } 93 94 virtual bool runOnFunction(Function &F); 95 96 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 97 AU.addRequired<LoopInfo>(); 98 AU.addPreserved<LoopInfo>(); 99 AU.addRequired<DominatorTree>(); 100 AU.addPreserved<DominatorTree>(); 101 AU.addRequired<ScalarEvolution>(); 102 } 103 104 private: 105 bool mightUseCTR(const Triple &TT, BasicBlock *BB); 106 bool convertToCTRLoop(Loop *L); 107 108 private: 109 PPCTargetMachine *TM; 110 LoopInfo *LI; 111 ScalarEvolution *SE; 112 DataLayout *TD; 113 DominatorTree *DT; 114 const TargetLibraryInfo *LibInfo; 115 }; 116 117 char PPCCTRLoops::ID = 0; 118 #ifndef NDEBUG 119 int PPCCTRLoops::Counter = 0; 120 #endif 121 122 #ifndef NDEBUG 123 struct PPCCTRLoopsVerify : public MachineFunctionPass { 124 public: 125 static char ID; 126 127 PPCCTRLoopsVerify() : MachineFunctionPass(ID) { 128 initializePPCCTRLoopsVerifyPass(*PassRegistry::getPassRegistry()); 129 } 130 131 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 132 AU.addRequired<MachineDominatorTree>(); 133 MachineFunctionPass::getAnalysisUsage(AU); 134 } 135 136 virtual bool runOnMachineFunction(MachineFunction &MF); 137 138 private: 139 MachineDominatorTree *MDT; 140 }; 141 142 char PPCCTRLoopsVerify::ID = 0; 143 #endif // NDEBUG 144 } // end anonymous namespace 145 146 INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops", 147 false, false) 148 INITIALIZE_PASS_DEPENDENCY(DominatorTree) 149 INITIALIZE_PASS_DEPENDENCY(LoopInfo) 150 INITIALIZE_PASS_DEPENDENCY(ScalarEvolution) 151 INITIALIZE_PASS_END(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops", 152 false, false) 153 154 FunctionPass *llvm::createPPCCTRLoops(PPCTargetMachine &TM) { 155 return new PPCCTRLoops(TM); 156 } 157 158 #ifndef NDEBUG 159 INITIALIZE_PASS_BEGIN(PPCCTRLoopsVerify, "ppc-ctr-loops-verify", 160 "PowerPC CTR Loops Verify", false, false) 161 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) 162 INITIALIZE_PASS_END(PPCCTRLoopsVerify, "ppc-ctr-loops-verify", 163 "PowerPC CTR Loops Verify", false, false) 164 165 FunctionPass *llvm::createPPCCTRLoopsVerify() { 166 return new PPCCTRLoopsVerify(); 167 } 168 #endif // NDEBUG 169 170 bool PPCCTRLoops::runOnFunction(Function &F) { 171 LI = &getAnalysis<LoopInfo>(); 172 SE = &getAnalysis<ScalarEvolution>(); 173 DT = &getAnalysis<DominatorTree>(); 174 TD = getAnalysisIfAvailable<DataLayout>(); 175 LibInfo = getAnalysisIfAvailable<TargetLibraryInfo>(); 176 177 bool MadeChange = false; 178 179 for (LoopInfo::iterator I = LI->begin(), E = LI->end(); 180 I != E; ++I) { 181 Loop *L = *I; 182 if (!L->getParentLoop()) 183 MadeChange |= convertToCTRLoop(L); 184 } 185 186 return MadeChange; 187 } 188 189 bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) { 190 for (BasicBlock::iterator J = BB->begin(), JE = BB->end(); 191 J != JE; ++J) { 192 if (CallInst *CI = dyn_cast<CallInst>(J)) { 193 if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) { 194 // Inline ASM is okay, unless it clobbers the ctr register. 195 InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints(); 196 for (unsigned i = 0, ie = CIV.size(); i < ie; ++i) { 197 InlineAsm::ConstraintInfo &C = CIV[i]; 198 if (C.Type != InlineAsm::isInput) 199 for (unsigned j = 0, je = C.Codes.size(); j < je; ++j) 200 if (StringRef(C.Codes[j]).equals_lower("{ctr}")) 201 return true; 202 } 203 204 continue; 205 } 206 207 if (!TM) 208 return true; 209 const TargetLowering *TLI = TM->getTargetLowering(); 210 211 if (Function *F = CI->getCalledFunction()) { 212 // Most intrinsics don't become function calls, but some might. 213 // sin, cos, exp and log are always calls. 214 unsigned Opcode; 215 if (F->getIntrinsicID() != Intrinsic::not_intrinsic) { 216 switch (F->getIntrinsicID()) { 217 default: continue; 218 219 // VisualStudio defines setjmp as _setjmp 220 #if defined(_MSC_VER) && defined(setjmp) && \ 221 !defined(setjmp_undefined_for_msvc) 222 # pragma push_macro("setjmp") 223 # undef setjmp 224 # define setjmp_undefined_for_msvc 225 #endif 226 227 case Intrinsic::setjmp: 228 229 #if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc) 230 // let's return it to _setjmp state 231 # pragma pop_macro("setjmp") 232 # undef setjmp_undefined_for_msvc 233 #endif 234 235 case Intrinsic::longjmp: 236 237 // Exclude eh_sjlj_setjmp; we don't need to exclude eh_sjlj_longjmp 238 // because, although it does clobber the counter register, the 239 // control can't then return to inside the loop unless there is also 240 // an eh_sjlj_setjmp. 241 case Intrinsic::eh_sjlj_setjmp: 242 243 case Intrinsic::memcpy: 244 case Intrinsic::memmove: 245 case Intrinsic::memset: 246 case Intrinsic::powi: 247 case Intrinsic::log: 248 case Intrinsic::log2: 249 case Intrinsic::log10: 250 case Intrinsic::exp: 251 case Intrinsic::exp2: 252 case Intrinsic::pow: 253 case Intrinsic::sin: 254 case Intrinsic::cos: 255 return true; 256 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break; 257 case Intrinsic::floor: Opcode = ISD::FFLOOR; break; 258 case Intrinsic::ceil: Opcode = ISD::FCEIL; break; 259 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; 260 case Intrinsic::rint: Opcode = ISD::FRINT; break; 261 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break; 262 case Intrinsic::round: Opcode = ISD::FROUND; break; 263 } 264 } 265 266 // PowerPC does not use [US]DIVREM or other library calls for 267 // operations on regular types which are not otherwise library calls 268 // (i.e. soft float or atomics). If adapting for targets that do, 269 // additional care is required here. 270 271 LibFunc::Func Func; 272 if (!F->hasLocalLinkage() && F->hasName() && LibInfo && 273 LibInfo->getLibFunc(F->getName(), Func) && 274 LibInfo->hasOptimizedCodeGen(Func)) { 275 // Non-read-only functions are never treated as intrinsics. 276 if (!CI->onlyReadsMemory()) 277 return true; 278 279 // Conversion happens only for FP calls. 280 if (!CI->getArgOperand(0)->getType()->isFloatingPointTy()) 281 return true; 282 283 switch (Func) { 284 default: return true; 285 case LibFunc::copysign: 286 case LibFunc::copysignf: 287 case LibFunc::copysignl: 288 continue; // ISD::FCOPYSIGN is never a library call. 289 case LibFunc::fabs: 290 case LibFunc::fabsf: 291 case LibFunc::fabsl: 292 continue; // ISD::FABS is never a library call. 293 case LibFunc::sqrt: 294 case LibFunc::sqrtf: 295 case LibFunc::sqrtl: 296 Opcode = ISD::FSQRT; break; 297 case LibFunc::floor: 298 case LibFunc::floorf: 299 case LibFunc::floorl: 300 Opcode = ISD::FFLOOR; break; 301 case LibFunc::nearbyint: 302 case LibFunc::nearbyintf: 303 case LibFunc::nearbyintl: 304 Opcode = ISD::FNEARBYINT; break; 305 case LibFunc::ceil: 306 case LibFunc::ceilf: 307 case LibFunc::ceill: 308 Opcode = ISD::FCEIL; break; 309 case LibFunc::rint: 310 case LibFunc::rintf: 311 case LibFunc::rintl: 312 Opcode = ISD::FRINT; break; 313 case LibFunc::round: 314 case LibFunc::roundf: 315 case LibFunc::roundl: 316 Opcode = ISD::FROUND; break; 317 case LibFunc::trunc: 318 case LibFunc::truncf: 319 case LibFunc::truncl: 320 Opcode = ISD::FTRUNC; break; 321 } 322 323 MVT VTy = 324 TLI->getSimpleValueType(CI->getArgOperand(0)->getType(), true); 325 if (VTy == MVT::Other) 326 return true; 327 328 if (TLI->isOperationLegalOrCustom(Opcode, VTy)) 329 continue; 330 else if (VTy.isVector() && 331 TLI->isOperationLegalOrCustom(Opcode, VTy.getScalarType())) 332 continue; 333 334 return true; 335 } 336 } 337 338 return true; 339 } else if (isa<BinaryOperator>(J) && 340 J->getType()->getScalarType()->isPPC_FP128Ty()) { 341 // Most operations on ppc_f128 values become calls. 342 return true; 343 } else if (isa<UIToFPInst>(J) || isa<SIToFPInst>(J) || 344 isa<FPToUIInst>(J) || isa<FPToSIInst>(J)) { 345 CastInst *CI = cast<CastInst>(J); 346 if (CI->getSrcTy()->getScalarType()->isPPC_FP128Ty() || 347 CI->getDestTy()->getScalarType()->isPPC_FP128Ty() || 348 (TT.isArch32Bit() && 349 (CI->getSrcTy()->getScalarType()->isIntegerTy(64) || 350 CI->getDestTy()->getScalarType()->isIntegerTy(64)) 351 )) 352 return true; 353 } else if (TT.isArch32Bit() && 354 J->getType()->getScalarType()->isIntegerTy(64) && 355 (J->getOpcode() == Instruction::UDiv || 356 J->getOpcode() == Instruction::SDiv || 357 J->getOpcode() == Instruction::URem || 358 J->getOpcode() == Instruction::SRem)) { 359 return true; 360 } else if (isa<IndirectBrInst>(J) || isa<InvokeInst>(J)) { 361 // On PowerPC, indirect jumps use the counter register. 362 return true; 363 } else if (SwitchInst *SI = dyn_cast<SwitchInst>(J)) { 364 if (!TM) 365 return true; 366 const TargetLowering *TLI = TM->getTargetLowering(); 367 368 if (TLI->supportJumpTables() && 369 SI->getNumCases()+1 >= (unsigned) TLI->getMinimumJumpTableEntries()) 370 return true; 371 } 372 } 373 374 return false; 375 } 376 377 bool PPCCTRLoops::convertToCTRLoop(Loop *L) { 378 bool MadeChange = false; 379 380 Triple TT = Triple(L->getHeader()->getParent()->getParent()-> 381 getTargetTriple()); 382 if (!TT.isArch32Bit() && !TT.isArch64Bit()) 383 return MadeChange; // Unknown arch. type. 384 385 // Process nested loops first. 386 for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) { 387 MadeChange |= convertToCTRLoop(*I); 388 } 389 390 // If a nested loop has been converted, then we can't convert this loop. 391 if (MadeChange) 392 return MadeChange; 393 394 #ifndef NDEBUG 395 // Stop trying after reaching the limit (if any). 396 int Limit = CTRLoopLimit; 397 if (Limit >= 0) { 398 if (Counter >= CTRLoopLimit) 399 return false; 400 Counter++; 401 } 402 #endif 403 404 // We don't want to spill/restore the counter register, and so we don't 405 // want to use the counter register if the loop contains calls. 406 for (Loop::block_iterator I = L->block_begin(), IE = L->block_end(); 407 I != IE; ++I) 408 if (mightUseCTR(TT, *I)) 409 return MadeChange; 410 411 SmallVector<BasicBlock*, 4> ExitingBlocks; 412 L->getExitingBlocks(ExitingBlocks); 413 414 BasicBlock *CountedExitBlock = 0; 415 const SCEV *ExitCount = 0; 416 BranchInst *CountedExitBranch = 0; 417 for (SmallVectorImpl<BasicBlock *>::iterator I = ExitingBlocks.begin(), 418 IE = ExitingBlocks.end(); I != IE; ++I) { 419 const SCEV *EC = SE->getExitCount(L, *I); 420 DEBUG(dbgs() << "Exit Count for " << *L << " from block " << 421 (*I)->getName() << ": " << *EC << "\n"); 422 if (isa<SCEVCouldNotCompute>(EC)) 423 continue; 424 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 425 if (ConstEC->getValue()->isZero()) 426 continue; 427 } else if (!SE->isLoopInvariant(EC, L)) 428 continue; 429 430 if (SE->getTypeSizeInBits(EC->getType()) > (TT.isArch64Bit() ? 64 : 32)) 431 continue; 432 433 // We now have a loop-invariant count of loop iterations (which is not the 434 // constant zero) for which we know that this loop will not exit via this 435 // exisiting block. 436 437 // We need to make sure that this block will run on every loop iteration. 438 // For this to be true, we must dominate all blocks with backedges. Such 439 // blocks are in-loop predecessors to the header block. 440 bool NotAlways = false; 441 for (pred_iterator PI = pred_begin(L->getHeader()), 442 PIE = pred_end(L->getHeader()); PI != PIE; ++PI) { 443 if (!L->contains(*PI)) 444 continue; 445 446 if (!DT->dominates(*I, *PI)) { 447 NotAlways = true; 448 break; 449 } 450 } 451 452 if (NotAlways) 453 continue; 454 455 // Make sure this blocks ends with a conditional branch. 456 Instruction *TI = (*I)->getTerminator(); 457 if (!TI) 458 continue; 459 460 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 461 if (!BI->isConditional()) 462 continue; 463 464 CountedExitBranch = BI; 465 } else 466 continue; 467 468 // Note that this block may not be the loop latch block, even if the loop 469 // has a latch block. 470 CountedExitBlock = *I; 471 ExitCount = EC; 472 break; 473 } 474 475 if (!CountedExitBlock) 476 return MadeChange; 477 478 BasicBlock *Preheader = L->getLoopPreheader(); 479 480 // If we don't have a preheader, then insert one. If we already have a 481 // preheader, then we can use it (except if the preheader contains a use of 482 // the CTR register because some such uses might be reordered by the 483 // selection DAG after the mtctr instruction). 484 if (!Preheader || mightUseCTR(TT, Preheader)) 485 Preheader = InsertPreheaderForLoop(L, this); 486 if (!Preheader) 487 return MadeChange; 488 489 DEBUG(dbgs() << "Preheader for exit count: " << Preheader->getName() << "\n"); 490 491 // Insert the count into the preheader and replace the condition used by the 492 // selected branch. 493 MadeChange = true; 494 495 SCEVExpander SCEVE(*SE, "loopcnt"); 496 LLVMContext &C = SE->getContext(); 497 Type *CountType = TT.isArch64Bit() ? Type::getInt64Ty(C) : 498 Type::getInt32Ty(C); 499 if (!ExitCount->getType()->isPointerTy() && 500 ExitCount->getType() != CountType) 501 ExitCount = SE->getZeroExtendExpr(ExitCount, CountType); 502 ExitCount = SE->getAddExpr(ExitCount, 503 SE->getConstant(CountType, 1)); 504 Value *ECValue = SCEVE.expandCodeFor(ExitCount, CountType, 505 Preheader->getTerminator()); 506 507 IRBuilder<> CountBuilder(Preheader->getTerminator()); 508 Module *M = Preheader->getParent()->getParent(); 509 Value *MTCTRFunc = Intrinsic::getDeclaration(M, Intrinsic::ppc_mtctr, 510 CountType); 511 CountBuilder.CreateCall(MTCTRFunc, ECValue); 512 513 IRBuilder<> CondBuilder(CountedExitBranch); 514 Value *DecFunc = 515 Intrinsic::getDeclaration(M, Intrinsic::ppc_is_decremented_ctr_nonzero); 516 Value *NewCond = CondBuilder.CreateCall(DecFunc); 517 Value *OldCond = CountedExitBranch->getCondition(); 518 CountedExitBranch->setCondition(NewCond); 519 520 // The false branch must exit the loop. 521 if (!L->contains(CountedExitBranch->getSuccessor(0))) 522 CountedExitBranch->swapSuccessors(); 523 524 // The old condition may be dead now, and may have even created a dead PHI 525 // (the original induction variable). 526 RecursivelyDeleteTriviallyDeadInstructions(OldCond); 527 DeleteDeadPHIs(CountedExitBlock); 528 529 ++NumCTRLoops; 530 return MadeChange; 531 } 532 533 #ifndef NDEBUG 534 static bool clobbersCTR(const MachineInstr *MI) { 535 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 536 const MachineOperand &MO = MI->getOperand(i); 537 if (MO.isReg()) { 538 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8)) 539 return true; 540 } else if (MO.isRegMask()) { 541 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8)) 542 return true; 543 } 544 } 545 546 return false; 547 } 548 549 static bool verifyCTRBranch(MachineBasicBlock *MBB, 550 MachineBasicBlock::iterator I) { 551 MachineBasicBlock::iterator BI = I; 552 SmallSet<MachineBasicBlock *, 16> Visited; 553 SmallVector<MachineBasicBlock *, 8> Preds; 554 bool CheckPreds; 555 556 if (I == MBB->begin()) { 557 Visited.insert(MBB); 558 goto queue_preds; 559 } else 560 --I; 561 562 check_block: 563 Visited.insert(MBB); 564 if (I == MBB->end()) 565 goto queue_preds; 566 567 CheckPreds = true; 568 for (MachineBasicBlock::iterator IE = MBB->begin();; --I) { 569 unsigned Opc = I->getOpcode(); 570 if (Opc == PPC::MTCTRloop || Opc == PPC::MTCTR8loop) { 571 CheckPreds = false; 572 break; 573 } 574 575 if (I != BI && clobbersCTR(I)) { 576 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " (" << 577 MBB->getFullName() << ") instruction " << *I << 578 " clobbers CTR, invalidating " << "BB#" << 579 BI->getParent()->getNumber() << " (" << 580 BI->getParent()->getFullName() << ") instruction " << 581 *BI << "\n"); 582 return false; 583 } 584 585 if (I == IE) 586 break; 587 } 588 589 if (!CheckPreds && Preds.empty()) 590 return true; 591 592 if (CheckPreds) { 593 queue_preds: 594 if (MachineFunction::iterator(MBB) == MBB->getParent()->begin()) { 595 DEBUG(dbgs() << "Unable to find a MTCTR instruction for BB#" << 596 BI->getParent()->getNumber() << " (" << 597 BI->getParent()->getFullName() << ") instruction " << 598 *BI << "\n"); 599 return false; 600 } 601 602 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(), 603 PIE = MBB->pred_end(); PI != PIE; ++PI) 604 Preds.push_back(*PI); 605 } 606 607 do { 608 MBB = Preds.pop_back_val(); 609 if (!Visited.count(MBB)) { 610 I = MBB->getLastNonDebugInstr(); 611 goto check_block; 612 } 613 } while (!Preds.empty()); 614 615 return true; 616 } 617 618 bool PPCCTRLoopsVerify::runOnMachineFunction(MachineFunction &MF) { 619 MDT = &getAnalysis<MachineDominatorTree>(); 620 621 // Verify that all bdnz/bdz instructions are dominated by a loop mtctr before 622 // any other instructions that might clobber the ctr register. 623 for (MachineFunction::iterator I = MF.begin(), IE = MF.end(); 624 I != IE; ++I) { 625 MachineBasicBlock *MBB = I; 626 if (!MDT->isReachableFromEntry(MBB)) 627 continue; 628 629 for (MachineBasicBlock::iterator MII = MBB->getFirstTerminator(), 630 MIIE = MBB->end(); MII != MIIE; ++MII) { 631 unsigned Opc = MII->getOpcode(); 632 if (Opc == PPC::BDNZ8 || Opc == PPC::BDNZ || 633 Opc == PPC::BDZ8 || Opc == PPC::BDZ) 634 if (!verifyCTRBranch(MBB, MII)) 635 llvm_unreachable("Invalid PPC CTR loop!"); 636 } 637 } 638 639 return false; 640 } 641 #endif // NDEBUG 642 643