1 //===-- PPCMCTargetDesc.h - PowerPC Target Descriptions ---------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides PowerPC specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
16 
17 // GCC #defines PPC on Linux but we use it as our namespace name
18 #undef PPC
19 
20 #include "llvm/Support/DataTypes.h"
21 #include "llvm/Support/MathExtras.h"
22 
23 namespace llvm {
24 class MCAsmBackend;
25 class MCCodeEmitter;
26 class MCContext;
27 class MCInstrInfo;
28 class MCObjectWriter;
29 class MCRegisterInfo;
30 class MCSubtargetInfo;
31 class MCTargetOptions;
32 class Target;
33 class Triple;
34 class StringRef;
35 class raw_pwrite_stream;
36 class raw_ostream;
37 
38 Target &getThePPC32Target();
39 Target &getThePPC64Target();
40 Target &getThePPC64LETarget();
41 
42 MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
43                                       const MCRegisterInfo &MRI,
44                                       MCContext &Ctx);
45 
46 MCAsmBackend *createPPCAsmBackend(const Target &T, const MCRegisterInfo &MRI,
47                                   const Triple &TT, StringRef CPU,
48                                   const MCTargetOptions &Options);
49 
50 /// Construct an PPC ELF object writer.
51 MCObjectWriter *createPPCELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
52                                          bool IsLittleEndian, uint8_t OSABI);
53 /// Construct a PPC Mach-O object writer.
54 MCObjectWriter *createPPCMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
55                                           uint32_t CPUType,
56                                           uint32_t CPUSubtype);
57 
58 /// Returns true iff Val consists of one contiguous run of 1s with any number of
59 /// 0s on either side.  The 1s are allowed to wrap from LSB to MSB, so
60 /// 0x000FFF0, 0x0000FFFF, and 0xFF0000FF are all runs.  0x0F0F0000 is not,
61 /// since all 1s are not contiguous.
62 static inline bool isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) {
63   if (!Val)
64     return false;
65 
66   if (isShiftedMask_32(Val)) {
67     // look for the first non-zero bit
68     MB = countLeadingZeros(Val);
69     // look for the first zero bit after the run of ones
70     ME = countLeadingZeros((Val - 1) ^ Val);
71     return true;
72   } else {
73     Val = ~Val; // invert mask
74     if (isShiftedMask_32(Val)) {
75       // effectively look for the first zero bit
76       ME = countLeadingZeros(Val) - 1;
77       // effectively look for the first one bit after the run of zeros
78       MB = countLeadingZeros((Val - 1) ^ Val) + 1;
79       return true;
80     }
81   }
82   // no run present
83   return false;
84 }
85 
86 } // End llvm namespace
87 
88 // Generated files will use "namespace PPC". To avoid symbol clash,
89 // undefine PPC here. PPC may be predefined on some hosts.
90 #undef PPC
91 
92 // Defines symbolic names for PowerPC registers.  This defines a mapping from
93 // register name to register number.
94 //
95 #define GET_REGINFO_ENUM
96 #include "PPCGenRegisterInfo.inc"
97 
98 // Defines symbolic names for the PowerPC instructions.
99 //
100 #define GET_INSTRINFO_ENUM
101 #include "PPCGenInstrInfo.inc"
102 
103 #define GET_SUBTARGETINFO_ENUM
104 #include "PPCGenSubtargetInfo.inc"
105 
106 #endif
107