1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides PowerPC specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "PPCMCTargetDesc.h" 15 #include "PPCMCAsmInfo.h" 16 #include "InstPrinter/PPCInstPrinter.h" 17 #include "llvm/MC/MachineLocation.h" 18 #include "llvm/MC/MCCodeGenInfo.h" 19 #include "llvm/MC/MCInstrInfo.h" 20 #include "llvm/MC/MCRegisterInfo.h" 21 #include "llvm/MC/MCStreamer.h" 22 #include "llvm/MC/MCSubtargetInfo.h" 23 #include "llvm/Support/ErrorHandling.h" 24 #include "llvm/Support/TargetRegistry.h" 25 26 #define GET_INSTRINFO_MC_DESC 27 #include "PPCGenInstrInfo.inc" 28 29 #define GET_SUBTARGETINFO_MC_DESC 30 #include "PPCGenSubtargetInfo.inc" 31 32 #define GET_REGINFO_MC_DESC 33 #include "PPCGenRegisterInfo.inc" 34 35 using namespace llvm; 36 37 static MCInstrInfo *createPPCMCInstrInfo() { 38 MCInstrInfo *X = new MCInstrInfo(); 39 InitPPCMCInstrInfo(X); 40 return X; 41 } 42 43 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) { 44 Triple TheTriple(TT); 45 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64); 46 unsigned Flavour = isPPC64 ? 0 : 1; 47 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; 48 49 MCRegisterInfo *X = new MCRegisterInfo(); 50 InitPPCMCRegisterInfo(X, RA, Flavour, Flavour); 51 return X; 52 } 53 54 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU, 55 StringRef FS) { 56 MCSubtargetInfo *X = new MCSubtargetInfo(); 57 InitPPCMCSubtargetInfo(X, TT, CPU, FS); 58 return X; 59 } 60 61 static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) { 62 Triple TheTriple(TT); 63 bool isPPC64 = TheTriple.getArch() == Triple::ppc64; 64 65 MCAsmInfo *MAI; 66 if (TheTriple.isOSDarwin()) 67 MAI = new PPCMCAsmInfoDarwin(isPPC64); 68 else 69 MAI = new PPCLinuxMCAsmInfo(isPPC64); 70 71 // Initial state of the frame pointer is R1. 72 MachineLocation Dst(MachineLocation::VirtualFP); 73 MachineLocation Src(PPC::R1, 0); 74 MAI->addInitialFrameState(0, Dst, Src); 75 76 return MAI; 77 } 78 79 static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM, 80 CodeModel::Model CM, 81 CodeGenOpt::Level OL) { 82 MCCodeGenInfo *X = new MCCodeGenInfo(); 83 84 if (RM == Reloc::Default) { 85 Triple T(TT); 86 if (T.isOSDarwin()) 87 RM = Reloc::DynamicNoPIC; 88 else 89 RM = Reloc::Static; 90 } 91 X->InitMCCodeGenInfo(RM, CM, OL); 92 return X; 93 } 94 95 // This is duplicated code. Refactor this. 96 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, 97 MCContext &Ctx, MCAsmBackend &MAB, 98 raw_ostream &OS, 99 MCCodeEmitter *Emitter, 100 bool RelaxAll, 101 bool NoExecStack) { 102 if (Triple(TT).isOSDarwin()) 103 return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll); 104 105 return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack); 106 } 107 108 static MCInstPrinter *createPPCMCInstPrinter(const Target &T, 109 unsigned SyntaxVariant, 110 const MCAsmInfo &MAI, 111 const MCSubtargetInfo &STI) { 112 return new PPCInstPrinter(MAI, SyntaxVariant); 113 } 114 115 extern "C" void LLVMInitializePowerPCTargetMC() { 116 // Register the MC asm info. 117 RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo); 118 RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo); 119 120 // Register the MC codegen info. 121 TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo); 122 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo); 123 124 // Register the MC instruction info. 125 TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo); 126 TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo); 127 128 // Register the MC register info. 129 TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo); 130 TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo); 131 132 // Register the MC subtarget info. 133 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target, 134 createPPCMCSubtargetInfo); 135 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target, 136 createPPCMCSubtargetInfo); 137 138 // Register the MC Code Emitter 139 TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter); 140 TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter); 141 142 // Register the asm backend. 143 TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend); 144 TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend); 145 146 // Register the object streamer. 147 TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer); 148 TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer); 149 150 // Register the MCInstPrinter. 151 TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter); 152 TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter); 153 } 154