1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides PowerPC specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "PPCMCTargetDesc.h" 15 #include "PPCMCAsmInfo.h" 16 #include "InstPrinter/PPCInstPrinter.h" 17 #include "llvm/MC/MachineLocation.h" 18 #include "llvm/MC/MCCodeGenInfo.h" 19 #include "llvm/MC/MCInstrInfo.h" 20 #include "llvm/MC/MCRegisterInfo.h" 21 #include "llvm/MC/MCStreamer.h" 22 #include "llvm/MC/MCSubtargetInfo.h" 23 #include "llvm/Support/TargetRegistry.h" 24 25 #define GET_INSTRINFO_MC_DESC 26 #include "PPCGenInstrInfo.inc" 27 28 #define GET_SUBTARGETINFO_MC_DESC 29 #include "PPCGenSubtargetInfo.inc" 30 31 #define GET_REGINFO_MC_DESC 32 #include "PPCGenRegisterInfo.inc" 33 34 using namespace llvm; 35 36 static MCInstrInfo *createPPCMCInstrInfo() { 37 MCInstrInfo *X = new MCInstrInfo(); 38 InitPPCMCInstrInfo(X); 39 return X; 40 } 41 42 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) { 43 Triple TheTriple(TT); 44 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64); 45 unsigned Flavour = isPPC64 ? 0 : 1; 46 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; 47 48 MCRegisterInfo *X = new MCRegisterInfo(); 49 InitPPCMCRegisterInfo(X, RA, Flavour, Flavour); 50 return X; 51 } 52 53 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU, 54 StringRef FS) { 55 MCSubtargetInfo *X = new MCSubtargetInfo(); 56 InitPPCMCSubtargetInfo(X, TT, CPU, FS); 57 return X; 58 } 59 60 static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) { 61 Triple TheTriple(TT); 62 bool isPPC64 = TheTriple.getArch() == Triple::ppc64; 63 64 MCAsmInfo *MAI; 65 if (TheTriple.isOSDarwin()) 66 MAI = new PPCMCAsmInfoDarwin(isPPC64); 67 else 68 MAI = new PPCLinuxMCAsmInfo(isPPC64); 69 70 // Initial state of the frame pointer is R1. 71 MachineLocation Dst(MachineLocation::VirtualFP); 72 MachineLocation Src(PPC::R1, 0); 73 MAI->addInitialFrameState(0, Dst, Src); 74 75 return MAI; 76 } 77 78 static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM, 79 CodeModel::Model CM, 80 CodeGenOpt::Level OL) { 81 MCCodeGenInfo *X = new MCCodeGenInfo(); 82 83 if (RM == Reloc::Default) { 84 Triple T(TT); 85 if (T.isOSDarwin()) 86 RM = Reloc::DynamicNoPIC; 87 else 88 RM = Reloc::Static; 89 } 90 X->InitMCCodeGenInfo(RM, CM, OL); 91 return X; 92 } 93 94 // This is duplicated code. Refactor this. 95 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, 96 MCContext &Ctx, MCAsmBackend &MAB, 97 raw_ostream &OS, 98 MCCodeEmitter *Emitter, 99 bool RelaxAll, 100 bool NoExecStack) { 101 if (Triple(TT).isOSDarwin()) 102 return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll); 103 104 return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack); 105 } 106 107 static MCInstPrinter *createPPCMCInstPrinter(const Target &T, 108 unsigned SyntaxVariant, 109 const MCAsmInfo &MAI, 110 const MCSubtargetInfo &STI) { 111 return new PPCInstPrinter(MAI, SyntaxVariant); 112 } 113 114 extern "C" void LLVMInitializePowerPCTargetMC() { 115 // Register the MC asm info. 116 RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo); 117 RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo); 118 119 // Register the MC codegen info. 120 TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo); 121 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo); 122 123 // Register the MC instruction info. 124 TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo); 125 TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo); 126 127 // Register the MC register info. 128 TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo); 129 TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo); 130 131 // Register the MC subtarget info. 132 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target, 133 createPPCMCSubtargetInfo); 134 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target, 135 createPPCMCSubtargetInfo); 136 137 // Register the MC Code Emitter 138 TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter); 139 TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter); 140 141 // Register the asm backend. 142 TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend); 143 TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend); 144 145 // Register the object streamer. 146 TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer); 147 TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer); 148 149 // Register the MCInstPrinter. 150 TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter); 151 TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter); 152 } 153