1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides PowerPC specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "PPCMCTargetDesc.h" 15 #include "InstPrinter/PPCInstPrinter.h" 16 #include "PPCMCAsmInfo.h" 17 #include "PPCTargetStreamer.h" 18 #include "llvm/MC/MCCodeGenInfo.h" 19 #include "llvm/MC/MCInstrInfo.h" 20 #include "llvm/MC/MCRegisterInfo.h" 21 #include "llvm/MC/MCStreamer.h" 22 #include "llvm/MC/MCSubtargetInfo.h" 23 #include "llvm/MC/MCSymbol.h" 24 #include "llvm/MC/MachineLocation.h" 25 #include "llvm/Support/ErrorHandling.h" 26 #include "llvm/Support/FormattedStream.h" 27 #include "llvm/Support/TargetRegistry.h" 28 29 #define GET_INSTRINFO_MC_DESC 30 #include "PPCGenInstrInfo.inc" 31 32 #define GET_SUBTARGETINFO_MC_DESC 33 #include "PPCGenSubtargetInfo.inc" 34 35 #define GET_REGINFO_MC_DESC 36 #include "PPCGenRegisterInfo.inc" 37 38 using namespace llvm; 39 40 static MCInstrInfo *createPPCMCInstrInfo() { 41 MCInstrInfo *X = new MCInstrInfo(); 42 InitPPCMCInstrInfo(X); 43 return X; 44 } 45 46 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) { 47 Triple TheTriple(TT); 48 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || 49 TheTriple.getArch() == Triple::ppc64le); 50 unsigned Flavour = isPPC64 ? 0 : 1; 51 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; 52 53 MCRegisterInfo *X = new MCRegisterInfo(); 54 InitPPCMCRegisterInfo(X, RA, Flavour, Flavour); 55 return X; 56 } 57 58 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU, 59 StringRef FS) { 60 MCSubtargetInfo *X = new MCSubtargetInfo(); 61 InitPPCMCSubtargetInfo(X, TT, CPU, FS); 62 return X; 63 } 64 65 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) { 66 Triple TheTriple(TT); 67 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || 68 TheTriple.getArch() == Triple::ppc64le); 69 70 MCAsmInfo *MAI; 71 if (TheTriple.isOSDarwin()) 72 MAI = new PPCMCAsmInfoDarwin(isPPC64); 73 else 74 MAI = new PPCLinuxMCAsmInfo(isPPC64); 75 76 // Initial state of the frame pointer is R1. 77 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1; 78 MCCFIInstruction Inst = 79 MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(Reg, true), 0); 80 MAI->addInitialFrameState(Inst); 81 82 return MAI; 83 } 84 85 static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM, 86 CodeModel::Model CM, 87 CodeGenOpt::Level OL) { 88 MCCodeGenInfo *X = new MCCodeGenInfo(); 89 90 if (RM == Reloc::Default) { 91 Triple T(TT); 92 if (T.isOSDarwin()) 93 RM = Reloc::DynamicNoPIC; 94 else 95 RM = Reloc::Static; 96 } 97 if (CM == CodeModel::Default) { 98 Triple T(TT); 99 if (!T.isOSDarwin() && 100 (T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le)) 101 CM = CodeModel::Medium; 102 } 103 X->InitMCCodeGenInfo(RM, CM, OL); 104 return X; 105 } 106 107 namespace { 108 class PPCTargetAsmStreamer : public PPCTargetStreamer { 109 formatted_raw_ostream &OS; 110 111 public: 112 PPCTargetAsmStreamer(formatted_raw_ostream &OS) : OS(OS) {} 113 virtual void emitTCEntry(const MCSymbol &S) { 114 OS << "\t.tc "; 115 OS << S.getName(); 116 OS << "[TC],"; 117 OS << S.getName(); 118 OS << '\n'; 119 } 120 }; 121 122 class PPCTargetELFStreamer : public PPCTargetStreamer { 123 virtual void emitTCEntry(const MCSymbol &S) { 124 // Creates a R_PPC64_TOC relocation 125 Streamer->EmitSymbolValue(&S, 8); 126 } 127 }; 128 } 129 130 // This is duplicated code. Refactor this. 131 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, 132 MCContext &Ctx, MCAsmBackend &MAB, 133 raw_ostream &OS, 134 MCCodeEmitter *Emitter, 135 bool RelaxAll, 136 bool NoExecStack) { 137 if (Triple(TT).isOSDarwin()) 138 return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll); 139 140 PPCTargetStreamer *S = new PPCTargetELFStreamer(); 141 return createELFStreamer(Ctx, S, MAB, OS, Emitter, RelaxAll, NoExecStack); 142 } 143 144 static MCStreamer * 145 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS, 146 bool isVerboseAsm, bool useLoc, bool useCFI, 147 bool useDwarfDirectory, MCInstPrinter *InstPrint, 148 MCCodeEmitter *CE, MCAsmBackend *TAB, bool ShowInst) { 149 PPCTargetStreamer *S = new PPCTargetAsmStreamer(OS); 150 151 return llvm::createAsmStreamer(Ctx, S, OS, isVerboseAsm, useLoc, useCFI, 152 useDwarfDirectory, InstPrint, CE, TAB, 153 ShowInst); 154 } 155 156 static MCInstPrinter *createPPCMCInstPrinter(const Target &T, 157 unsigned SyntaxVariant, 158 const MCAsmInfo &MAI, 159 const MCInstrInfo &MII, 160 const MCRegisterInfo &MRI, 161 const MCSubtargetInfo &STI) { 162 bool isDarwin = Triple(STI.getTargetTriple()).isOSDarwin(); 163 return new PPCInstPrinter(MAI, MII, MRI, isDarwin); 164 } 165 166 extern "C" void LLVMInitializePowerPCTargetMC() { 167 // Register the MC asm info. 168 RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo); 169 RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo); 170 RegisterMCAsmInfoFn E(ThePPC64LETarget, createPPCMCAsmInfo); 171 172 // Register the MC codegen info. 173 TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo); 174 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo); 175 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64LETarget, 176 createPPCMCCodeGenInfo); 177 178 // Register the MC instruction info. 179 TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo); 180 TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo); 181 TargetRegistry::RegisterMCInstrInfo(ThePPC64LETarget, 182 createPPCMCInstrInfo); 183 184 // Register the MC register info. 185 TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo); 186 TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo); 187 TargetRegistry::RegisterMCRegInfo(ThePPC64LETarget, createPPCMCRegisterInfo); 188 189 // Register the MC subtarget info. 190 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target, 191 createPPCMCSubtargetInfo); 192 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target, 193 createPPCMCSubtargetInfo); 194 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64LETarget, 195 createPPCMCSubtargetInfo); 196 197 // Register the MC Code Emitter 198 TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter); 199 TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter); 200 TargetRegistry::RegisterMCCodeEmitter(ThePPC64LETarget, 201 createPPCMCCodeEmitter); 202 203 // Register the asm backend. 204 TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend); 205 TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend); 206 TargetRegistry::RegisterMCAsmBackend(ThePPC64LETarget, createPPCAsmBackend); 207 208 // Register the object streamer. 209 TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer); 210 TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer); 211 TargetRegistry::RegisterMCObjectStreamer(ThePPC64LETarget, createMCStreamer); 212 213 // Register the asm streamer. 214 TargetRegistry::RegisterAsmStreamer(ThePPC32Target, createMCAsmStreamer); 215 TargetRegistry::RegisterAsmStreamer(ThePPC64Target, createMCAsmStreamer); 216 TargetRegistry::RegisterAsmStreamer(ThePPC64LETarget, createMCAsmStreamer); 217 218 // Register the MCInstPrinter. 219 TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter); 220 TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter); 221 TargetRegistry::RegisterMCInstPrinter(ThePPC64LETarget, 222 createPPCMCInstPrinter); 223 } 224