1 //===-- PPCMCCodeEmitter.h - Convert PPC code to machine code -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the PPCMCCodeEmitter class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H
14 #define LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H
15 
16 #include "llvm/MC/MCAsmInfo.h"
17 #include "llvm/MC/MCCodeEmitter.h"
18 #include "llvm/MC/MCSubtargetInfo.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCContext.h"
21 #include "llvm/MC/MCInst.h"
22 
23 namespace llvm {
24 
25 class PPCMCCodeEmitter : public MCCodeEmitter {
26   const MCInstrInfo &MCII;
27   const MCContext &CTX;
28   bool IsLittleEndian;
29 
30 public:
31   PPCMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx)
32       : MCII(mcii), CTX(ctx),
33         IsLittleEndian(ctx.getAsmInfo()->isLittleEndian()) {}
34   PPCMCCodeEmitter(const PPCMCCodeEmitter &) = delete;
35   void operator=(const PPCMCCodeEmitter &) = delete;
36   ~PPCMCCodeEmitter() override = default;
37 
38   unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo,
39                                SmallVectorImpl<MCFixup> &Fixups,
40                                const MCSubtargetInfo &STI) const;
41   unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo,
42                              SmallVectorImpl<MCFixup> &Fixups,
43                              const MCSubtargetInfo &STI) const;
44   unsigned getAbsDirectBrEncoding(const MCInst &MI, unsigned OpNo,
45                                   SmallVectorImpl<MCFixup> &Fixups,
46                                   const MCSubtargetInfo &STI) const;
47   unsigned getAbsCondBrEncoding(const MCInst &MI, unsigned OpNo,
48                                 SmallVectorImpl<MCFixup> &Fixups,
49                                 const MCSubtargetInfo &STI) const;
50   unsigned getImm16Encoding(const MCInst &MI, unsigned OpNo,
51                             SmallVectorImpl<MCFixup> &Fixups,
52                             const MCSubtargetInfo &STI) const;
53   unsigned getMemRIEncoding(const MCInst &MI, unsigned OpNo,
54                             SmallVectorImpl<MCFixup> &Fixups,
55                             const MCSubtargetInfo &STI) const;
56   unsigned getMemRIXEncoding(const MCInst &MI, unsigned OpNo,
57                              SmallVectorImpl<MCFixup> &Fixups,
58                              const MCSubtargetInfo &STI) const;
59   unsigned getMemRIX16Encoding(const MCInst &MI, unsigned OpNo,
60                                SmallVectorImpl<MCFixup> &Fixups,
61                                const MCSubtargetInfo &STI) const;
62   uint64_t getMemRI34PCRelEncoding(const MCInst &MI, unsigned OpNo,
63                                    SmallVectorImpl<MCFixup> &Fixups,
64                                    const MCSubtargetInfo &STI) const;
65   uint64_t getMemRI34Encoding(const MCInst &MI, unsigned OpNo,
66                               SmallVectorImpl<MCFixup> &Fixups,
67                               const MCSubtargetInfo &STI) const;
68   unsigned getSPE8DisEncoding(const MCInst &MI, unsigned OpNo,
69                               SmallVectorImpl<MCFixup> &Fixups,
70                               const MCSubtargetInfo &STI) const;
71   unsigned getSPE4DisEncoding(const MCInst &MI, unsigned OpNo,
72                               SmallVectorImpl<MCFixup> &Fixups,
73                               const MCSubtargetInfo &STI) const;
74   unsigned getSPE2DisEncoding(const MCInst &MI, unsigned OpNo,
75                               SmallVectorImpl<MCFixup> &Fixups,
76                               const MCSubtargetInfo &STI) const;
77   unsigned getTLSRegEncoding(const MCInst &MI, unsigned OpNo,
78                              SmallVectorImpl<MCFixup> &Fixups,
79                              const MCSubtargetInfo &STI) const;
80   unsigned getTLSCallEncoding(const MCInst &MI, unsigned OpNo,
81                               SmallVectorImpl<MCFixup> &Fixups,
82                               const MCSubtargetInfo &STI) const;
83   unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo,
84                                SmallVectorImpl<MCFixup> &Fixups,
85                                const MCSubtargetInfo &STI) const;
86 
87   /// getMachineOpValue - Return binary encoding of operand. If the machine
88   /// operand requires relocation, record the relocation and return zero.
89   uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
90                              SmallVectorImpl<MCFixup> &Fixups,
91                              const MCSubtargetInfo &STI) const;
92 
93   // getBinaryCodeForInstr - TableGen'erated function for getting the
94   // binary encoding for an instruction.
95   uint64_t getBinaryCodeForInstr(const MCInst &MI,
96                                  SmallVectorImpl<MCFixup> &Fixups,
97                                  const MCSubtargetInfo &STI) const;
98 
99   void encodeInstruction(const MCInst &MI, raw_ostream &OS,
100                          SmallVectorImpl<MCFixup> &Fixups,
101                          const MCSubtargetInfo &STI) const override;
102 
103   // Get the number of bytes used to encode the given MCInst.
104   unsigned getInstSizeInBytes(const MCInst &MI) const;
105 
106   // Is this instruction a prefixed instruction.
107   bool isPrefixedInstruction(const MCInst &MI) const;
108 
109 private:
110   FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) const;
111   void
112   verifyInstructionPredicates(const MCInst &MI,
113                               const FeatureBitset &AvailableFeatures) const;
114 };
115 
116 } // namespace llvm
117 
118 #endif // LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H
119