1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "MCTargetDesc/PPCMCTargetDesc.h" 11 #include "MCTargetDesc/PPCFixupKinds.h" 12 #include "llvm/MC/MCAsmBackend.h" 13 #include "llvm/MC/MCELFObjectWriter.h" 14 #include "llvm/MC/MCFixupKindInfo.h" 15 #include "llvm/MC/MCMachObjectWriter.h" 16 #include "llvm/MC/MCObjectWriter.h" 17 #include "llvm/MC/MCSectionMachO.h" 18 #include "llvm/MC/MCValue.h" 19 #include "llvm/Object/MachOFormat.h" 20 #include "llvm/Support/ELF.h" 21 #include "llvm/Support/ErrorHandling.h" 22 #include "llvm/Support/TargetRegistry.h" 23 using namespace llvm; 24 25 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { 26 switch (Kind) { 27 default: 28 llvm_unreachable("Unknown fixup kind!"); 29 case FK_Data_1: 30 case FK_Data_2: 31 case FK_Data_4: 32 case FK_Data_8: 33 case PPC::fixup_ppc_tlsreg: 34 case PPC::fixup_ppc_nofixup: 35 return Value; 36 case PPC::fixup_ppc_brcond14: 37 case PPC::fixup_ppc_brcond14abs: 38 return Value & 0xfffc; 39 case PPC::fixup_ppc_br24: 40 case PPC::fixup_ppc_br24abs: 41 return Value & 0x3fffffc; 42 case PPC::fixup_ppc_half16: 43 return Value & 0xffff; 44 case PPC::fixup_ppc_half16ds: 45 return Value & 0xfffc; 46 } 47 } 48 49 static unsigned getFixupKindNumBytes(unsigned Kind) { 50 switch (Kind) { 51 default: 52 llvm_unreachable("Unknown fixup kind!"); 53 case FK_Data_1: 54 return 1; 55 case FK_Data_2: 56 case PPC::fixup_ppc_half16: 57 case PPC::fixup_ppc_half16ds: 58 return 2; 59 case FK_Data_4: 60 case PPC::fixup_ppc_brcond14: 61 case PPC::fixup_ppc_brcond14abs: 62 case PPC::fixup_ppc_br24: 63 case PPC::fixup_ppc_br24abs: 64 return 4; 65 case FK_Data_8: 66 return 8; 67 case PPC::fixup_ppc_tlsreg: 68 case PPC::fixup_ppc_nofixup: 69 return 0; 70 } 71 } 72 73 namespace { 74 class PPCMachObjectWriter : public MCMachObjectTargetWriter { 75 public: 76 PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, 77 uint32_t CPUSubtype) 78 : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {} 79 80 void RecordRelocation(MachObjectWriter *Writer, 81 const MCAssembler &Asm, const MCAsmLayout &Layout, 82 const MCFragment *Fragment, const MCFixup &Fixup, 83 MCValue Target, uint64_t &FixedValue) { 84 llvm_unreachable("Relocation emission for MachO/PPC unimplemented!"); 85 } 86 }; 87 88 class PPCAsmBackend : public MCAsmBackend { 89 const Target &TheTarget; 90 public: 91 PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {} 92 93 unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; } 94 95 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const { 96 const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = { 97 // name offset bits flags 98 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, 99 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel }, 100 { "fixup_ppc_br24abs", 6, 24, 0 }, 101 { "fixup_ppc_brcond14abs", 16, 14, 0 }, 102 { "fixup_ppc_half16", 0, 16, 0 }, 103 { "fixup_ppc_half16ds", 0, 14, 0 }, 104 { "fixup_ppc_tlsreg", 0, 0, 0 }, 105 { "fixup_ppc_nofixup", 0, 0, 0 } 106 }; 107 108 if (Kind < FirstTargetFixupKind) 109 return MCAsmBackend::getFixupKindInfo(Kind); 110 111 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 112 "Invalid kind!"); 113 return Infos[Kind - FirstTargetFixupKind]; 114 } 115 116 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 117 uint64_t Value) const { 118 Value = adjustFixupValue(Fixup.getKind(), Value); 119 if (!Value) return; // Doesn't change encoding. 120 121 unsigned Offset = Fixup.getOffset(); 122 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); 123 124 // For each byte of the fragment that the fixup touches, mask in the bits 125 // from the fixup value. The Value has been "split up" into the appropriate 126 // bitfields above. 127 for (unsigned i = 0; i != NumBytes; ++i) 128 Data[Offset + i] |= uint8_t((Value >> ((NumBytes - i - 1)*8)) & 0xff); 129 } 130 131 bool mayNeedRelaxation(const MCInst &Inst) const { 132 // FIXME. 133 return false; 134 } 135 136 bool fixupNeedsRelaxation(const MCFixup &Fixup, 137 uint64_t Value, 138 const MCRelaxableFragment *DF, 139 const MCAsmLayout &Layout) const { 140 // FIXME. 141 llvm_unreachable("relaxInstruction() unimplemented"); 142 } 143 144 145 void relaxInstruction(const MCInst &Inst, MCInst &Res) const { 146 // FIXME. 147 llvm_unreachable("relaxInstruction() unimplemented"); 148 } 149 150 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const { 151 // FIXME: Zero fill for now. That's not right, but at least will get the 152 // section size right. 153 for (uint64_t i = 0; i != Count; ++i) 154 OW->Write8(0); 155 return true; 156 } 157 158 unsigned getPointerSize() const { 159 StringRef Name = TheTarget.getName(); 160 if (Name == "ppc64") return 8; 161 assert(Name == "ppc32" && "Unknown target name!"); 162 return 4; 163 } 164 }; 165 } // end anonymous namespace 166 167 168 // FIXME: This should be in a separate file. 169 namespace { 170 class DarwinPPCAsmBackend : public PPCAsmBackend { 171 public: 172 DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { } 173 174 MCObjectWriter *createObjectWriter(raw_ostream &OS) const { 175 bool is64 = getPointerSize() == 8; 176 return createMachObjectWriter(new PPCMachObjectWriter( 177 /*Is64Bit=*/is64, 178 (is64 ? object::mach::CTM_PowerPC64 : 179 object::mach::CTM_PowerPC), 180 object::mach::CSPPC_ALL), 181 OS, /*IsLittleEndian=*/false); 182 } 183 184 virtual bool doesSectionRequireSymbols(const MCSection &Section) const { 185 return false; 186 } 187 }; 188 189 class ELFPPCAsmBackend : public PPCAsmBackend { 190 uint8_t OSABI; 191 public: 192 ELFPPCAsmBackend(const Target &T, uint8_t OSABI) : 193 PPCAsmBackend(T), OSABI(OSABI) { } 194 195 196 MCObjectWriter *createObjectWriter(raw_ostream &OS) const { 197 bool is64 = getPointerSize() == 8; 198 return createPPCELFObjectWriter(OS, is64, OSABI); 199 } 200 201 virtual bool doesSectionRequireSymbols(const MCSection &Section) const { 202 return false; 203 } 204 }; 205 206 } // end anonymous namespace 207 208 209 210 211 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) { 212 if (Triple(TT).isOSDarwin()) 213 return new DarwinPPCAsmBackend(T); 214 215 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS()); 216 return new ELFPPCAsmBackend(T, OSABI); 217 } 218