1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "MCTargetDesc/PPCFixupKinds.h"
10 #include "MCTargetDesc/PPCMCTargetDesc.h"
11 #include "llvm/BinaryFormat/ELF.h"
12 #include "llvm/BinaryFormat/MachO.h"
13 #include "llvm/MC/MCAsmBackend.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCELFObjectWriter.h"
16 #include "llvm/MC/MCFixupKindInfo.h"
17 #include "llvm/MC/MCMachObjectWriter.h"
18 #include "llvm/MC/MCObjectWriter.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/MCSymbolELF.h"
22 #include "llvm/MC/MCValue.h"
23 #include "llvm/Object/MachO.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/TargetRegistry.h"
26 using namespace llvm;
27 
28 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
29   switch (Kind) {
30   default:
31     llvm_unreachable("Unknown fixup kind!");
32   case FK_NONE:
33   case FK_Data_1:
34   case FK_Data_2:
35   case FK_Data_4:
36   case FK_Data_8:
37   case PPC::fixup_ppc_nofixup:
38     return Value;
39   case PPC::fixup_ppc_brcond14:
40   case PPC::fixup_ppc_brcond14abs:
41     return Value & 0xfffc;
42   case PPC::fixup_ppc_br24:
43   case PPC::fixup_ppc_br24abs:
44     return Value & 0x3fffffc;
45   case PPC::fixup_ppc_half16:
46     return Value & 0xffff;
47   case PPC::fixup_ppc_half16ds:
48     return Value & 0xfffc;
49   }
50 }
51 
52 static unsigned getFixupKindNumBytes(unsigned Kind) {
53   switch (Kind) {
54   default:
55     llvm_unreachable("Unknown fixup kind!");
56   case FK_NONE:
57     return 0;
58   case FK_Data_1:
59     return 1;
60   case FK_Data_2:
61   case PPC::fixup_ppc_half16:
62   case PPC::fixup_ppc_half16ds:
63     return 2;
64   case FK_Data_4:
65   case PPC::fixup_ppc_brcond14:
66   case PPC::fixup_ppc_brcond14abs:
67   case PPC::fixup_ppc_br24:
68   case PPC::fixup_ppc_br24abs:
69     return 4;
70   case FK_Data_8:
71     return 8;
72   case PPC::fixup_ppc_nofixup:
73     return 0;
74   }
75 }
76 
77 namespace {
78 
79 class PPCAsmBackend : public MCAsmBackend {
80 protected:
81   Triple TT;
82 public:
83   PPCAsmBackend(const Target &T, const Triple &TT)
84       : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big),
85         TT(TT) {}
86 
87   unsigned getNumFixupKinds() const override {
88     return PPC::NumTargetFixupKinds;
89   }
90 
91   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
92     const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
93       // name                    offset  bits  flags
94       { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
95       { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
96       { "fixup_ppc_br24abs",     6,      24,   0 },
97       { "fixup_ppc_brcond14abs", 16,     14,   0 },
98       { "fixup_ppc_half16",       0,     16,   0 },
99       { "fixup_ppc_half16ds",     0,     14,   0 },
100       { "fixup_ppc_nofixup",      0,      0,   0 }
101     };
102     const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
103       // name                    offset  bits  flags
104       { "fixup_ppc_br24",        2,      24,   MCFixupKindInfo::FKF_IsPCRel },
105       { "fixup_ppc_brcond14",    2,      14,   MCFixupKindInfo::FKF_IsPCRel },
106       { "fixup_ppc_br24abs",     2,      24,   0 },
107       { "fixup_ppc_brcond14abs", 2,      14,   0 },
108       { "fixup_ppc_half16",      0,      16,   0 },
109       { "fixup_ppc_half16ds",    2,      14,   0 },
110       { "fixup_ppc_nofixup",     0,       0,   0 }
111     };
112 
113     if (Kind < FirstTargetFixupKind)
114       return MCAsmBackend::getFixupKindInfo(Kind);
115 
116     assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
117            "Invalid kind!");
118     return (Endian == support::little
119                 ? InfosLE
120                 : InfosBE)[Kind - FirstTargetFixupKind];
121   }
122 
123   void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
124                   const MCValue &Target, MutableArrayRef<char> Data,
125                   uint64_t Value, bool IsResolved,
126                   const MCSubtargetInfo *STI) const override {
127     Value = adjustFixupValue(Fixup.getKind(), Value);
128     if (!Value) return;           // Doesn't change encoding.
129 
130     unsigned Offset = Fixup.getOffset();
131     unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
132 
133     // For each byte of the fragment that the fixup touches, mask in the bits
134     // from the fixup value. The Value has been "split up" into the appropriate
135     // bitfields above.
136     for (unsigned i = 0; i != NumBytes; ++i) {
137       unsigned Idx = Endian == support::little ? i : (NumBytes - 1 - i);
138       Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
139     }
140   }
141 
142   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
143                              const MCValue &Target) override {
144     switch ((unsigned)Fixup.getKind()) {
145     default:
146       return false;
147     case FK_NONE:
148       return true;
149     case PPC::fixup_ppc_br24:
150     case PPC::fixup_ppc_br24abs:
151       // If the target symbol has a local entry point we must not attempt
152       // to resolve the fixup directly.  Emit a relocation and leave
153       // resolution of the final target address to the linker.
154       if (const MCSymbolRefExpr *A = Target.getSymA()) {
155         if (const auto *S = dyn_cast<MCSymbolELF>(&A->getSymbol())) {
156           // The "other" values are stored in the last 6 bits of the second
157           // byte. The traditional defines for STO values assume the full byte
158           // and thus the shift to pack it.
159           unsigned Other = S->getOther() << 2;
160           if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0)
161             return true;
162         }
163       }
164       return false;
165     }
166   }
167 
168   bool mayNeedRelaxation(const MCInst &Inst,
169                          const MCSubtargetInfo &STI) const override {
170     // FIXME.
171     return false;
172   }
173 
174   bool fixupNeedsRelaxation(const MCFixup &Fixup,
175                             uint64_t Value,
176                             const MCRelaxableFragment *DF,
177                             const MCAsmLayout &Layout) const override {
178     // FIXME.
179     llvm_unreachable("relaxInstruction() unimplemented");
180   }
181 
182   void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
183                         MCInst &Res) const override {
184     // FIXME.
185     llvm_unreachable("relaxInstruction() unimplemented");
186   }
187 
188   bool writeNopData(raw_ostream &OS, uint64_t Count) const override {
189     uint64_t NumNops = Count / 4;
190     for (uint64_t i = 0; i != NumNops; ++i)
191       support::endian::write<uint32_t>(OS, 0x60000000, Endian);
192 
193     OS.write_zeros(Count % 4);
194 
195     return true;
196   }
197 };
198 } // end anonymous namespace
199 
200 
201 // FIXME: This should be in a separate file.
202 namespace {
203 
204 class DarwinPPCAsmBackend : public PPCAsmBackend {
205 public:
206   DarwinPPCAsmBackend(const Target &T, const Triple &TT)
207       : PPCAsmBackend(T, TT) {}
208 
209   std::unique_ptr<MCObjectTargetWriter>
210   createObjectTargetWriter() const override {
211     uint32_t CPUType = cantFail(MachO::getCPUType(TT));
212     uint32_t CPUSubType = cantFail(MachO::getCPUSubType(TT));
213     return createPPCMachObjectWriter(TT.isArch64Bit(), CPUType, CPUSubType);
214   }
215 };
216 
217 class ELFPPCAsmBackend : public PPCAsmBackend {
218 public:
219   ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {}
220 
221   std::unique_ptr<MCObjectTargetWriter>
222   createObjectTargetWriter() const override {
223     uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
224     bool Is64 = TT.isPPC64();
225     return createPPCELFObjectWriter(Is64, OSABI);
226   }
227 
228   Optional<MCFixupKind> getFixupKind(StringRef Name) const override;
229 };
230 
231 class XCOFFPPCAsmBackend : public PPCAsmBackend {
232 public:
233   XCOFFPPCAsmBackend(const Target &T, const Triple &TT)
234       : PPCAsmBackend(T, TT) {}
235 
236   std::unique_ptr<MCObjectTargetWriter>
237   createObjectTargetWriter() const override {
238     return createPPCXCOFFObjectWriter(TT.isArch64Bit());
239   }
240 };
241 
242 } // end anonymous namespace
243 
244 Optional<MCFixupKind> ELFPPCAsmBackend::getFixupKind(StringRef Name) const {
245   if (TT.isPPC64()) {
246     if (Name == "R_PPC64_NONE")
247       return FK_NONE;
248   } else {
249     if (Name == "R_PPC_NONE")
250       return FK_NONE;
251   }
252   return MCAsmBackend::getFixupKind(Name);
253 }
254 
255 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
256                                         const MCSubtargetInfo &STI,
257                                         const MCRegisterInfo &MRI,
258                                         const MCTargetOptions &Options) {
259   const Triple &TT = STI.getTargetTriple();
260   if (TT.isOSDarwin())
261     return new DarwinPPCAsmBackend(T, TT);
262 
263   if (TT.isOSBinFormatXCOFF())
264     return new XCOFFPPCAsmBackend(T, TT);
265 
266   return new ELFPPCAsmBackend(T, TT);
267 }
268