1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/MC/MCAsmBackend.h"
11 #include "MCTargetDesc/PPCMCTargetDesc.h"
12 #include "MCTargetDesc/PPCFixupKinds.h"
13 #include "llvm/MC/MCELFObjectWriter.h"
14 #include "llvm/MC/MCMachObjectWriter.h"
15 #include "llvm/MC/MCSectionMachO.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCValue.h"
18 #include "llvm/Object/MachOFormat.h"
19 #include "llvm/Support/ELF.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/TargetRegistry.h"
22 using namespace llvm;
23 
24 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
25   switch (Kind) {
26   default:
27     llvm_unreachable("Unknown fixup kind!");
28   case FK_Data_1:
29   case FK_Data_2:
30   case FK_Data_4:
31     return Value;
32   case PPC::fixup_ppc_brcond14:
33     return Value & 0x3ffc;
34   case PPC::fixup_ppc_br24:
35     return Value & 0x3fffffc;
36 #if 0
37   case PPC::fixup_ppc_hi16:
38     return (Value >> 16) & 0xffff;
39 #endif
40   case PPC::fixup_ppc_ha16:
41     return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
42   case PPC::fixup_ppc_lo16:
43     return Value & 0xffff;
44   }
45 }
46 
47 namespace {
48 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
49 public:
50   PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
51                       uint32_t CPUSubtype)
52     : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
53 
54   void RecordRelocation(MachObjectWriter *Writer,
55                         const MCAssembler &Asm, const MCAsmLayout &Layout,
56                         const MCFragment *Fragment, const MCFixup &Fixup,
57                         MCValue Target, uint64_t &FixedValue) {}
58 };
59 
60 class PPCELFObjectWriter : public MCELFObjectTargetWriter {
61 public:
62   PPCELFObjectWriter(bool Is64Bit, Triple::OSType OSType, uint16_t EMachine,
63                      bool HasRelocationAddend, bool isLittleEndian)
64     : MCELFObjectTargetWriter(Is64Bit, OSType, EMachine, HasRelocationAddend) {}
65 };
66 
67 class PPCAsmBackend : public MCAsmBackend {
68 const Target &TheTarget;
69 public:
70   PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
71 
72   unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
73 
74   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
75     const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
76       // name                    offset  bits  flags
77       { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
78       { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
79       { "fixup_ppc_lo16",        16,     16,   0 },
80       { "fixup_ppc_ha16",        16,     16,   0 },
81       { "fixup_ppc_lo14",        16,     14,   0 }
82     };
83 
84     if (Kind < FirstTargetFixupKind)
85       return MCAsmBackend::getFixupKindInfo(Kind);
86 
87     assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
88            "Invalid kind!");
89     return Infos[Kind - FirstTargetFixupKind];
90   }
91 
92   bool MayNeedRelaxation(const MCInst &Inst) const {
93     // FIXME.
94     return false;
95   }
96 
97   bool fixupNeedsRelaxation(const MCFixup &Fixup,
98                             uint64_t Value,
99                             const MCInstFragment *DF,
100                             const MCAsmLayout &Layout) const {
101     // FIXME.
102     assert(0 && "RelaxInstruction() unimplemented");
103   }
104 
105 
106   void RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
107     // FIXME.
108     assert(0 && "RelaxInstruction() unimplemented");
109   }
110 
111   bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
112     // FIXME: Zero fill for now. That's not right, but at least will get the
113     // section size right.
114     for (uint64_t i = 0; i != Count; ++i)
115       OW->Write8(0);
116     return true;
117   }
118 
119   unsigned getPointerSize() const {
120     StringRef Name = TheTarget.getName();
121     if (Name == "ppc64") return 8;
122     assert(Name == "ppc32" && "Unknown target name!");
123     return 4;
124   }
125 };
126 } // end anonymous namespace
127 
128 
129 // FIXME: This should be in a separate file.
130 namespace {
131   class DarwinPPCAsmBackend : public PPCAsmBackend {
132   public:
133     DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
134 
135     void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
136                     uint64_t Value) const {
137       assert(0 && "UNIMP");
138     }
139 
140     MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
141       bool is64 = getPointerSize() == 8;
142       return createMachObjectWriter(new PPCMachObjectWriter(
143                                       /*Is64Bit=*/is64,
144                                       (is64 ? object::mach::CTM_PowerPC64 :
145                                        object::mach::CTM_PowerPC),
146                                       object::mach::CSPPC_ALL),
147                                     OS, /*IsLittleEndian=*/false);
148     }
149 
150     virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
151       return false;
152     }
153   };
154 
155   class ELFPPCAsmBackend : public PPCAsmBackend {
156     Triple::OSType OSType;
157   public:
158     ELFPPCAsmBackend(const Target &T, Triple::OSType OSType) :
159       PPCAsmBackend(T), OSType(OSType) { }
160 
161     void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
162                     uint64_t Value) const {
163       Value = adjustFixupValue(Fixup.getKind(), Value);
164       if (!Value) return;           // Doesn't change encoding.
165 
166       unsigned Offset = Fixup.getOffset();
167 
168       // For each byte of the fragment that the fixup touches, mask in the bits from
169       // the fixup value. The Value has been "split up" into the appropriate
170       // bitfields above.
171       for (unsigned i = 0; i != 4; ++i)
172         Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
173     }
174 
175     MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
176       bool is64 = getPointerSize() == 8;
177       return createELFObjectWriter(new PPCELFObjectWriter(
178                                       /*Is64Bit=*/is64,
179                                       OSType,
180                                       is64 ? ELF::EM_PPC64 : ELF::EM_PPC,
181                                       /*addend*/ true, /*isLittleEndian*/ false),
182                                    OS, /*IsLittleEndian=*/false);
183     }
184 
185     virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
186       return false;
187     }
188   };
189 
190 } // end anonymous namespace
191 
192 
193 
194 
195 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT) {
196   if (Triple(TT).isOSDarwin())
197     return new DarwinPPCAsmBackend(T);
198 
199   return new ELFPPCAsmBackend(T, Triple(TT).getOS());
200 }
201