1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "MCTargetDesc/PPCMCTargetDesc.h"
11 #include "MCTargetDesc/PPCFixupKinds.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCELFObjectWriter.h"
14 #include "llvm/MC/MCFixupKindInfo.h"
15 #include "llvm/MC/MCMachObjectWriter.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCSectionMachO.h"
18 #include "llvm/MC/MCValue.h"
19 #include "llvm/Object/MachOFormat.h"
20 #include "llvm/Support/ELF.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/TargetRegistry.h"
23 using namespace llvm;
24 
25 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
26   switch (Kind) {
27   default:
28     llvm_unreachable("Unknown fixup kind!");
29   case FK_Data_1:
30   case FK_Data_2:
31   case FK_Data_4:
32   case FK_Data_8:
33   case PPC::fixup_ppc_tlsreg:
34   case PPC::fixup_ppc_nofixup:
35     return Value;
36   case PPC::fixup_ppc_brcond14:
37     return Value & 0xfffc;
38   case PPC::fixup_ppc_br24:
39     return Value & 0x3fffffc;
40   case PPC::fixup_ppc_half16:
41     return Value & 0xffff;
42   case PPC::fixup_ppc_half16ds:
43     return Value & 0xfffc;
44   }
45 }
46 
47 static unsigned getFixupKindNumBytes(unsigned Kind) {
48   switch (Kind) {
49   default:
50     llvm_unreachable("Unknown fixup kind!");
51   case FK_Data_1:
52     return 1;
53   case FK_Data_2:
54   case PPC::fixup_ppc_half16:
55   case PPC::fixup_ppc_half16ds:
56     return 2;
57   case FK_Data_4:
58   case PPC::fixup_ppc_brcond14:
59   case PPC::fixup_ppc_br24:
60     return 4;
61   case FK_Data_8:
62     return 8;
63   case PPC::fixup_ppc_tlsreg:
64   case PPC::fixup_ppc_nofixup:
65     return 0;
66   }
67 }
68 
69 namespace {
70 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
71 public:
72   PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
73                       uint32_t CPUSubtype)
74     : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
75 
76   void RecordRelocation(MachObjectWriter *Writer,
77                         const MCAssembler &Asm, const MCAsmLayout &Layout,
78                         const MCFragment *Fragment, const MCFixup &Fixup,
79                         MCValue Target, uint64_t &FixedValue) {
80     llvm_unreachable("Relocation emission for MachO/PPC unimplemented!");
81   }
82 };
83 
84 class PPCAsmBackend : public MCAsmBackend {
85 const Target &TheTarget;
86 public:
87   PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
88 
89   unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
90 
91   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
92     const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
93       // name                    offset  bits  flags
94       { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
95       { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
96       { "fixup_ppc_half16",       0,     16,   0 },
97       { "fixup_ppc_half16ds",     0,     14,   0 },
98       { "fixup_ppc_tlsreg",       0,      0,   0 },
99       { "fixup_ppc_nofixup",      0,      0,   0 }
100     };
101 
102     if (Kind < FirstTargetFixupKind)
103       return MCAsmBackend::getFixupKindInfo(Kind);
104 
105     assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
106            "Invalid kind!");
107     return Infos[Kind - FirstTargetFixupKind];
108   }
109 
110   void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
111                   uint64_t Value) const {
112     Value = adjustFixupValue(Fixup.getKind(), Value);
113     if (!Value) return;           // Doesn't change encoding.
114 
115     unsigned Offset = Fixup.getOffset();
116     unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
117 
118     // For each byte of the fragment that the fixup touches, mask in the bits
119     // from the fixup value. The Value has been "split up" into the appropriate
120     // bitfields above.
121     for (unsigned i = 0; i != NumBytes; ++i)
122       Data[Offset + i] |= uint8_t((Value >> ((NumBytes - i - 1)*8)) & 0xff);
123   }
124 
125   bool mayNeedRelaxation(const MCInst &Inst) const {
126     // FIXME.
127     return false;
128   }
129 
130   bool fixupNeedsRelaxation(const MCFixup &Fixup,
131                             uint64_t Value,
132                             const MCRelaxableFragment *DF,
133                             const MCAsmLayout &Layout) const {
134     // FIXME.
135     llvm_unreachable("relaxInstruction() unimplemented");
136   }
137 
138 
139   void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
140     // FIXME.
141     llvm_unreachable("relaxInstruction() unimplemented");
142   }
143 
144   bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
145     // FIXME: Zero fill for now. That's not right, but at least will get the
146     // section size right.
147     for (uint64_t i = 0; i != Count; ++i)
148       OW->Write8(0);
149     return true;
150   }
151 
152   unsigned getPointerSize() const {
153     StringRef Name = TheTarget.getName();
154     if (Name == "ppc64") return 8;
155     assert(Name == "ppc32" && "Unknown target name!");
156     return 4;
157   }
158 };
159 } // end anonymous namespace
160 
161 
162 // FIXME: This should be in a separate file.
163 namespace {
164   class DarwinPPCAsmBackend : public PPCAsmBackend {
165   public:
166     DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
167 
168     MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
169       bool is64 = getPointerSize() == 8;
170       return createMachObjectWriter(new PPCMachObjectWriter(
171                                       /*Is64Bit=*/is64,
172                                       (is64 ? object::mach::CTM_PowerPC64 :
173                                        object::mach::CTM_PowerPC),
174                                       object::mach::CSPPC_ALL),
175                                     OS, /*IsLittleEndian=*/false);
176     }
177 
178     virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
179       return false;
180     }
181   };
182 
183   class ELFPPCAsmBackend : public PPCAsmBackend {
184     uint8_t OSABI;
185   public:
186     ELFPPCAsmBackend(const Target &T, uint8_t OSABI) :
187       PPCAsmBackend(T), OSABI(OSABI) { }
188 
189 
190     MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
191       bool is64 = getPointerSize() == 8;
192       return createPPCELFObjectWriter(OS, is64, OSABI);
193     }
194 
195     virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
196       return false;
197     }
198   };
199 
200 } // end anonymous namespace
201 
202 
203 
204 
205 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
206   if (Triple(TT).isOSDarwin())
207     return new DarwinPPCAsmBackend(T);
208 
209   uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
210   return new ELFPPCAsmBackend(T, OSABI);
211 }
212