1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "MCTargetDesc/PPCMCTargetDesc.h"
11 #include "MCTargetDesc/PPCFixupKinds.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCELFObjectWriter.h"
14 #include "llvm/MC/MCFixupKindInfo.h"
15 #include "llvm/MC/MCMachObjectWriter.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCSectionMachO.h"
18 #include "llvm/MC/MCValue.h"
19 #include "llvm/Object/MachOFormat.h"
20 #include "llvm/Support/ELF.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/TargetRegistry.h"
23 using namespace llvm;
24 
25 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
26   switch (Kind) {
27   default:
28     llvm_unreachable("Unknown fixup kind!");
29   case FK_Data_1:
30   case FK_Data_2:
31   case FK_Data_4:
32   case FK_Data_8:
33   case PPC::fixup_ppc_toc:
34   case PPC::fixup_ppc_tlsreg:
35     return Value;
36   case PPC::fixup_ppc_lo14:
37   case PPC::fixup_ppc_toc16_ds:
38     return (Value & 0xffff) << 2;
39   case PPC::fixup_ppc_brcond14:
40     return Value & 0xfffc;
41   case PPC::fixup_ppc_br24:
42     return Value & 0x3fffffc;
43 #if 0
44   case PPC::fixup_ppc_hi16:
45     return (Value >> 16) & 0xffff;
46 #endif
47   case PPC::fixup_ppc_ha16:
48     return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
49   case PPC::fixup_ppc_lo16:
50   case PPC::fixup_ppc_toc16:
51     return Value & 0xffff;
52   }
53 }
54 
55 namespace {
56 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
57 public:
58   PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
59                       uint32_t CPUSubtype)
60     : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
61 
62   void RecordRelocation(MachObjectWriter *Writer,
63                         const MCAssembler &Asm, const MCAsmLayout &Layout,
64                         const MCFragment *Fragment, const MCFixup &Fixup,
65                         MCValue Target, uint64_t &FixedValue) {
66     llvm_unreachable("Relocation emission for MachO/PPC unimplemented!");
67   }
68 };
69 
70 class PPCAsmBackend : public MCAsmBackend {
71 const Target &TheTarget;
72 public:
73   PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
74 
75   unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
76 
77   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
78     const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
79       // name                    offset  bits  flags
80       { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
81       { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
82       { "fixup_ppc_lo16",        16,     16,   0 },
83       { "fixup_ppc_ha16",        16,     16,   0 },
84       { "fixup_ppc_lo14",        16,     14,   0 },
85       { "fixup_ppc_toc",          0,     64,   0 },
86       { "fixup_ppc_toc16",       16,     16,   0 },
87       { "fixup_ppc_toc16_ds",    16,     14,   0 },
88       { "fixup_ppc_tlsreg",       0,      0,   0 }
89     };
90 
91     if (Kind < FirstTargetFixupKind)
92       return MCAsmBackend::getFixupKindInfo(Kind);
93 
94     assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
95            "Invalid kind!");
96     return Infos[Kind - FirstTargetFixupKind];
97   }
98 
99   void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
100                   uint64_t Value) const {
101     Value = adjustFixupValue(Fixup.getKind(), Value);
102     if (!Value) return;           // Doesn't change encoding.
103 
104     unsigned Offset = Fixup.getOffset();
105 
106     // For each byte of the fragment that the fixup touches, mask in the bits
107     // from the fixup value. The Value has been "split up" into the appropriate
108     // bitfields above.
109     for (unsigned i = 0; i != 4; ++i)
110       Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
111   }
112 
113   bool mayNeedRelaxation(const MCInst &Inst) const {
114     // FIXME.
115     return false;
116   }
117 
118   bool fixupNeedsRelaxation(const MCFixup &Fixup,
119                             uint64_t Value,
120                             const MCInstFragment *DF,
121                             const MCAsmLayout &Layout) const {
122     // FIXME.
123     llvm_unreachable("relaxInstruction() unimplemented");
124   }
125 
126 
127   void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
128     // FIXME.
129     llvm_unreachable("relaxInstruction() unimplemented");
130   }
131 
132   bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
133     // FIXME: Zero fill for now. That's not right, but at least will get the
134     // section size right.
135     for (uint64_t i = 0; i != Count; ++i)
136       OW->Write8(0);
137     return true;
138   }
139 
140   unsigned getPointerSize() const {
141     StringRef Name = TheTarget.getName();
142     if (Name == "ppc64") return 8;
143     assert(Name == "ppc32" && "Unknown target name!");
144     return 4;
145   }
146 };
147 } // end anonymous namespace
148 
149 
150 // FIXME: This should be in a separate file.
151 namespace {
152   class DarwinPPCAsmBackend : public PPCAsmBackend {
153   public:
154     DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
155 
156     MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
157       bool is64 = getPointerSize() == 8;
158       return createMachObjectWriter(new PPCMachObjectWriter(
159                                       /*Is64Bit=*/is64,
160                                       (is64 ? object::mach::CTM_PowerPC64 :
161                                        object::mach::CTM_PowerPC),
162                                       object::mach::CSPPC_ALL),
163                                     OS, /*IsLittleEndian=*/false);
164     }
165 
166     virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
167       return false;
168     }
169   };
170 
171   class ELFPPCAsmBackend : public PPCAsmBackend {
172     uint8_t OSABI;
173   public:
174     ELFPPCAsmBackend(const Target &T, uint8_t OSABI) :
175       PPCAsmBackend(T), OSABI(OSABI) { }
176 
177 
178     MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
179       bool is64 = getPointerSize() == 8;
180       return createPPCELFObjectWriter(OS, is64, OSABI);
181     }
182 
183     virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
184       return false;
185     }
186   };
187 
188 } // end anonymous namespace
189 
190 
191 
192 
193 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
194   if (Triple(TT).isOSDarwin())
195     return new DarwinPPCAsmBackend(T);
196 
197   uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
198   return new ELFPPCAsmBackend(T, OSABI);
199 }
200