1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "MCTargetDesc/PPCFixupKinds.h"
10 #include "MCTargetDesc/PPCMCTargetDesc.h"
11 #include "llvm/BinaryFormat/ELF.h"
12 #include "llvm/BinaryFormat/MachO.h"
13 #include "llvm/MC/MCAsmBackend.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCELFObjectWriter.h"
16 #include "llvm/MC/MCFixupKindInfo.h"
17 #include "llvm/MC/MCMachObjectWriter.h"
18 #include "llvm/MC/MCObjectWriter.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/MCSymbolELF.h"
22 #include "llvm/MC/MCValue.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/TargetRegistry.h"
25 using namespace llvm;
26 
27 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
28   switch (Kind) {
29   default:
30     llvm_unreachable("Unknown fixup kind!");
31   case FK_Data_1:
32   case FK_Data_2:
33   case FK_Data_4:
34   case FK_Data_8:
35   case PPC::fixup_ppc_nofixup:
36     return Value;
37   case PPC::fixup_ppc_brcond14:
38   case PPC::fixup_ppc_brcond14abs:
39     return Value & 0xfffc;
40   case PPC::fixup_ppc_br24:
41   case PPC::fixup_ppc_br24abs:
42   case PPC::fixup_ppc_br24_notoc:
43     return Value & 0x3fffffc;
44   case PPC::fixup_ppc_half16:
45     return Value & 0xffff;
46   case PPC::fixup_ppc_half16ds:
47     return Value & 0xfffc;
48   }
49 }
50 
51 static unsigned getFixupKindNumBytes(unsigned Kind) {
52   switch (Kind) {
53   default:
54     llvm_unreachable("Unknown fixup kind!");
55   case FK_Data_1:
56     return 1;
57   case FK_Data_2:
58   case PPC::fixup_ppc_half16:
59   case PPC::fixup_ppc_half16ds:
60     return 2;
61   case FK_Data_4:
62   case PPC::fixup_ppc_brcond14:
63   case PPC::fixup_ppc_brcond14abs:
64   case PPC::fixup_ppc_br24:
65   case PPC::fixup_ppc_br24abs:
66   case PPC::fixup_ppc_br24_notoc:
67     return 4;
68   case FK_Data_8:
69     return 8;
70   case PPC::fixup_ppc_nofixup:
71     return 0;
72   }
73 }
74 
75 namespace {
76 
77 class PPCAsmBackend : public MCAsmBackend {
78 protected:
79   Triple TT;
80 public:
81   PPCAsmBackend(const Target &T, const Triple &TT)
82       : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big),
83         TT(TT) {}
84 
85   unsigned getNumFixupKinds() const override {
86     return PPC::NumTargetFixupKinds;
87   }
88 
89   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
90     const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
91       // name                    offset  bits  flags
92       { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
93       { "fixup_ppc_br24_notoc",  6,      24,   MCFixupKindInfo::FKF_IsPCRel },
94       { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
95       { "fixup_ppc_br24abs",     6,      24,   0 },
96       { "fixup_ppc_brcond14abs", 16,     14,   0 },
97       { "fixup_ppc_half16",       0,     16,   0 },
98       { "fixup_ppc_half16ds",     0,     14,   0 },
99       { "fixup_ppc_nofixup",      0,      0,   0 }
100     };
101     const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
102       // name                    offset  bits  flags
103       { "fixup_ppc_br24",        2,      24,   MCFixupKindInfo::FKF_IsPCRel },
104       { "fixup_ppc_br24_notoc",  2,      24,   MCFixupKindInfo::FKF_IsPCRel },
105       { "fixup_ppc_brcond14",    2,      14,   MCFixupKindInfo::FKF_IsPCRel },
106       { "fixup_ppc_br24abs",     2,      24,   0 },
107       { "fixup_ppc_brcond14abs", 2,      14,   0 },
108       { "fixup_ppc_half16",      0,      16,   0 },
109       { "fixup_ppc_half16ds",    2,      14,   0 },
110       { "fixup_ppc_nofixup",     0,       0,   0 }
111     };
112 
113     // Fixup kinds from .reloc directive are like R_PPC_NONE/R_PPC64_NONE. They
114     // do not require any extra processing.
115     if (Kind >= FirstLiteralRelocationKind)
116       return MCAsmBackend::getFixupKindInfo(FK_NONE);
117 
118     if (Kind < FirstTargetFixupKind)
119       return MCAsmBackend::getFixupKindInfo(Kind);
120 
121     assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
122            "Invalid kind!");
123     return (Endian == support::little
124                 ? InfosLE
125                 : InfosBE)[Kind - FirstTargetFixupKind];
126   }
127 
128   void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
129                   const MCValue &Target, MutableArrayRef<char> Data,
130                   uint64_t Value, bool IsResolved,
131                   const MCSubtargetInfo *STI) const override {
132     MCFixupKind Kind = Fixup.getKind();
133     if (Kind >= FirstLiteralRelocationKind)
134       return;
135     Value = adjustFixupValue(Kind, Value);
136     if (!Value) return;           // Doesn't change encoding.
137 
138     unsigned Offset = Fixup.getOffset();
139     unsigned NumBytes = getFixupKindNumBytes(Kind);
140 
141     // For each byte of the fragment that the fixup touches, mask in the bits
142     // from the fixup value. The Value has been "split up" into the appropriate
143     // bitfields above.
144     for (unsigned i = 0; i != NumBytes; ++i) {
145       unsigned Idx = Endian == support::little ? i : (NumBytes - 1 - i);
146       Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
147     }
148   }
149 
150   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
151                              const MCValue &Target) override {
152     MCFixupKind Kind = Fixup.getKind();
153     switch ((unsigned)Kind) {
154     default:
155       return Kind >= FirstLiteralRelocationKind;
156     case PPC::fixup_ppc_br24:
157     case PPC::fixup_ppc_br24abs:
158     case PPC::fixup_ppc_br24_notoc:
159       // If the target symbol has a local entry point we must not attempt
160       // to resolve the fixup directly.  Emit a relocation and leave
161       // resolution of the final target address to the linker.
162       if (const MCSymbolRefExpr *A = Target.getSymA()) {
163         if (const auto *S = dyn_cast<MCSymbolELF>(&A->getSymbol())) {
164           // The "other" values are stored in the last 6 bits of the second
165           // byte. The traditional defines for STO values assume the full byte
166           // and thus the shift to pack it.
167           unsigned Other = S->getOther() << 2;
168           if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0)
169             return true;
170         }
171       }
172       return false;
173     }
174   }
175 
176   bool mayNeedRelaxation(const MCInst &Inst,
177                          const MCSubtargetInfo &STI) const override {
178     // FIXME.
179     return false;
180   }
181 
182   bool fixupNeedsRelaxation(const MCFixup &Fixup,
183                             uint64_t Value,
184                             const MCRelaxableFragment *DF,
185                             const MCAsmLayout &Layout) const override {
186     // FIXME.
187     llvm_unreachable("relaxInstruction() unimplemented");
188   }
189 
190   void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
191                         MCInst &Res) const override {
192     // FIXME.
193     llvm_unreachable("relaxInstruction() unimplemented");
194   }
195 
196   bool writeNopData(raw_ostream &OS, uint64_t Count) const override {
197     uint64_t NumNops = Count / 4;
198     for (uint64_t i = 0; i != NumNops; ++i)
199       support::endian::write<uint32_t>(OS, 0x60000000, Endian);
200 
201     OS.write_zeros(Count % 4);
202 
203     return true;
204   }
205 };
206 } // end anonymous namespace
207 
208 
209 // FIXME: This should be in a separate file.
210 namespace {
211 
212 class ELFPPCAsmBackend : public PPCAsmBackend {
213 public:
214   ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {}
215 
216   std::unique_ptr<MCObjectTargetWriter>
217   createObjectTargetWriter() const override {
218     uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
219     bool Is64 = TT.isPPC64();
220     return createPPCELFObjectWriter(Is64, OSABI);
221   }
222 
223   Optional<MCFixupKind> getFixupKind(StringRef Name) const override;
224 };
225 
226 class XCOFFPPCAsmBackend : public PPCAsmBackend {
227 public:
228   XCOFFPPCAsmBackend(const Target &T, const Triple &TT)
229       : PPCAsmBackend(T, TT) {}
230 
231   std::unique_ptr<MCObjectTargetWriter>
232   createObjectTargetWriter() const override {
233     return createPPCXCOFFObjectWriter(TT.isArch64Bit());
234   }
235 };
236 
237 } // end anonymous namespace
238 
239 Optional<MCFixupKind> ELFPPCAsmBackend::getFixupKind(StringRef Name) const {
240   if (TT.isOSBinFormatELF()) {
241     unsigned Type;
242     if (TT.isPPC64()) {
243       Type = llvm::StringSwitch<unsigned>(Name)
244 #define ELF_RELOC(X, Y) .Case(#X, Y)
245 #include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def"
246 #undef ELF_RELOC
247                  .Default(-1u);
248     } else {
249       Type = llvm::StringSwitch<unsigned>(Name)
250 #define ELF_RELOC(X, Y) .Case(#X, Y)
251 #include "llvm/BinaryFormat/ELFRelocs/PowerPC.def"
252 #undef ELF_RELOC
253                  .Default(-1u);
254     }
255     if (Type != -1u)
256       return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
257   }
258   return None;
259 }
260 
261 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
262                                         const MCSubtargetInfo &STI,
263                                         const MCRegisterInfo &MRI,
264                                         const MCTargetOptions &Options) {
265   const Triple &TT = STI.getTargetTriple();
266   if (TT.isOSBinFormatXCOFF())
267     return new XCOFFPPCAsmBackend(T, TT);
268 
269   return new ELFPPCAsmBackend(T, TT);
270 }
271