1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "MCTargetDesc/PPCFixupKinds.h" 11 #include "MCTargetDesc/PPCMCTargetDesc.h" 12 #include "llvm/BinaryFormat/ELF.h" 13 #include "llvm/BinaryFormat/MachO.h" 14 #include "llvm/MC/MCAsmBackend.h" 15 #include "llvm/MC/MCAssembler.h" 16 #include "llvm/MC/MCELFObjectWriter.h" 17 #include "llvm/MC/MCFixupKindInfo.h" 18 #include "llvm/MC/MCMachObjectWriter.h" 19 #include "llvm/MC/MCObjectWriter.h" 20 #include "llvm/MC/MCSectionMachO.h" 21 #include "llvm/MC/MCSymbolELF.h" 22 #include "llvm/MC/MCValue.h" 23 #include "llvm/Support/ErrorHandling.h" 24 #include "llvm/Support/TargetRegistry.h" 25 using namespace llvm; 26 27 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { 28 switch (Kind) { 29 default: 30 llvm_unreachable("Unknown fixup kind!"); 31 case FK_Data_1: 32 case FK_Data_2: 33 case FK_Data_4: 34 case FK_Data_8: 35 case PPC::fixup_ppc_nofixup: 36 return Value; 37 case PPC::fixup_ppc_brcond14: 38 case PPC::fixup_ppc_brcond14abs: 39 return Value & 0xfffc; 40 case PPC::fixup_ppc_br24: 41 case PPC::fixup_ppc_br24abs: 42 return Value & 0x3fffffc; 43 case PPC::fixup_ppc_half16: 44 return Value & 0xffff; 45 case PPC::fixup_ppc_half16ds: 46 return Value & 0xfffc; 47 } 48 } 49 50 static unsigned getFixupKindNumBytes(unsigned Kind) { 51 switch (Kind) { 52 default: 53 llvm_unreachable("Unknown fixup kind!"); 54 case FK_Data_1: 55 return 1; 56 case FK_Data_2: 57 case PPC::fixup_ppc_half16: 58 case PPC::fixup_ppc_half16ds: 59 return 2; 60 case FK_Data_4: 61 case PPC::fixup_ppc_brcond14: 62 case PPC::fixup_ppc_brcond14abs: 63 case PPC::fixup_ppc_br24: 64 case PPC::fixup_ppc_br24abs: 65 return 4; 66 case FK_Data_8: 67 return 8; 68 case PPC::fixup_ppc_nofixup: 69 return 0; 70 } 71 } 72 73 namespace { 74 75 class PPCAsmBackend : public MCAsmBackend { 76 const Target &TheTarget; 77 bool IsLittleEndian; 78 public: 79 PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T), 80 IsLittleEndian(isLittle) {} 81 82 unsigned getNumFixupKinds() const override { 83 return PPC::NumTargetFixupKinds; 84 } 85 86 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override { 87 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = { 88 // name offset bits flags 89 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, 90 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel }, 91 { "fixup_ppc_br24abs", 6, 24, 0 }, 92 { "fixup_ppc_brcond14abs", 16, 14, 0 }, 93 { "fixup_ppc_half16", 0, 16, 0 }, 94 { "fixup_ppc_half16ds", 0, 14, 0 }, 95 { "fixup_ppc_nofixup", 0, 0, 0 } 96 }; 97 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = { 98 // name offset bits flags 99 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel }, 100 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel }, 101 { "fixup_ppc_br24abs", 2, 24, 0 }, 102 { "fixup_ppc_brcond14abs", 2, 14, 0 }, 103 { "fixup_ppc_half16", 0, 16, 0 }, 104 { "fixup_ppc_half16ds", 2, 14, 0 }, 105 { "fixup_ppc_nofixup", 0, 0, 0 } 106 }; 107 108 if (Kind < FirstTargetFixupKind) 109 return MCAsmBackend::getFixupKindInfo(Kind); 110 111 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 112 "Invalid kind!"); 113 return (IsLittleEndian? InfosLE : InfosBE)[Kind - FirstTargetFixupKind]; 114 } 115 116 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 117 const MCValue &Target, MutableArrayRef<char> Data, 118 uint64_t Value, bool IsPCRel) const override { 119 Value = adjustFixupValue(Fixup.getKind(), Value); 120 if (!Value) return; // Doesn't change encoding. 121 122 unsigned Offset = Fixup.getOffset(); 123 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); 124 125 // For each byte of the fragment that the fixup touches, mask in the bits 126 // from the fixup value. The Value has been "split up" into the appropriate 127 // bitfields above. 128 for (unsigned i = 0; i != NumBytes; ++i) { 129 unsigned Idx = IsLittleEndian ? i : (NumBytes - 1 - i); 130 Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff); 131 } 132 } 133 134 void processFixupValue(const MCAssembler &Asm, const MCFixup &Fixup, 135 const MCValue &Target, bool &IsResolved) override { 136 switch ((PPC::Fixups)Fixup.getKind()) { 137 default: break; 138 case PPC::fixup_ppc_br24: 139 case PPC::fixup_ppc_br24abs: 140 // If the target symbol has a local entry point we must not attempt 141 // to resolve the fixup directly. Emit a relocation and leave 142 // resolution of the final target address to the linker. 143 if (const MCSymbolRefExpr *A = Target.getSymA()) { 144 if (const auto *S = dyn_cast<MCSymbolELF>(&A->getSymbol())) { 145 // The "other" values are stored in the last 6 bits of the second 146 // byte. The traditional defines for STO values assume the full byte 147 // and thus the shift to pack it. 148 unsigned Other = S->getOther() << 2; 149 if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0) 150 IsResolved = false; 151 } 152 } 153 break; 154 } 155 } 156 157 bool mayNeedRelaxation(const MCInst &Inst) const override { 158 // FIXME. 159 return false; 160 } 161 162 bool fixupNeedsRelaxation(const MCFixup &Fixup, 163 uint64_t Value, 164 const MCRelaxableFragment *DF, 165 const MCAsmLayout &Layout) const override { 166 // FIXME. 167 llvm_unreachable("relaxInstruction() unimplemented"); 168 } 169 170 void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI, 171 MCInst &Res) const override { 172 // FIXME. 173 llvm_unreachable("relaxInstruction() unimplemented"); 174 } 175 176 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override { 177 uint64_t NumNops = Count / 4; 178 for (uint64_t i = 0; i != NumNops; ++i) 179 OW->write32(0x60000000); 180 181 OW->WriteZeros(Count % 4); 182 183 return true; 184 } 185 186 unsigned getPointerSize() const { 187 StringRef Name = TheTarget.getName(); 188 if (Name == "ppc64" || Name == "ppc64le") return 8; 189 assert(Name == "ppc32" && "Unknown target name!"); 190 return 4; 191 } 192 193 bool isLittleEndian() const { 194 return IsLittleEndian; 195 } 196 }; 197 } // end anonymous namespace 198 199 200 // FIXME: This should be in a separate file. 201 namespace { 202 class DarwinPPCAsmBackend : public PPCAsmBackend { 203 public: 204 DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T, false) { } 205 206 MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override { 207 bool is64 = getPointerSize() == 8; 208 return createPPCMachObjectWriter( 209 OS, 210 /*Is64Bit=*/is64, 211 (is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC), 212 MachO::CPU_SUBTYPE_POWERPC_ALL); 213 } 214 }; 215 216 class ELFPPCAsmBackend : public PPCAsmBackend { 217 uint8_t OSABI; 218 public: 219 ELFPPCAsmBackend(const Target &T, bool IsLittleEndian, uint8_t OSABI) : 220 PPCAsmBackend(T, IsLittleEndian), OSABI(OSABI) { } 221 222 MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override { 223 bool is64 = getPointerSize() == 8; 224 return createPPCELFObjectWriter(OS, is64, isLittleEndian(), OSABI); 225 } 226 }; 227 228 } // end anonymous namespace 229 230 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, 231 const MCRegisterInfo &MRI, 232 const Triple &TT, StringRef CPU, 233 const MCTargetOptions &Options) { 234 if (TT.isOSDarwin()) 235 return new DarwinPPCAsmBackend(T); 236 237 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); 238 bool IsLittleEndian = TT.getArch() == Triple::ppc64le; 239 return new ELFPPCAsmBackend(T, IsLittleEndian, OSABI); 240 } 241